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PD -95622
Logic-Level Gate Drive l Advanced Process Technology l Ultra Low On-Resistance l Dynamic dv/dt Rating l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Description
l
HEXFET(R) Power MOSFET
D
IRL2505PBF
VDSS = 55V RDS(on) = 0.008
G
ID = 104A
S
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 is universally preferred for all commercialIndustrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew
Max.
104 74 360 200 1.3 16 500 54 20 5.0 55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Juction-to-Ambient
Typ.
--- 0.50 ---
Max.
0.75 --- 62
Units
C/W
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8/3/04
IRL2505PBF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient V (BR)DSS RDS(on) V GS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 55 1.0 59 Typ. Max. Units Conditions V VGS = 0V, ID = 250A 0.035 V/C Reference to 25C, ID = 1mA 0.008 VGS = 10V, ID = 54A 0.010 VGS = 5.0V, ID = 54A 0.013 VGS = 4.0V, ID = 45A 2.0 V VDS = VGS, ID = 250A S VDS = 25V, ID = 54A 25 VDS = 55V, VGS = 0V A 250 VDS = 44V, VGS = 0V, T J = 150C 100 VGS = 16V nA -100 VGS = -16V 130 ID = 54A 25 nC VDS = 44V 67 VGS = 5.0V, See Fig. 6 and 13 12 VDD = 28V 160 ID = 54A ns 43 RG = 1.3, VGS = 5.0V 84 RD = 0.50, See Fig. 10 Between lead, 7.5 nH and center of die contact 5000 VGS = 0V 1100 pF VDS = 25V 390 = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 104 showing the A G integral reverse 360 S p-n junction diode. 1.3 V TJ = 25C, IS = 54A, VGS = 0V 140 210 ns TJ = 25C, IF = 54A 650 970 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) VDD = 25V, starting TJ = 25C, L = 240H RG = 25, IAS = 54A. (See Figure 12) ISD 54A, di/dt 230A/s, VDD V(BR)DSS, TJ 175C
Pulse width 300s; duty cycle 2%. Calculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the package refer to Design Tip # 93-4
2
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IRL2505PBF
1000
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
1000
ID , Drain-to-Source Current (A)
100
ID , Drain-to-Source Current (A)
VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTTOM 2.5V TOP
100
10
10
2.5V
2.5V 20s PULSE WIDTH T J = 25C
1 10
1 0.1
100
A
1 0.1
20s PULSE WIDTH T J = 175C
1 10
100
A
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
TJ = 25C
100
RDS(on) , Drain-to-Source On Resistance (Normalized)
2.5
ID = 90A
I D , Drain-to-Source Current (A)
2.0
TJ = 175C
1.5
1.0
10
0.5
1 2.5 3.5 4.5
V DS= 25V 20s PULSE WIDTH
5.5 6.5 7.5
A
0.0 -60 -40 -20 0
VGS = 5V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRL2505PBF
10000
8000
VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd
15
I D = 54A VDS = 44V VDS = 28V
12
C, Capacitance (pF)
Ciss
6000
9
4000
Coss
6
2000
Crss
A
3
0 1 10 100
0 0 40 80
FOR TEST CIRCUIT SEE FIGURE 13
120 160
200
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
10s
I D , Drain Current (A)
100 100s
100
TJ = 175C TJ = 25C
1ms 10 10ms
10 0.4 0.8 1.2 1.6 2.0
VGS = 0V
2.4
A
1 1
TC = 25C TJ = 175C Single Pulse
10
2.8
100
A
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRL2505PBF
120
LIMITED BY PACKAGE
100
V GS RG 5.0V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
I D , Drain Current (A)
-V DD
80
60
40
Fig 10a. Switching Time Test Circuit
VDS 90%
20
0
25
50
75
100
125
150
175
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
1
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
D = 0.50
0.20 0.1 0.10 0.05 0.02 0.01 PDM t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.01 0.1 1
0.01 0.00001
0.0001
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRL2505PBF
EAS , Single Pulse Avalanche Energy (mJ)
1200
VDS
L D.U.T.
TOP
1000
BOTTOM
ID 22A 38A 54A
RG
+
V - DD
800
5.0 V
IAS tp
0.01
600
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp VDD VDS
400
200
0
VDD = 25V
25 50 75 100 125 150
175
A
Starting TJ , Junction Temperature (C)
IAS
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
5.0 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRL2505PBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ V DD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS
= 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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IRL2505PBF
TO-220AB Package Outline
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240)
Dimensions are shown in millimeters (inches)
-B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 21- GATE DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- SOURCE 3- EMITTER 4 - DRAIN
LEAD ASSIGNMENTS
HEXFET
14.09 (.555) 13.47 (.530)
4- DRAIN
4.06 (.160) 3.55 (.140)
4- COLLECTOR
3X 3X 1.40 (.055) 1.15 (.045)
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
2.92 (.115) 2.64 (.104)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010 LOT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y LINE "C" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R
Note: "P" in assembly line position indicates "Lead-Free"
DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.08/04
8
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