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UNIVERSAL DEMULTIPLEXER/ DECODER
FEATURES
s Max. propagation delay of 1200ps s IEE min. of -92mA s Industry standard 100K ECL levels s Extended supply voltage option: VEE = -4.2V to -5.5V s Voltage and temperature compensation for improved noise immunity s Internal 75K input pull-down resistors s 60% faster than National or Signetics s Approximately 40% lower power than Fairchild s Function and pinout compatible with Fairchild F100K s Available in 24-pin CERPACK and 28-pin PLCC packages
SY100S370
DESCRIPTION
The SY100S370 is a universal demultiplexer/decoder that can be used as either a dual 1-of-4 decoder or as a single 1-of-8 decoder and is designed for use in highperformance ECL systems. The Mode control (M) input determines the function. In the dual 1-of-4 mode, each 4input group has a pair of active-LOW Enable (E) inputs. The Enable pins are assigned such that in the single 1-of8 mode they can be tied together in pairs to result in two active-LOW Enable inputs. E1a will be tied to E1b and E2a to E2b. The auxiliary inputs (Hn) are used to determine whether the outputs are active-HIGH or active-LOW. The address inputs for the dual 1-of-4 mode are A0a, A1a, A0b. A2a is unused. In the 1-of-8 mode, the address inputs are A0a, A1a, A2a. The inputs on the device have 75K pull-down resistors.
PIN CONFIGURATIONS
M A1a VEES A2a A0a Z1a (Z1) Z2a (Z2)
PIN NAMES
Pin Ana, Anb Ena, Enb M Ha Hb Hc Z0 - Z7 Zna, Znb VEES VCCA Function Address Inputs (n = 0,1,2) Enable Inputs (n = 1,2) Mode Control Input Z0 - Z3 (Z0a - Z3a) Polarity Select Input Z4 - Z7 (Z0b - Z3b) Polarity Select Input Common Polarity Select Input Single 1-of-8 Data Outputs Dual 1-of-4 Data Outputs (n = 1...4) VEE Substrate VCCO for ECL Outputs
E1a E1b VEE VEES E2b E2a Ha 12 13 14 15 16 17 18
11 10 9 8 7 6 5 4 3 2 1 28 27 26 Z0a (Z0) Z3a (Z3) VCCA VCC VCC Z1b (Z5) Z2b (Z6)
Top View PLCC J28-1
19 20 21 22 23 24 25
Hb A0b VEES A1b Z3b (Z7) Z0b (Z4) Hc
E2a E2b VEE
E1b
Hc Hb A0b A1b Z3b (Z7) Z0b (Z4)
1 2 3 4 5 6
24 23 22 21 20 19 18 Top View Flatpack F24-1 17 16 15 14
E1a
Ha
A2a M A1a A0a Z1a (Z1) Z2a (Z2)
13 7 8 9 10 11 12
Z2b (Z6)
Z1b (Z5) VCC
Z3a (Z3) Z0a (Z0)
Rev.: G Amendment: /0 Issue Date: July, 1999
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VCCA
Micrel
SY100S370
BLOCK DIAGRAM
A0a A1a E1a E2a A2a M Z1a (Z1) Z0a (Z0) Z2a (Z2)
Z3a (Z3)
Z2b (Z6) A0b Z0b (Z4)
Z1b (Z5)
A1b E1b E2b Ha Hc Hb
Z3b (Z7)
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Micrel
SY100S370
TRUTH TABLES(1)
Dual 1-of-4 Mode (M = A2a = Hc = LOW) Inputs E1a,E1b H X L L L L E2a,E2b X H L L L L A1a,A1b X X L L H H A0a,A0b X X L H L H Active HIGH Outputs (Ha and Hb Inputs HIGH) Z0a,Z0b L L H L L L Z1a,Z1b L L L H L L Z2a,Z2b L L L L H L Z3a,Z3b L L L L L H Active LOW Outputs (Ha and Hb Inputs LOW) Z0a,Z0b H H L H H H Z1a,Z1b H H H L H H Z2a,Z2b H H H H L H Z3a,Z3b H H H H H L
Single 1-of-8 Mode (M = HIGH; A0b = A1b = Ha = Hb = LOW) Inputs E1 H X L L L L L L L L E2 X H L L L L L L L L A2a X X L L L L H H H H A1a X X L L H H L L H H A0a X X L H L H L H L H Z0 L L H L L L L L L L Z1 L L L H L L L L L L Active HIGH Outputs* (Hc Input HIGH) Z2 L L L L H L L L L L Z3 L L L L L H L L L L Z4 L L L L L L H L L L Z5 L L L L L L L H L L Z6 L L L L L L L L H L Z7 L L L L L L L L L H
NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care * for Hc = LOW, output states are complemented E1 = E1a and E1b wired; E2 = E2a and E2b wired
DC ELECTRICAL CHARACTERISTICS
VEE = -4.2V to -5.5V unless otherwise specified; VCC = VCCA = GND
Symbol IIH Parameter Input HIGH Current Hc, A0a, A1a, A2a All Others Power Supply Current Min. -- -- -92 Typ. -- -- -73 Max. 310 250 -46 mA Inputs Open Unit A Condition VIN = VIH (Max.)
IEE
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Micrel
SY100S370
AC ELECTRICAL CHARACTERISTICS CERPACK
VEE = -4.2V to -5.5V unless otherwise specified; VCC = VCCA = GND
TA = 0C Symbol tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Ena, Enb to Output Propagation Delay Ana, Anb to Output Propagation Delay Ha, Hb, Hc to Output Propagation Delay M to Output Transition Time 20% to 80%, 80% to 20% Min. 300 500 500 600 300 Max. 1300 1600 1600 2100 900 TA = +25C Min. 300 500 500 600 300 Max. 1300 1600 1600 2100 900 TA = +85C Min. 300 500 500 600 300 Max. 1300 1600 1600 2100 900 Unit ps ps ps ps ps Condition
PLCC
VEE = -4.2V to -5.5V unless otherwise specified; VCC = VCCA = GND
TA = 0C Symbol tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Ena, Enb to Output Propagation Delay Ana, Anb to Output Propagation Delay Ha, Hb, Hc to Output Propagation Delay M to Output Transition Time 20% to 80%, 80% to 20% Min. 300 500 500 600 300 Max. 1200 1500 1500 2100 900 TA = +25C Min. 300 500 500 600 300 Max. 1200 1500 1500 2100 900 TA = +85C Min. 300 500 500 600 300 Max. 1200 1500 1500 2100 900 Unit ps ps ps ps ps Condition
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Micrel
SY100S370
TIMING DIAGRAM
0.7 0.1 ns INPUT
0.7 0.1 ns -0.95V 80% 50% 20% -1.69V tPHL tPLH 80% 50% 20% tTLH tTHL
OUTPUT
Propagation Delay and Transition Times
NOTE: VEE = -4.2V to -5.5V unless otherwise specified; VCC = VCCA = GND
PRODUCT ORDERING CODE
Ordering Code SY100S370FC SY100S370JC SY100S370JCTR Package Type F24-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial
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Micrel
SY100S370
24 LEAD CERPACK (F24-1)
Rev. 03
6
Micrel
SY100S370
28 LEAD PLCC (J28-1)
Rev. 03
MICREL-SYNERGY
TEL
3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
FAX
+ 1 (408) 980-9191
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated
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