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 NUS5530MN Integrated Power MOSFET with PNP Low VCE(sat) Switching Transistor
This integrated device represents a new level of safety and board-space reduction by combining the 20 V P-Channel FET with a PNP Silicon Low VCE(sat) switching transistor. This newly integrated product provides higher efficiency and accuracy for battery powered portable electronics.
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1
8
* * * * *
Low RDS(on) (MOSFET) and Low VCE(sat) (Transistor) Higher Efficiency Extending Battery Life Logic Level Gate Drive (MOSFET) Performance DFN Package This is a Pb-Free Device
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7
3
6
4 (Top View)
5
Applications
* Power Management in Portable and Battery-Powered Products; i.e.,
Cellular and Cordless Telephones and PCMCIA Cards
MAXIMUM RATINGS FOR P-CHANNEL FET
(TA = 25C unless otherwise noted) Rating Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ = 150C) (Note 1) TA = 25C TA = 85C Pulsed Drain Current Continuous Source Current (Note 1) Maximum Power Dissipation (Note 1) TA = 25C TA = 85C Operating Junction and Storage Temperature Range Symbol VDS VGS ID -5.3 -3.8 IDM IS PD 2.5 1.3 TJ, Tstg 1.3 0.7 C -5.3 "20 -3.9 -3.9 -2.8 A A W Emitter Base N/C Gate 5 sec Steady State -20 "12 Unit V V A A Y WW G 1 DFN8 CASE 506AL 8
MARKING DIAGRAM
1 5530 AYWW G G
= Assembly Location = Year = Work Week = Pb-Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
8 7 6 5
Collector
1 2 3 4
N/C Collector Source Drain
-55 to +150
Drain
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq [1 oz] including traces).
(Bottom View)
ORDERING INFORMATION
Device NUS5530MNR2G Package DFN8 (Pb-Free) Shipping 3000/Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2006
May, 2006 - Rev. 0
1
Publication Order Number: NUS5530MN/D
NUS5530MN
MAXIMUM RATINGS FOR PNP TRANSISTORS (TA = 25C)
Rating Collector-Emitter Voltage Collector-Base Voltage Emitter-Base Voltage Collector Current - Continuous Collector Current - Peak Electrostatic Discharge Symbol VCEO VCBO VEBO IC ICM ESD Max -35 -55 -5.0 -2.0 -7.0 HBM Class 3 MM Class C Unit Vdc Vdc Vdc Adc A
THERMAL CHARACTERISTICS FOR P-CHANNEL FET
Characteristic Maximum Junction-to-Ambient (Note 4) t v 5 sec Steady State Maximum Junction-to-Foot (Drain) Steady State Symbol RqJA Typ 40 80 15 Max 50 95 20 Unit C/W
RqJF
C/W
THERMAL CHARACTERISTICS FOR PNP TRANSISTORS
Characteristic Total Device Dissipation TA = 25C Derate above 25C Thermal Resistance, Junction-to-Ambient Total Device Dissipation TA = 25C Derate above 25C Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Lead #1 Total Device Dissipation (Single Pulse < 10 sec) Junction and Storage Temperature Range 1. FR-4 @ 100 1 oz copper traces. 2. FR-4 @ 500 1 oz copper traces. 3. Thermal response. mm2, mm2, Symbol PD (Note 1) Max 635 5.1 RqJA (Note 1) PD (Note 2) 200 1.35 11 RqJA (Note 2) RqJL PDsingle (Notes 2 & 3) TJ, Tstg 90 15 2.75 -55 to +150 Unit mW mW/C C/W W mW/C C/W C/W W C
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NUS5530MN
ELECTRICAL CHARACTERISTICS FOR P-CHANNEL FET (TJ = 25C unless otherwise noted)
Characteristic Static Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current VGS(th) IGSS IDSS VDS = VGS, ID = -250 mA VDS = 0 V, VGS = "12 V VDS = -16 V, VGS = 0 V VDS = -16 V, VGS = 0 V, TJ = 85C On-State Drain Current (Note 5) Drain-Source On-State Resistance (Note 5) ID(on) rDS(on) gfs VSD QG QGS QGD Ciss Coss Crss td(on) tr td(off) tf trr IF = -1.1 A, di/dt = 100 A/ms VDD = -10 V, RL = 10 W ID ^ -1.0 A, VGEN = -4.5 V, RG = 6 W VDS = -5.0 Vdc, VGS = 0 Vdc, f = 1.0 MHz VDS = -10 V, VGS = -4.5 V, ID = -3.9 A VDS v -5.0 V, VGS = -4.5 V VGS = -3.6 V, ID = -1.0 A VGS = -2.5 V, ID = -1.0 A Forward Transconductance (Note 5) Diode Forward Voltage (Note 5) Dynamic (Note 6) Total Gate Charge Gate-Source Charge Gate-Drain Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Source-Drain Reverse Recovery Time 9.7 1.2 3.6 710 400 140 14 22 42 35 30 30 55 100 70 60 ns pF 22 nC VDS = -10 V, ID = -3.9 A IS = -2.1 A, VGS = 0 V -20 - 0.050 0.070 12 -0.8 -1.2 0.06 0.083 Mhos V -0.6 -1.2 "100 -1.0 -5.0 A W V nA mA Symbol Test Condition Min Typ Max Unit
4. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq [1 oz] including traces). 5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%. 6. Guaranteed by design, not subject to production testing.
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NUS5530MN
ELECTRICAL CHARACTERISTICS FOR PNP TRANSISTORS (TA = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Collector -Emitter Breakdown Voltage (IC = -10 mAdc, IB = 0) Collector -Base Breakdown Voltage (IC = -0.1 mAdc, IE = 0) Emitter -Base Breakdown Voltage (IE = -0.1 mAdc, IC = 0) Collector Cutoff Current (VCB = -35 Vdc, IE = 0) Collector-Emitter Cutoff Current (VCES = -35 Vdc) Emitter Cutoff Current (VEB = -6.0 Vdc) ON CHARACTERISTICS DC Current Gain (Note 7) (IC = -1.0 A, VCE = -2.0 V) (IC = -1.5 A, VCE = -2.0 V) (IC = -2.0 A, VCE = -2.0 V) Collector -Emitter Saturation Voltage (Note 7) (IC = -0.1 A, IB = -0.010 A) (IC = -1.0 A, IB = -0.010 A) (IC = -2.0 A, IB = -0.02 A) Base -Emitter Saturation Voltage (Note 7) (IC = -1.0 A, IB = -0.01 A) Base -Emitter Turn-on Voltage (Note 7) (IC = -2.0 A, VCE = -3.0 V) Cutoff Frequency (IC = -100 mA, VCE = -5.0 V, f = 100 MHz) Input Capacitance (VEB = -0.5 V, f = 1.0 MHz) Output Capacitance (VCB = -3.0 V, f = 1.0 MHz) Turn-on Time (VCC = -10 V, IB1 = -100 mA, IC = -1 A, RL = 3 W) Turn-off Time (VCC = -10 V, IB1 = IB2 = -100 mA, IC = 1 A, RL = 3 W) 7. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle 2% hFE 100 100 100 - - - - - 100 - - - - 200 200 200 - - - -0.68 -0.81 - 600 85 35 225 - 400 - -0.10 -0.15 -0.30 -0.85 -0.875 - 650 100 - - V V(BR)CEO V(BR)CBO V(BR)EBO ICBO ICES IEBO -35 -55 -5.0 - - - -45 -65 -7.0 -0.03 -0.03 -0.01 - - - -0.1 -0.1 -0.1 Vdc Vdc Vdc mAdc mAdc mAdc Symbol Min Typical Max Unit
VCE(sat)
VBE(sat) VBE(on) fT Cibo Cobo ton toff
V V MHz pF pF nS nS
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NUS5530MN
TYPICAL ELECTRICAL CHARACTERISTICS FOR P-CHANNEL FET
20 -ID, DRAIN CURRENT (AMPS) 16 12 8 -2 V 4 0 0 0.5 1 1.5 2 VGS = -1.5 V 2.5 3 20 TJ = 25C -4.5 V -4 V -2.5 V -ID, DRAIN CURRENT (AMPS) TJ = -55C 16 25C 12 8 4 0 125C
-5 V
-3.5 V
-3 V
0
0.5
1
1.5
2
2.5
3
-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.2 ID = -3.9 A TJ = 25C 0.15 0.2
Figure 2. Transfer Characteristics
TJ = 25C 0.15
VGS = 2.5 V
0.1
0.1 VGS = 3.6 V 0.05 VGS = 4.5 V
0.05
0 0 1 2 3 4 5 -VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
0
2
6
10
14
18
20
-ID, DRAIN CURRENT (AMPS)
Figure 3. On-Resistance versus Gate-to-Source Voltage
1.6 RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.4 1.2 1 0.8 0.6 -50 ID = -3.9 A VGS = -4.5 V
Figure 4. On-Resistance versus Drain Current and Gate Voltage
-25
0
25
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (C)
Figure 5. On-Resistance Variation with Temperature
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5
NUS5530MN
TYPICAL ELECTRICAL CHARACTERISTICS FOR P-CHANNEL FET
-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 1500 1200 900 600 300 0 0 4 8 12 16 20 -VDS, DRAIN-TO-SOURCE VOLTAGE () TJ = 25C VGS = 0 QG
11 9 8 3 7
10
C, CAPACITANCE (pF)
4
Ciss Coss Crss
QGS
2
6
QGD ID = -3.9 A TJ = 25C QGD/QGS = 3.0
0 1 2 3 4 5 6 7 8 9
5 4 3 2 1 0 10
1
0
QG, TOTAL GATE CHARGE (nC)
Figure 6. Capacitance Variation
Figure 7. Gate-to-Source and Drain-to-Source Voltage versus Total Charge
5 -IS, SOURCE CURRENT (AMPS) 4 3 2 1 0
VGS = 0 V TJ = 25C
0.1
0.3
0.5
0.7
0.9
-VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 8. Diode Forward Voltage versus Current
1 Duty Cycle = 0.5
NORMALIZED EFFECTIVE TRANSIENT THERMAL IMPEDANCE
0.2 0.1 0.1 0.05 0.02 Single Pulse 0.0001 0.001 0.01 0.1 t2 DUTY CYCLE, D = t1/t2 1 10 t1 PDM PER UNIT BASE = RqJA = 80C/W TJM - TA = PDMZqJA(t) SURFACE MOUNTED
0.01
100
1000
SQUARE WAVE PULSE DURATION (sec)
Figure 9. Normalized Thermal Transient Impedance, Junction-to-Ambient
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6
-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
5
NUS5530MN
TYPICAL ELECTRICAL CHARACTERISTICS FOR PNP TRANSISTOR
VCE(sat), COLLECTOR EMITTER SATURATION VOLTAGE (VOLTS) VCE(sat), COLLECTOR EMITTER SATURATION VOLTAGE (VOLTS) 0.25 IC/IB = 50 0.20 100C 0.15 25C 0.10 0.05 0 -55C
0.1
IC/IB = 100 50 10
0.01
0.001
0.001
0.01
0.1
1.0
0.001
0.01
0.1
1.0
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
Figure 10. Collector Emitter Saturation Voltage versus Collector Current
500 450 400 hFE , DC CURRENT GAIN 350 300 250 200 1.0 VBE(sat) , BASE EMITTER SATURATION VOLTAGE (VOLTS) 0.8 0.6 0.4 0.2 0
Figure 11. Collector Emitter Saturation Voltage versus Collector Current
125C (5 V) 125C (2 V) 25C (5 V) 25C (2 V) -55C (5 V) -55C (2 V)
-55C 25C 100C
150 100 50 0 0.001 0.01
0.1
1
10
0.001
0.01
0.1
1.0
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
Figure 12. DC Current Gain versus Collector Current
V BE(on) , BASE EMITTER TURN-ON VOLTAGE (VOLTS) 1.1 C ibo , INPUT CAPACITANCE (pF) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.001 0.01 0.1 1.0 100C 25C -55C 750 700 650 600 550 500 450 400 350 300 0
Figure 13. Base Emitter Saturation Voltage versus Collector Current
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
IC, COLLECTOR CURRENT (A)
VEB, EMITTER BASE VOLTAGE (V)
Figure 14. Base Emitter Turn-On Voltage versus Collector Current
Figure 15. Input Capacitance
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NUS5530MN
TYPICAL ELECTRICAL CHARACTERISTICS FOR PNP TRANSISTOR
225 Cobo, OUTPUT CAPACITANCE (pF) 200 175 150 IC, (A) 125 100 75 50 25 0 0 5.0 10 15 20 25 30 35 0.01 0.10 1 VCE, (Vdc) 10 100 VCB, COLLECTOR BASE VOLTAGE (V) 1.00 Thermal Limits 0.10 10 1s
1 ms 10 ms 100 ms
Figure 16. Output Capacitance
Figure 17. Safe Operating Area
R(t), TRANSIENT THERMAL RESISTANCE
1000 D = 0.10 100 D = 0.20 10 D = 0.05 1 0.1 0.01 t1, TIME (Sec) D = 0.01 t1 Single Pulse t2 Duty Cycle = D = t1/t2 qJC = 174C/W D = 0.50 P(pk)
Figure 18. Normalized Thermal Response
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NUS5530MN
PACKAGE DIMENSIONS
DFN8 CASE 506AL-01 ISSUE A
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30mm. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L MILLIMETERS MIN NOM MAX 0.80 0.90 1.00 0.00 0.03 0.05 0.20 REF 0.35 0.40 0.45 3.30 BSC 0.95 1.05 1.15 3.30 BSC 1.80 1.90 2.00 0.80 BSC 0.21 --- --- 0.30 0.40 0.50
PIN ONE REFERENCE
E
2X
0.15 C
2X
0.15 C 0.10 C
8X
0.08 C
D2
8X
D2 1 4 e 2.95 1.20
2X
1
L
2X
E2
1.95
8X
K
8
5
8X
b 0.10 C A B 0.05 C
NOTE 3
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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CC CC CC CC CC CC CC CC
CC CC CC CC CC CC CC CC
EEEE EEEE EEEE
TOP VIEW
(A3)
A
SOLDERING FOOTPRINT*
SIDE VIEW
SEATING PLANE
A1
C
3.60
0.55
8X
0.45 0.80 PITCH
0.60
2X
NUS5530M N/D


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