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| FDMS3572 N-Channel UltraFET Trench(R) MOSFET February 2007 FDMS3572 N-Channel UltraFET Trench(R) MOSFET 80V, 22A, 16.5m Features General Description Max rDS(on) = 16.5m at VGS = 10V, ID = 8.8A Max rDS(on) = 24m at VGS = 6V, ID = 8.4A Typ Qg = 28nC at VGS = 10V Low Miller Charge Optimized efficiency at high frequencies RoHS Compliant tm UItraFET devices combine characteristics that enable benchmark efficiency in power conversion applications. Optimized for rDS(on), low ESR, low total and Miller gate charge, these devices are ideal for high frequency DC to DC converters. Application DC - DC Conversion Pin 1 S S S G D D D D D D D 5 6 7 8 4G 3S 2S 1S D Power 56 (Bottom view) MOSFET Maximum Ratings TA = 25C unless otherwise noted Symbol VDS VGS ID Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Package limited) -Continuous (Silicon limited) -Continuous -Pulsed PD TJ, TSTG Power Dissipation Power Dissipation TC = 25C TA = 25C (Note 1a) TC = 25C TC = 25C TA = 25C (Note 1a) Ratings 80 20 22 48 8.8 50 78 2.5 -55 to +150 W C A Units V V Operating and Storage Junction Temperature Range Thermal Characteristics RJC RJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1a) 1.6 50 C/W Package Marking and Ordering Information Device Marking FDMS3572 Device FDMS3572 Package Power 56 Reel Size 13'' Tape Width 12mm Quantity 3000 units (c)2007 Fairchild Semiconductor Corporation FDMS3572 Rev.C1 1 www.fairchildsemi.com FDMS3572 N-Channel UltraFET Trench(R) MOSFET Electrical Characteristics TJ = 25C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250A, VGS = 0V ID = 250A, referenced to 25C VDS = 64V, VGS = 0V VGS = 20V, VDS = 0V 80 76 1 100 V mV/C A nA On Characteristics VGS(th) VGS(th) TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = 250A ID = 250A, referenced to 25C VGS = 10V, ID = 8.8A VGS = 6V, ID = 8.4A VGS = 10V, ID = 8.8A, TJ = 125C VDS = 10V, ID = 8.8A 2 3.2 -11 13.5 18.3 22.2 23 16.5 24 29 S m 4 V mV/C Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 40V, VGS = 0V, f = 1MHz f = 1MHz 1870 275 78 1.3 2490 365 120 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge at 10V Gate to Source Gate Charge Gate to Drain "Miller" Charge VGS = 0V to 10V VDD = 40V ID = 8.8A VDD = 40V, ID = 8.8A VGS = 10V, RGEN = 6 11 13 24 12 28 9 8 20 24 39 22 40 ns ns ns ns nC nC nC Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 8.8A (Note 2) 0.8 43 71 1.2 65 107 V ns nC IF = 8.8A, di/dt = 100A/s Notes: 1: RJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RCA is determined by the user's board design. a. 50C/W when mounted on a 1 in2 pad of 2 oz copper b. 125C/W when mounted on a minimum pad of 2 oz copper 2: Pulse Test: Pulse Width < 300s, Duty cycle < 2.0%. FDMS3572 Rev.C1 2 www.fairchildsemi.com FDMS3572 N-Channel UltraFET Trench(R) MOSFET Typical Characteristics TJ = 25C unless otherwise noted 60 50 ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10V VGS = 8V VGS = 6V PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX 3.5 3.0 2.5 2.0 1.5 1.0 VGS = 10V VGS = 5V PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX 40 30 20 10 0 0 VGS = 5V VGS = 6V VGS = 8V 1 2 3 VDS, DRAIN TO SOURCE VOLTAGE (V) 4 0.5 0 10 20 30 40 ID, DRAIN CURRENT(A) 50 60 Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 50 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (m) PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -75 ID = 8.8A VGS = 10V 40 TJ = 150oC 30 ID = 9A 20 TJ = 25oC -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 10 4 5 6 7 8 9 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. Normalized On Resistance vs Junction Temperature 50 IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance vs Gate to Source Voltage 100 ID, DRAIN CURRENT (A) 40 30 20 PULSE DURATION = 80s DUTY CYCLE = 0.5%MAX VGS = 0V 10 1 0.1 0.01 1E-3 0.0 TJ = 150oC TJ = 25oC TJ = 150oC TJ = 25oC TJ = -55oC 10 0 TJ = -55oC 2 4 5 6 VGS, GATE TO SOURCE VOLTAGE (V) 3 7 0.2 0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current FDMS3572 Rev.C1 3 www.fairchildsemi.com FDMS3572 N-Channel UltraFET Trench(R) MOSFET Typical Characteristics TJ = 25C unless otherwise noted VGS, GATE TO SOURCE VOLTAGE(V) 10 VDD = 30V 4000 Ciss 8 CAPACITANCE (pF) VDD = 40V VDD = 50V 1000 Coss 6 4 2 0 100 0 10 20 Qg, GATE CHARGE(nC) 30 f = 1MHz VGS = 0V Crss 50 0.1 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 100 Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 50 ID, DRAIN CURRENT (A) 40 VGS = 10V IAS, AVALANCHE CURRENT(A) 10 9 8 7 6 5 4 3 2 TJ = 125oC TJ = 25oC 30 VGS = 6V 20 Limited by Package 10 RJC = 1.6 C/W o 1 0.01 0.1 1 10 tAV, TIME IN AVALANCHE(ms) 100 0 25 50 75 100 o 125 150 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 50 ID, DRAIN CURRENT (A) Figure 10. Maximum Continuous Drain Current vs Case Temperature 2000 1000 VGS = 10V 100us 1ms 10ms 100ms P(PK), PEAK TRANSIENT POWER (W) 10 1 0.1 0.01 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(on) SINGLE PULSE TJ = MAX RATED TA = 25OC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: I = I25 150 - T A ---------------------125 TA = 25oC 100 1s 10s DC 10 1 0.3 -3 10 SINGLE PULSE -2 -1 0 1 2 3 1E-3 0.1 1 10 100 300 10 VDS, DRAIN to SOURCE VOLTAGE (V) 10 10 10 t, PULSE WIDTH (s) 10 10 Figure 11. Forward Bias Safe Operating Area Figure 12. Single Pulse Maximum Power Dissipation FDMS3572 Rev.C1 4 www.fairchildsemi.com FDMS3572 N-Channel UltraFET Trench(R) MOSFET Typical Characteristics TJ = 25C unless otherwise noted 2 1 NORMALIZED THERMAL IMPEDANCE, ZJA DUTY CYCLE-DESCENDING ORDER 0.1 0.01 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 1E-3 SINGLE PULSE t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA 1E-4 -3 10 10 -2 10 -1 10 0 10 1 10 2 10 3 t, RECTANGULAR PULSE DURATION (s) Figure 13. Transient Thermal Response Curve FDMS3572 Rev.C1 5 www.fairchildsemi.com FDMS3572 N-Channel UltraFET Trench(R) MOSFET FDMS3572 Rev.C1 6 www.fairchildsemi.com FDMS3572 N-Channel UItraFET Trench(R) MOSFET TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet SeriesTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM ACExTM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACT(R) FAST(R) FASTrTM FPSTM FRFETTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM ScalarPumpTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TCMTM TinyBoostTM TinyBuckTM TinyPWMTM TinyPowerTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHC(R) UniFETTM VCXTM WireTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production Rev. I22 FDMS3572 Rev. C1 7 www.fairchildsemi.com |
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