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HMD8M32F4E
32Mbyte(8Mx32) EDO Mode 4K Ref. 100Pin SMM, 5V Design Part No. HMD8M32F4E
GENERAL DESCRIPTION
The HMD8M32F4E is a 8M x 32bit dynamic RAM high density memory module. The module consists of four CMOS 4M x 16 bit DRAMs in 50-pin TSOP packages mounted on a 100-pin, double-sided, FR-4-printed circuit board. A 0.1uF or 0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM components. The module is a single In-line memory module with edge connections and is intended for mounting in to 100-pin edge connector sockets. All module components may be powered from a single 5V DC power supply and all inputs and outputs are TTL-compatible.
FEATURES
w Access times : 50, 60ns w High-density 32MByte design w Single +5V 0.5V power supply w JEDEC Standard pinout w EDO mode operation w TTL compatible inputs and outputs w FR4-PCB design OPTIONS w Timing 50ns access 60ns access w Packages 100-pin SMM PERFORMANCE RANGE Speed 5 6 tRAC 50ns 60ns tCAC 13ns 15ns tRC 90ns 110ns tHPC 26ns 30ns F -5 -6 MARKING
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Symbol Vcc NC /RAS0 /RAS1 DQ15 DQ14 DQ13 Vss DQ12 DQ11 DQ10 DQ8 Vss DQ6 DQ4 DQ3 DQ2 Vss DQ1 DQ0 A0 A1 A2 A3 Vcc
PIN ASSIGNMENT
P1
PIN 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Symbol Vcc /CAS0 /CAS1 NC NC NC NC Vss NC NC DQ9 DQ7 Vss DQ5 NC A11 A10 Vss A9 A8 A7 A6 A5 A4 Vcc PIN 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 Symbol Vcc NC /RAS2 /RAS3 DQ31 DQ30 DQ29 Vss NC /WE NC NC Vss NC NC DQ28 DQ27 Vss DQ26 DQ25 DQ24 DQ23 Vss NC Vcc
P2
PIN 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Symbol Vcc /CAS2 /CAS3 DQ22 DQ21 DQ20 DQ19 Vss DQ18 DQ17 DQ16 NC Vss NC NC NC NC Vss NC Vss NC NC Vss NC Vcc
100PIN SMM TOP VIEW
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FUNCTIONAL BLOCK DIAGRAM
HMD8M32F4E
U1
/RAS0 /RAS
/CAS0 /LCAS /CAS1
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ0-15 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
U3
/RAS /RAS1 /LCAS
/CAS0
/UCAS
/UCAS DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 /W /CAS1 /OE
/OE
/W
A0-A11
A0-A11
U2
/RAS /RAS3
/CAS2
/LCAS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ16-31 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
U4
/RAS /RAS2 /LCAS /CAS2 /UCAS
/CAS3
/UCAS
/OE
DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 /W
/CAS3
/OE
/W
A0-A11
A0-A11
/WE A0-A11
Vcc Vss
0.1uF or Capacitor for each DRAM 0.22uF To all DRAMs
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ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage on Any Pin Relative to Vss Voltage on Vcc Supply Relative to Vss Power Dissipation Storage Temperature Short Circuit Output Current SYMBOL VIN ,OUT Vcc PD TSTG IOS
HMD8M32F4E
RATING -1V to 7.0V -1V to 7.0V 4W -55oC to 150oC 50mA
w Permanent device damage may occur if " Absolute Maximum Ratings" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
( Voltage reference to VSS, TA=0 to 70 o C ) PARAMETER Supply Voltage Ground Input High Voltage Input Low Voltage SYMBOL Vcc Vss VIH VIL MIN 4.5 0 2.4 -1.0 TYP. 5.0 0 MAX 5.5 0 Vcc+1 0.8 UNIT V V V V
DC AND OPERATING CHARACTERISTICS
SYMBOL ICC1 ICC2 ICC3 SPEED -5 -6 Don't care -5 -6 ICC4 -5 -6 ICC5 ICC6 Don't care -5 -6 Il(L) IO(L) VOH VOL ICC1 : Operating Current * (/RAS , /CAS , Address cycling @t RC=min.) ICC2 : Standby Current ( /RAS=/CAS=VIH ) ICC3 : /RAS Only Refresh Current * ( /CAS=V IH, /RAS, Address cycling @tRC=min ) ICC4 : Fast Page Mode Current * (/RAS=VIL, /CAS, Address cycling @tPC=min ) MIN -80 -10 2.4 MAX 816 736 32 816 736 896 816 16 816 736 80 10 0.4 UNITS mA mA mA mA mA mA mA mA mA mA A A V V
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ICC5 : Standby Current (/RAS=/CAS=Vcc-0.2V ) ICC6 : /CAS-Before-/RAS Refresh Current * (/RAS and /CAS cycling @t RC=min ) IIL : Input Leakage Current (Any input 0V VIN 6.5V, all other pins not under test = 0V) IOL : Output Leakage Current (Data out is disabled, 0V VOUT 5.5V VOH : Output High Voltage Level (IOH= -5mA ) VOL : Output Low Voltage Level (IOL = 4.2mA )
HMD8M32F4E
* NOTE: ICC1, ICC3, ICC4 and ICC6 are dependent on output loading and cycle rates. Specified values are obtained with the output open. ICC is specified as an average current. In ICC1 and ICC3, address cad be changed maximum once while /RAS=VIL. In ICC4, address can be changed maximum once within one page mode cycle.
CAPACITANCE
( TA=25 C, Vcc = 5V, f = 1Mz ) SYMBOL CIN1 C IN2 CIN3 CIN4 CDQ1
o
o
DESCRIPTION Input Capacitance (A0-A11) Input Capacitance (/WE) Input Capacitance (/RAS0-/RAS3) Input Capacitance (/CAS0-/CAS3) Input/Output Capacitance (DQ0-31)
MIN -
MAX 100 130 40 30 20
UNITS pF pF pF pF pF
AC CHARACTERISTICS
( 0 C TA 70oC , Vcc = 5V10%, See notes 1,2.) -5 -6 MAX MIN 110 50 13 25 3 3 2 30 50 13 38 8 20 15 5 0 10 0 10K 37 25 10 20 15 5 0 10 0 10K 60 13 50 3 3 2 13 50 40 10K 15 45 10K 45 30 60 15 30 MAX UNIT ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
STANDARD OPERATION Random read or write cycle time Access time from /RAS Access time from /CAS Access time from column address /CAS to output in Low-Z Output buffer turn-off delay Transition time (rise and fall) /RAS precharge time /RAS pulse width /RAS hold time /CAS hold time /CAS pulse width /RAS to /CAS delay time /RAS to column address delay time /CAS to /RAS precharge time Row address set-up time Row address hold time Column address set-up time
SYMBOL tRC tRAC tCAC tAA tCLZ tOFF tT tRP tRAS tRSH tCSH tCAS tRCD tRAD tCRP tASR tRAH tASC
MIN 90
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Column address hold time Column Address to /RAS lead time Read command set-up time Read command hold referenced to /CAS Read command hold referenced to /RAS Write command hold time Write command hold referenced to /RAS Write command pulse width Write command to /RAS lead time Write command to /CAS lead time Data-in set-up time Data-in hold time Refresh period Write command set-up time /CAS setup time (C-B-R refresh) /CAS hold time (C-B-R refresh) /RAS precharge to /CAS hold time Access time from /CAS precharge /CAS precharge time (Fast page) /RAS pulse width (Fast page ) /W to /RAS precharge time (C-B-R refresh) tCAH tRAL tRCS tRCH tRRH tWCH tWCR tWP tRWL tCWL tDS tDH tREF tWCS tCSR tCHR tRPC tCPA tCP tRASP tWRP 8 50 10 200K 0 5 10 5 30 10 60 10 8 25 0 0 0 10 50 10 13 8 0 8 64 0 5 10 5 10 30 0 0 0 10 55 10 10 10 0 10
HMD8M32F4E
ns ns ns ns ns ns ns ns ns ns ns ns 64 ns ns ns ns ns 35 ns ns 200K ns ns
/W to /RAS hold time (C-B-R refresh) tWRH 10 10 ns NOTES 1. An initial pause of 200s is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles before proper device operation is achieved. 2. VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Transition times are measured between VIH(min) and VIL(max) and are assumed to be 5ns for all inputs. 3. Measured with a load equivalent to 1TTL loads and 100pF 4. Operation within the tRCD(max) limit insures that tRAC(max) can be met. tRCD(max) is specified as a reference point only. If tRCD is greater than the specified tRCD(max) limit, then access time is controlled exclusively by t CAC. 5. Assumes that tRCD tRCD(max) 6. tAR, tWCR, tDHR are referenced to tRAD(max) 7. This parameter defines the time at which the output achieves the open circuit condition and is not referenced to VOH or VOL. 8. tWCS, tRWD, tCWD and tAWD are non restrictive operating parameter. They are included in the data sheet as electrical characteristic only. If t WCS tWCS(min) the cycle is an early write cycle and the data out pin will remain high impedance for the duration of the cycle. 9. Either tRCH or tRRH must be satisfied for a read cycle. 10. These parameters are referenced to the /CAS leading edge in early write cycles and to the /W leading edge in readwrite cycles. 11. Operation within the tRAD(max) limit insures that tRAC(max) can be met. tRAD(max) is specified as a reference point only. If tRAD is greater than the specified tRAD(max) limit. then access time is controlled by t AA.
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PACKAGING INFORMATION
HMD8M32F4E
1.2 0.08 mm
ORDERING INFORMATION
Part Number Density Org. Package Component Number 4EA 4EA Vcc MODE SPEED
HMD8M32F4E- 5 HMD8M32F4E- 6
32MByte 32MByte
x 32 x 32
100 Pin-SMM 100 Pin-SMM
5.0V 5.0V
EDO EDO
50ns 60ns
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