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AGC Transimpedance Amplifier SONET OC-12 PRELIMINARY DATA SHEET-Rev 4 FEATURES * * * * * Single +5 Volt Supply Automatic Gain Control -32 dBm Sensitivity 0 dBm Optical Overload 550 MHz Bandwidth ATA06211 APPLICATIONS * * * * * SONET OC-12 /SDH STM-4 (622Mb/s) Receiver FITL BISDN Workstation Interconnects Low Noise RF Amplifier D1 PRODUCT DESCRIPTION The ANADIGICS ATA06211 is a 5V low noise transimpedance amplifier with AGC designed to be used in OC-12/STM-4 fiber optic links. The device is used in conjunction with a photodetector (PIN diode or avalanche photodiode) to convert an optical signal VDD1 into an output voltage. The ATA06211 offers a bandwidth of 550MHz and a dynamic range of 32dB. It is manufactured in a GaAs MESFET process and is available in bare die form. VDD2 AGC 19 K 70K + 4pF IIN GND or neg.supply CAGC - 35 VGA + 0.8 VOUT GND US PATENT CBY Photodector cathode must be connected to IIN for proper AGC operation Iin Figure 1: Equivalent Circuit 08/2001 ATA06211 Figure 2: Bonding Pad Layout Table 1: ATA06211D1C Pad Description PAD V DD1 V DD2 IIN VOUT C AGC C BY D ESC R IPTION V DD1 V DD2 TIA Input C urrent TIA Output Voltage External AGC C apaci tor Input Gai n Stage Bypass C apaci tor C OMMEN T Posi ti ve supply for i nput gai n stage Posi ti ve supply for second gai n stage C onnect detector cathode for proper operati on Requi res external D C block 70K* C AGC = AGC Ti me C onstant >56 pF ELECTRICAL CHARACTERISTICS Table 2: Absolute Maximum Ratings V DD1 V DD2 IIN TA TS 7.0 V 7.0 V 5 mA Operati ng Temp. - 40 C to 125 C Storage Temp. - 65 C to 150 C Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. 2 PRELIMINARY DATA SHEET - Rev 4 08/2001 ATA06211 Table 3: Electrical Specifications (1) (TA = 25C, VDD =+5.0V + 10%, CDIODE + CSTRAY = 0.5 pF, Det. cathode to IIN) PAR AMETER Transresi stance (RL= ,IDC<500nA) Transresi stance (RL=50 W ) Bandwi dth -3dB Input Resi stance (2) Output Resi stance Supply C urrent Input Offset Voltage Output Offset Voltage AGC Threshold (IIN) Opti cal Overload (4) (3) (1) MIN 2.5 500 30 15 1.4 60 -3 (6) TYP 6 3 550 280 50 30 1.6 1.8 100 0 50 16 1 MAX U N IT KW KW MHz W 60 45 1.9 W mA Volts Volts mA dB m 60 nA m se c Input Noi se C urrent (5) AGC Ti me C onstant Offset Voltage D ri ft Opti cal Sensi ti vi ty (7) Operati ng Voltage Range Operati ng Temperature Range -31 + 4.5 - 40 mV/ C dB m + 6.0 85 Volts C -32 + 5.0 Notes: 1. f = 50MHz 2. Measured with Iin below AGC Threshold. During AGC, input impedance will decrease proportionally to Iin. 3. Defined as the Iin where Transresistance has decreased by 50%. 4. See note on Indirect Measurement of Optical Overload. 5. See note on Measurement of Input Referred Noise Current. 6. CAGC = 220 pF 7. Parameter is guaranteed (not tested) by design and characterization data @622 Mb/s, assuming dectector responsivity of 0.9. PRELIMINARY DATA SHEET - Rev 4 08/2001 3 ATA06211 APPLICATION INFORMATION VDD 56pF 56pF ATA06211D1C Bonding Pads VDD2 VDD1 925 um GND GND 1992 GND 7I IIN GND GND GND GND CBY CBY GND CAGC PIN VOUT OUT GND 1250 um 56pF 56pF Figure 3: Typical Bonding Diagram Power Supplies and General Layout Considerations The ATA06211D1C may be operated from a positive supply as low as + 4.5 V and as high as + 6.0 V. Below + 4.5 V, bandwidth, overload and sensitivity will degrade, while at + 6.0 V, bandwidth, overload and sensitivity improve (see Bandwidth vs. Temperature curves). Use of surface mount (preferably MIM type capacitors), low inductance power supply bypass capacitors (>=56pF) are essential for good high frequency and low noise performance. The power supply bypass capacitors should be mounted on or connected to a good low inductance ground plane. General Layout Considerations Since the gain stages of the transimpedance amplifier have an open loop bandwidth in excess of 1.0 GHz, it is essential to maintain good high frequency layout practices. To prevent oscillations, a low inductance RF ground plane should be made the utmost care should available for power supply bypassing. Traces that can be made short should be made short, and be taken to maintain very low capacitance at the photodiode-TIA interface (IIN), as excess capacitance at this node will cause a 4 degradation in bandwidth and sensitivity (see Bandwidth vs. CT curves). C T = 0.5 pF 0.90 Bandwidth (MHz) 0.80 0.70 0.60 0.50 0.40 -40 V = 5.5 V DD V = 5.0 V DD V = 4.5 V DD 10 60 85 Temperature (O C) Figure 4: Bandwidth vs. Temperature Note: All performance curves are typical @ TA =25 C unless otherwise noted. PRELIMINARY DATA SHEET - Rev 4 08/2001 ATA06211 900 Bandwith (MHz) 800 700 600 500 400 300 0 0 .2 B(3dB) A / 2 Rf (Cin +Ct) 1.2 VDD = 5.5 V VDD = 5.0 V VDD = 4.5 V 0 .4 0 .6 0 .8 1 .0 1 .2 1 .4 1 .6 VDD = 5.5 V 1.0 0.9 0.8 VDD = 4.5 V IIN 50 0.7 0.6 0.5 CT (pF) Figure 5: Bandwidth vs. CT IIN Connection (Refer to the equivalent circuit diagram.) Bonding the detector cathode to IIN (and thus drawing current from the ATA06211) improves the dynamic range. Although the detector may be used in the reverse direction for input currents not exceeding 25 mA, the specifications for optical overload will not be met. 2.1 - 1.6 - 1.1 IIN (mA DC) - 0.6 - 0.1 Figure 7: Bandwidth vs. IIN VOUT Connection The output pad should be connected via a coupling capacitor to the next stage of the receiver channel (filter or decision circuits), as the output buffers are not designed to drive a DC coupled 50 ohm load (this would require an output bias current of approximately 36 mA to maintain a quiescent 1.8 Volts across the output load). If VOUT is connected to a high input impedance decision circuit (>500 ohms), then a coupling capacitor may not be required, although caution should be exercised since DC offsets of the photo detector/TIA combination may cause clipping of subsequent gain or decision circuits. 5 Rf 4 50 I IIN 3 2 Transimpedance (K Ohm) VDD = 5.5 V 1 VDD = 4.5 V heavy AGC Output Collapse VDD =5.5 V Linear Region -2.1 - 1.6 -1.1 - 0.6 - 0.1 Rf IIN VOUT IIN (mA DC) Figure 6: Transimpedance vs. IIN VDD=4.5 V -4 -3 -2 -1 3.4 3.2 3.0 2.9 2.7 2.5 2.4 2.2 2.0 1.9 1.7 1.5 1.4 1.2 1.0 0.8 0.7 0.5 0.3 0.2 0.0 IIN(mA DC) Figure 8: VOUT vs. IIN VOUT(Volts) 5 PRELIMINARY DATA SHEET - Rev 4 08/2001 BANDWIDTH (MHz) 1.1 ATA06211 1.9 1.85 1.8 1.75 1.7 1.65 1.6 1.55 1.5 - 40 Input Offset Voltage VDD = 5.5 V VDD = 5.0V (see VOUT vs IIN figure) from the TIA and determining the point of output voltage collapse. Also the input node virtual ground during heavy AGC is checked to verify that the linearity (i.e. pulse width distortion) of the amplifier has not been compromised. Measurement of Input Referred Noise Current The Input Noise Current is directly related to sensitivity . It can be defined as the output noise voltage (Vout), with no input signal, (including a 450 MHz lowpass filter at the output of the TIA) divided by the AC transresistance. VDD = 4.5V 10 60 Temperature (OC) Hz 7.5 6.5 5.5 4.5 3.5 2.5 1.5 - 0.1 1 10 100 CT =0.5pF 1000 CT Figure 9: Input Offset Voltage vs. Temperature CBY Connection The CBY pad must be connected via a low inductance path to a surface mount capacitor of at least 56pF (additional capacitance can be added in parallel with the 56 pF or 220 pF capacitors to improve low frequency response and noise performance). Referring to the equivalent circuit diagram and the typical bonding diagram, it is critical that the connection from CBY to the bypass capacitor use two bond wires for low inductance, since any high frequency impedance at this node will be fed back to the open loop amplifier with a resulting loss of transimpedance bandwidth. Two pads are provided for this purpose Sensitivity and Bandwidth In order to guarantee sensitivity and bandwidth performance, the TIA is subjected to a comprehensive series of tests at the die sort level (100% testing at 25 oC) to verify the DC parametric performance and the high frequency performance (i.e. adequate |S21|) of the amplifier. Acceptably high |S21| of the internal gain stages will ensure low amplifier input capacitance and hence low input referred noise current. Transimpedance sensitivity and bandwidth are then guaranteed by design and correlation with RF and DC die sort test results. Indirect Measurement of Optical Overload Optical overload can be defined as the maximum optical power above which the BER (bit error rate) increases beyond 1 error in 10 10 bits. The ATA06211D1C is 100% tested at die sort by a DC measurement which has excellent correlation with an PRBS optical overload measurement. The measurement consists of sinking a negative current 6 Rf 50 pA/ CT=1.0pF Frequency (MHz) Figure 10: Input Referred Noise Spectral Density Input Referred Noise in (nA RMS) Input referred noise test circuit 70 25dB VDD = 4.5 V 400 MHz LPF 60 58 54 50 46 42 -40 0.5pF TIA VDD = 5.5V (dBm) = 10 LOG 6500in R 80 0 40 O Temperature ( C) FIgure 11: Input Referred Noise vs Temperature PRELIMINARY DATA SHEET - Rev 4 08/2001 ATA06211 AGC Capacitor It is important to select an external AGC capacitor of high quality and appropriate size. The ATA06211D1C has an on-chip 70 KW resistor with a shunt 4 pF capacitor to ground. Without external capacitance the chip will provide an AGC time constant of 280 nS. For the best performance in a typical 622 MB/s SONET receiver, a minimum AGC capacitor of 56pF is recommended. This will provide the minimum amount of protection against pattern sensitivity and pulse width distortion on repetitive data sequences during high average optical power conditions. Conservative design practices should be followed when selecting an AGC capacitor, since unit to unit variability of the internal time constant and various data conditions can lead to data errors if the chosen value is too small. Phase Response At frequencies below the 3dB bandwidth of the device, the transimpedance phase response is characteristic of a single pole transfer function (as shown in the Phase vs Frequency curve). The output impedance is essentially resistive up to 1000 MHz. 180 Degrees 200 Rf 220 240 IIN 0.5pF VOUT 50 100 150 Frequency (MHz) Figure 12: Phase (IIN to VOUT) PRELIMINARY DATA SHEET - Rev 4 08/2001 7 ATA06211 ORDERING INFORMATION PAR T N U MB ER ATA06211D 1C PAC K AGE OPTION D 1C PAC K AGE D ESC R IPTION Die ANADIGICS, Inc. 141 Mount Bethel Road Warren, New Jersey 07059, U.S.A Tel: +1 (908) 668-5000 Fax: +1 (908) 668-5132 http://www.anadigics.com Mktg@anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to change prior to a products formal introduction. Information in Data Sheets have been carefully checked and are assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. WARNING ANADIGICS products are not intended for use in life support appliances, devices, or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. 8 PRELIMINARY DATA SHEET - Rev 4 08/2001 |
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