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INTEGRATED CIRCUITS
74F280B 9-bit odd/even parity generator/checker
Product specification IC15 Data Handbook 1996 Mar 12
Philips Semiconductors
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
FEATURES
* High-impedance NPN base inputs for reduced loading
(20A in Low and High states)
PIN CONFIGURATION
I6 I7 NC I8 E O GND 1 2 3 4 5 6 7 14 VCC 13 I5 12 I4 11 I3
* Buffered inputs -- one normalized load * Word length easily expanded by cascading * Industrial temperature range available (-40C to +85C)
DESCRIPTION
The 74F280B is a 9-bit Parity Generator or Checker commonly used to detect errors in high speed data transmission or data retrieval systems. Both Even (E) and Odd (O) parity outputs are available for generating or checking even or odd parity on up to 9 bits. The Even (E) parity output is High when an even number of Data inputs (I0 - I8) are High. The Odd (O) parity output is High when an odd number of Data inputs are High. Expansion to larger word sizes is accomplished by tying the Even (E) outputs of up to nine parallel devices to the data inputs of the final stage. This expansion scheme allows an 81-bit data word to be checked in less than 20ns. TYPE 74F280B
10 I2 9 8 I1 I0
SF00849
TYPICAL PROPAGATION DELAY 5.5ns
TYPICAL SUPPLY CURRENT (TOTAL) 26mA
ORDERING INFORMATION
DESCRIPTION 14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C N74F280BN N74F280BD INDUSTRIAL RANGE VCC = 5V 10%, Tamb = -40C to +85C I74F280BN I74F280BD PKG. DWG. # SOT27-1 SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS I0 - I8 E , O DESCRIPTION Data inputs Parity outputs 74F(U.L.) HIGH/LOW 1.0/0.033 50/33 LOAD VALUE HIGH/LOW 20A/20A 1.0mA/20mA
NOTE: One (1.0) FAST Unit Load is defined as: 20A in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
8
9
10 11 12 13
1
2
4
8 9
2K
I0
I1
I2
I3
I4
I5
I6
I7
I8
10 11 12 E 5
E
O
13 1 2 O 6
5
6
4 VCC=Pin 14 GND=Pin 7
SF00845
SF00846
1996 Mar 12
2
853-0363 16555
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
LOGIC DIAGRAM
8
I0 I1
9
I2
10
5
E
I3 I4
11
12
I5
13
6
O
I6 I7
1
2
I8 VCC=Pin 14 GND=Pin 7
4
SF00847
FUNCTION TABLE
INPUTS Number of High Data Inputs (I0 - I8) Even -- 0, 2, 4, 6, 8 Odd -- 1, 3, 5, 7, 9 H = High voltage level L = Low voltage level OUTPUTS E H L O L H
1996 Mar 12
3
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
ABSOLUTE MAXIMUM RATINGS
SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range free air Storage temperature Commercial range Industrial range PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to VCC 40 0 to +70 -40 to +85 -65 to +150 UNIT V V mA V mA C C C
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range free air Commercial range Industrial range 0 -40 PARAMETER LIMITS Min 4.5 2.0 0.8 -18 -1 20 70 85 Nom 5.0 Max 5.5 UNIT V V V mA mA mA C C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS1 VCC = MIN, VIL = MAX VIH = MIN, IOH = MAX Low-level Low level output voltage Input clamp voltage Input current at maximum input voltage Commercial range IIH IIL IOS ICC High-level High level input current Industrial range Low-level input current Short-circuit output current3 VCC = MAX, VI = 2 7V MAX 2.7V VCC = MAX, VI = 0.5V VCC = MAX VCC = MAX -60 26 VCC = MIN, VIL = MAX VIH = MIN, IOL = MAX VCC = MIN, II = IIK VCC = 0.0V, VI = 7.0V 10%VCC 5%VCC 10%VCC 5%VCC LIMITS MIN 2.5 V 2.7 3.4 0.35 0.35 -0.73 0.50 V 0.50 -1.2 100 20 40 -20 -150 35 V A A A A mA mA TYP2 MAX UNIT
VO OH
High-level High level output voltage
VO OL VIK II
Supply current (total)
NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.
1996 Mar 12
4
Philips Semiconductors
Product specification
9-bit odd/even parity generator/checker
74F280B
AC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb= +25C VCC = +5 V +5.V CL = 50pF, RL = 500 Min tPLH tPHL tPLH tPHL Propagation delay I0 - I8 to E Propagation delay I0 - I8 to O Waveform 1, 2 74F280B Waveform 1, 2 4.0 4.0 4.0 4.0 Typ 6.5 7.0 6.5 7.0 Max 9.0 10.0 9.0 10.0 Tamb = 0C to +70C VCC = +5.V 10% +5 V CL = 50pF, RL = 500 Min 3.5 3.5 3.5 3.5 Max 10.0 11.1 10.0 11.0 Tamb = -40C to +85C VCC = +5.V 10% +5 V CL = 50pF, RL = 500 Min 3.0 3.5 3.0 3.5 Max 11.0 12.0 11.0 12.0 ns ns ns ns UNIT
AC WAVEFORMS
For all waveforms, VM=1.5V.
VM VM VM VM
I0 - I8
I0 - I8
tPHL E, O
tPLH
tPLH
tPHL
VM
VM
E, O
VM
VM
SF00848
SF00850
Waveform 1.
Propagation Delay for Inverting Outputs
Waveform 2.
Propagation Delay for Non-Inverting Outputs
TEST CIRCUIT AND WAVEFORM
VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V)
tTLH (tr ) 90% POSITIVE PULSE VM 10% tw
tTHL (tf ) AMP (V) 90% VM 10% 0V
Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00006
1996 Mar 12
5
Philips Semiconductors
Product specification
9-bit parity odd/even parity generator/checker
74F280B
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
1996 Mar 12
6
Philips Semiconductors
Product specification
9-bit parity odd/even parity generator/checker
74F280B
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
1996 Mar 12
7
Philips Semiconductors
Product specification
9-bit parity odd/even parity generator/checker
74F280B
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. Date of release: 12-99 Document order number: 9397 750 06706
Philips Semiconductors
1996 Mar 12 8
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