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| Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope using 'trench' technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in DC-DC converters and general purpose switching applications. PHP21N06T QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V MAX. 55 21 69 175 75 UNIT V A W C m PINNING - TO220AB PIN 1 2 3 tab gate drain source drain DESCRIPTION PIN CONFIGURATION tab SYMBOL d g s 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR VGS ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 k Tmb = 25 C Tmb = 100 C Tmb = 25 C Tmb = 25 C MIN. - 55 MAX. 55 55 20 21 14.7 84 69 175 UNIT V V V A A A W C ESD LIMITING VALUE SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage, all pins CONDITIONS Human body model (100 pF, 1.5 k) MIN. MAX. 2 UNIT kV THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS in free air TYP. 60 MAX. 2.18 UNIT K/W K/W December 1997 1 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET STATIC CHARACTERISTICS Tj= 25C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS V(BR)GSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55C VDS = VGS; ID = 1 mA Tj = 175C Tj = -55C VDS = 55 V; VGS = 0 V; VGS = 10 V; VDS = 0 V Tj = 175C Tj = 175C Tj = 175C MIN. 55 50 2.0 1.0 16 TYP. 3.0 0.05 0.04 60 - PHP21N06T MAX. 4.0 4.4 10 500 1 20 75 157 UNIT V V V V A A A A V m m Gate source breakdown voltage IG = 1 mA; Drain-source on-state VGS = 10 V; ID = 10 A resistance DYNAMIC CHARACTERISTICS Tmb = 25C unless otherwise specified SYMBOL gfs Qg(tot) Qgs Qgd Ciss Coss Crss td on tr td off tf Ld Ld Ls PARAMETER Forward transconductance Total gate charge Gate-source charge Gate-drain (Miller) charge Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance CONDITIONS VDS = 25 V; ID = 10 A ID = 20 A; VDD = 44 V; VGS = 10 V MIN. 1 TYP. 13 4 5 365 110 60 9 16 14 13 3.5 4.5 7.5 MAX. 500 135 85 14 21 25 20 UNIT S nC nC nC pF pF pF ns ns ns ns nH nH nH VGS = 0 V; VDS = 25 V; f = 1 MHz VDD = 30 V; ID = 10 A; VGS = 10 V; RG = 10 Resistive load Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 19.7 A; VGS = 0 V IF = 19.7 A; -dIF/dt = 100 A/s; VGS = -10 V; VR = 30 V TYP. 0.95 32 0.12 MAX. 21 84 1.2 UNIT A A V ns C December 1997 2 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET AVALANCHE LIMITING VALUE SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 10 A; VDD 25 V; VGS = 10 V; RGS = 50 ; Tmb = 25 C MIN. TYP. - PHP21N06T MAX. 30 UNIT mJ December 1997 3 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET PHP21N06T 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 10 Zth/ (K/W) 1 0.5 0.2 0.1 0.05 P D tp D= tp T t 0.1 0.02 T 0 0 20 40 60 80 100 Tmb / C 120 140 160 180 0.01 1.0E-06 0.0001 t/s 0.01 1 100 Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 C = f(Tmb) ID% Normalised Current Derating Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T 50 16 ID/A 40 10.0 9.5 9.0 8.5 8.0 7.5 7.0 20 6.5 6.0 10 5.5 5.0 4.5 4.0 14 12 VGS/V = 120 110 100 90 80 70 60 50 40 30 20 10 0 30 0 20 40 60 80 100 Tmb / C 120 140 160 180 0 0 2 4 VDS/V 6 8 10 Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 C = f(Tmb); conditions: VGS 10 V 100 Fig.5. Typical output characteristics, Tj = 25 C. ID = f(VDS); parameter VGS RDS(ON)/mOhm VGS/V = 6 6.5 100 120 tp = 1 us RDS(ON) = VDS/ID 10us ID/A 110 7 8 9 10 90 10 100 us 80 70 DC 1 ms 10ms 100ms 1 10 60 50 1 VDS/V 100 0 5 10 ID/A 15 20 25 30 Fig.3. Safe operating area. Tmb = 25 C ID & IDM = f(VDS); IDM single pulse; parameter tp Fig.6. Typical on-state resistance, Tj = 25 C. RDS(ON) = f(ID); parameter VGS December 1997 4 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET PHP21N06T 25 ID/A 20 5 VGS(TO) / V max. BUK759-60 4 typ. 15 3 min. 10 2 5 Tj/C = 0 175 25 1 0 1 2 3 4 5 VGS/V 6 7 8 9 0 -100 -50 0 50 Tj / C 100 150 200 Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj 9 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Sub-Threshold Conduction gfs/S 8 7 6 5 1E-01 1E-02 2% typ 98% 1E-03 1E-04 4 3 2 1E-05 0 5 10 ID/A 15 20 25 1E-06 0 1 2 3 4 5 Fig.8. Typical transconductance, Tj = 25 C. gfs = f(ID); conditions: VDS = 25 V BUK959-60 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 C; VDS = VGS 1 .9 .8 2.5 a Rds(on) normlised to 25degC 2 Thousands pF .7 .6 .5 .4 .3 .2 .1 Ciss 1.5 1 0.5 -100 -50 0 50 Tmb / degC 100 150 200 0 0.01 0.1 1 VDS/V 10 Coss Crss 100 Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 10 A; VGS = 10 V Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz December 1997 5 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET PHP21N06T 12 VGS/V 10 VDS = 14V 8 VDS = 44V 6 120 110 100 90 80 70 60 50 40 30 20 WDSS% 4 2 10 0 20 40 60 80 100 120 Tmb / C 140 160 180 0 0 5 QG/nC 10 15 Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 20 A; parameter VDS 100 IF/A 80 Fig.15. Normalised avalanche energy rating. WDSS% = f(Tmb); conditions: ID = 17 A + L VDS VDD 60 Tj/C = 40 175 25 VGS 0 RGS T.U.T. -ID/100 20 R 01 shunt 0 0 0.5 VSDS/V 1 1.5 Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj Fig.16. Avalanche energy test circuit. 2 WDSS = 0.5 LID BVDSS /(BVDSS - VDD ) + RD VDS VGS 0 RG T.U.T. VDD - Fig.17. Switching test circuit. December 1997 6 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET MECHANICAL DATA Dimensions in mm Net Mass: 2 g PHP21N06T 4,5 max 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 2,54 2,54 0,9 max (3x) 0,6 2,4 Fig.18. SOT78 (TO220AB); pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for SOT78 (TO220) envelopes. 3. Epoxy meets UL94 V0 at 1/8". December 1997 7 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET DEFINITIONS Data sheet status Objective specification Product specification Limiting values PHP21N06T This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. December 1997 8 Rev 1.100 |
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