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M61539FP 6ch Electronic Volume with Tone Control REJ03F0112-0100Z Rev.1.0 Apr.16.2004 Description The M61539FP is 6ch electronic volume with tone control. M61539FP is easy to use more than M62446AFP. Features * 6ch Electronic volume Volume level: 0 to-95dB(1dB/step) * Tone control Bass/Treble:-14dB to +14dB(2dB/step) * Noise voltage: 1.5Vrms * Bypass mode is high quality sound. Recommended Operating Conditions * Supply voltage range: 4.5 to 7.5V (analog) 4.5 to 5.5V(digital) * Rated supply voltage: 7.0V(analog) 5.0V(digital) (Single supply voltage 9 to 12V) System Block Diagram C in SW in SL in SR in L R L in R in m- com interface volume volume volume volume Cout SWout SLout SRout Lout Rout tone volume volume LATCH DATA CLK Rev.1.0, Apr.16.2004, page 1 of 17 M61539FP Pin Configuration and IC Internal Block Diagram LATCH DGND DVDD DATA SWin AGND AVDD 30 GNDS SRin SLin GNDC Cin GNDR Rin GNDL Lin BYPASSR 31 32 33 34 35 36 37 38 39 29 28 27 26 CLK NC NC 25 24 23 22 21 20 19 SWout SRout SLout Cout Rout Lout AVSS CL1 CL2 CR1 MCU I/F volume volume volume volume 18 17 16 15 tone volume 14 13 12 tone volume 40 1 BYPASSL 11 7 RBASS2 2 LTRE 3 LBASS3 4 LBASS2 5 LBASS1 6 RBASS1 8 RBASS3 9 RTRE 10 CR2 Rev.1.0, Apr.16.2004, page 2 of 17 M61539FP Pin Description Pin No. 29 31 34 36 38 30 32 33 35 20 19 18 17 37 39 Symbol AVDD GNDS GNDC GNDR GNDL SWin SRin SLin Cin SWout SRout SLout Cout Rin Lin Tone INPUT Volume OUTPUT Volume INPUT GND Connect to analog GND Function Analog positive Power supply Circuit +7 V 30, 32, 33, 35 + 18 22K ( TYP) 20, 19, 18, 17 37, 39 + 70k ( TYP) 40, 1 + 40 1 15 16 2 9 BYPASSR BYPASSL Lout Rout LTRE RTRE L, R Volume INPUT in BYPASS mode L OUTPUT R OUTPUT Tone Treble cycle control 70 k ( TYP) 18 22k ( TYP) 15, 16 2, 9 3 8 4 7 5 6 10 12 11 13 15 16 14 21 22 LBASS3 RBASS3 LBASS2 RBASS2 LBASS1 RBASS1 CR2 CL2 CR1 CL1 Lout Rout AVSS AGND DGND Tone OUTPUT L, R Volume INPUT L OUTPUT R OUTPUT Analog negative Power Supply Analog GND Digital GND Tone Bass cycle control 2.3 k (TYP) 3, 8 + 4, 7 5, 6 10, 12 11, 13 + 70k ( TYP) 18 22k ( TYP) -7 V 15, 16 Rev.1.0, Apr.16.2004, page 3 of 17 M61539FP Pin No. 23 24 25 26 Symbol LATCH DATA CLK DVDD Function Latch INPUT Data INPUT Clock INPUT Forward data Digital Power supply Circuit 23, 24, 25 S +5 V INPUT: Schmitt trigger type Absolute Maximum Ratings Parameter Supply Voltage Power dissipation Thermal derating Operating temperature Storage temperature Symbol Vsupply Pd K Topr Tstg Ratings 16 7 1460 11.7 -20 to +75 -40 to +125 mW mW/C C C Unit V Condition AVDD-AVSS DVDD-DGND Ta25C Ta>25C THERMAL DERATINGS (MAXIMUM RATING) 2.0 POWER DISSIPATION pd [ W ] 1.5 1.46 W 1.0 0.88 0.5 0 0 25 50 75 100 125 150 AMBIENT TEMPERATURE Ta [ C ] Rev.1.0, Apr.16.2004, page 4 of 17 M61539FP Recommended DC Operating Conditions (Ta=25C, unless otherwise noted.) Parameter Analog positive Supply Voltage Analog negative Supply Voltage Digital Supply Voltage High-level Input Voltage Low-level Input Voltage Note: Symbol AVDD AVSS DVDD VIH VIL Min 4.5 -7.5 4.5 DVDDx0.7 DGND Typ 7.0 -7.0 5.0 Max 7.5 -4.5 5.5 DVDD DVDDx0.3 Unit V V V V V Condition 1. AVSSDGND H DATA L H CLOCK L H LATCH L Note: 1. Make LATCH "L" when CLOCK and DATA is inputted. 2. Make LATCH "H" when Reading in DATA. 3. CLOCK function at raising edges of pulse. D0 D1 DE DF D0 Rev.1.0, Apr.16.2004, page 5 of 17 M61539FP Data Timing (Recommended conditions) t cr 75% CLOCK 25% tf t WHC tf t WLC 75% DATA t SC 25% tr t SD t HD t SL tf tr t WHL 75% 25% tf LATCH 25% Digital Block Timing Regulation Limits Parameter CLOCK cycle time CLOCK pulse width ("H" level) CLOCK pulse width ("L" level) CLOCK, DATA, LATCH rise time CLOCK, DATA, LATCH fall time DATA setup time DATA hold time LATCH setup time LATCH pulse width CLOCK start time after LATCH Symbol tcr tWHC tWLC tr tf tSD tHD tSL tWHL tSC Min 8 3.2 3.2 1.6 1.6 2 3.2 3.2 Min Max 0.8 0.8 Unit sec Rev.1.0, Apr.16.2004, page 6 of 17 M61539FP Digital Control Specification Four kinds of input format options are available by changing slot settings of DE and DF. (When the IC is powered up, the internal settings are not fixed.) (1) D01 D11 D21 D31 D41 D51 D61 D71 D81 D91 DA1 DB1 DC1 DD1 TONE :0 BYPASS :1 DE DF TONE CONT TLEBLE 0 0 0 0 TONE CONT BASS 0 0 0 (2) D02 D12 D22 D32 D42 D52 D62 D72 D82 D92 DA2 DB2 DC2 DD2 DE DF VOLUME Lch VOLUME Rch 0 1 (3) D03 D13 D23 D33 D43 D53 D63 D73 D83 D93 DA3 DB3 DC3 DD3 DE DF VOLUME Cch VOLUME SWch 1 0 (4) D04 D14 D24 D34 D44 D54 D64 D74 D84 D94 DA4 DB4 DC4 DD4 DE DF VOLUME SLch VOLUME SRch 1 1 Rev.1.0, Apr.16.2004, page 7 of 17 M61539FP Setting Code (1) Tone control (bass / treble) Treble ATT Bass -14dB -12dB -10dB -8dB -6dB -4dB -2dB +0dB +2dB +4dB +6dB +8dB +10dB +12dB +14dB D01 D81 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D11 D91 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 D21 DA1 1 0 1 0 1 1 0 0 0 1 1 0 1 0 1 D31 DB1 1 1 0 0 1 0 1 0 1 0 1 0 0 1 1 (2) BYPASS control DD1 BYPASS TONE 1 0 Rev.1.0, Apr.16.2004, page 8 of 17 M61539FP (3)-1 Volume (0 to -39dB) ATT Volume 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB -16dB -17dB -18dB -19dB -20dB -21dB -22dB -23dB -24dB -25dB -26dB -27dB -28dB -29dB -30dB -31dB -32dB -33dB -34dB -35dB -36dB -37dB -38dB -39dB D0X D7X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D1X D8X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2X D9X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D3X DAX 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D4X DBX 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D5X DCX 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D6X DDX 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Note: Do not input other data than the above. Rev.1.0, Apr.16.2004, page 9 of 17 M61539FP (3)-2 Volume (-40 to -dB) ATT Volume -40dB -41dB -42dB -43dB -44dB -45dB -46dB -47dB -48dB -49dB -50dB -51dB -52dB -53dB -54dB -55dB -56dB -57dB -58dB -59dB -60dB -61dB -62dB -63dB -64dB -65dB -66dB -67dB -68dB -69dB -70dB -71dB -72dB -73dB -74dB -75dB -76dB -77dB -78dB -79dB -dB D0X D7X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D1X D8X 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D2X D9X 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D3X DAX 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 D4X DBX 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 D5X DCX 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 D6X DDX 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Note: Do not input other data than the above. Rev.1.0, Apr.16.2004, page 10 of 17 M61539FP (3)-3 Volume (-80 to -dB) - ATT Volume -dB -dB -dB D0X D7X 1 1 1 D1X D8X 0 0 0 D2X D9X 1 1 1 D3X DAX 0 0 0 D4X DBX 0 0 0 D5X DCX 0 1 1 D6X DDX 1 0 1 -dB -dB -80dB -81dB -82dB -83dB -84dB -85dB -86dB -87dB -88dB -89dB -90dB -91dB -92dB -93dB -94dB -95dB -dB -dB 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 -dB -dB 1 1 1 1 1 1 1 1 1 1 1 1 0 1 Rev.1.0, Apr.16.2004, page 11 of 17 M61539FP Electrical Characteristics (Ta = 25C, AVDD/AVSS/DVDD = 7/-7/5V, f = 1kHz unless otherwise noted. Rg = 1k, RL = 10k, TONE CONTROL*VOL are set to 0dB/FLAT.) (1) Power supply characteristics Limits Parameter Analog positive circuit current Analog negative circuit current Digital circuit current Symbol Aldd Alss Dldd Min typ 22 22 0.5 Max 35 35 2.0 Unit mA mA mA Condition Current at pin29 No signal Current at pin 14 No signal Current at pin 26 No signal (2) Input / Output characteristics Limits Parameter Input resistance Maximum output voltage Symbol Ri VOM Min 35 3.0 typ 70 4.2 Max 150 Unit k Vrms Condition 30, 32, 33, 35, 37, 39 pin 30, 32, 33, 35, 37, 39 pin INPUT 15 to 20pin OUTPUT THD = 1% Vi = 0.2Vrms, FLAT 30, 32, 33, 35, 37, 39 pin INPUT 15 to 20pin OUTPUT BW = 400 to 30 kHz, Vi = 0.2 Vrms, RL = 10 k 15 to 20pin, Rg = 0k, IHF-A, VOL = 0dB 15, 16pin IHF-A, VOL = 0dB 15 to 20pin IHF-A, VOL = -dB Pass gain Gv -2.0 0 2.0 dB Distortion Output noise voltage THD Vn (VOL) Vn (tone) -1.5 0.002 1.5 5 -100 0 -80 0.09 6 20 -95 1.5 -65 % Vrms Vrms dB dB dB Maximum attenuation Volume gain between channels Cross talk between channels ATTmax Dvol CT Vo = 0.5Vrms, RL=10k, IHF-A Rg = 1k Rev.1.0, Apr.16.2004, page 12 of 17 M61539FP (3) Tone control characteristics Limits Parameter Symbol T+14dB T+12dB T+10dB T+8dB T+6dB T+4dB Tone control voltage gain T+2dB T-2dB T-4dB T-6dB T-8dB T-10dB T-12dB T-14dB Balance between channel BALT Min 12 10 8 6 4.5 2.5 1 -3 -5.5 -7.5 -10 -12 -14 -16 -1.5 typ 14 12 10 8 6 4 2 -2 -4 -6 -8 -10 -12 -14 0 Max 16 14 12 10 7.5 5.5 3 -1 -2.5 -4.5 -6 -8 -10 -12 +1.5 Unit T+14dB T+12dB T+10dB T+8dB T+6dB T+4dB T+2dB T-2dB T-4dB T-6dB T-8dB T-10dB T-12dB T-14dB BALT Input37, 39pin Vo=0.2Vrms Output16, 15pin Condition Vo = 0.2 Vrms TREBLE (f = 10 kHz), BASS (f = 100 kHz) Voltage gain INPUT to pin 37, 39 OUTPUT from pin 16, 15 Rev.1.0, Apr.16.2004, page 13 of 17 M61539FP Test Circuit DVDD < TYP +5V > Vi30 (SW) AVDD < TYP +7V > 1K 22 22 30 31 29 28 27 26 25 24 DATA CLK 3.3 23 < SW > LATCH 22 21 20 19 3.3 10K 3.3 10K Vol19 Vol20 < SR > + Vi32 (SR) 1K Vi33 (SL) 1K 3.3 32 33 < C> < SL > + 3.3 70K S + 18 3.3 10K Vol18 34 Vi35 (C) 1K 3.3 + 17 T 3.3 10K Vol17 35 70K 16 15 3.3 10K 3.3 10K Vol16 70K S + 36 Vi37 (R) 1K 3.3 Vol15 70K 37 38 70K T 14 22 AVSS - + 13 Vi39 (L) 1K Vi40 (BYPASSR) 1K 3.3 39 40 1 3.3 70K - + + - - + Bass Treble - + 12 + 3.3 11 6 0.33 2 8200p 3 4 0.015 5 0.33 7 0.015 8 8200p 9 10 3.3 1K Vi1 (BYPASSL) Rev.1.0, Apr.16.2004, page 14 of 17 M61539FP Signal Processing Diagram BYPASS 3.3 F TONE in TONE CONTROL (+14dB - 14 dB ) BASS 70 k TREBLE VOLUME Lch,Rch(0 dB - dB) + 3.3 F 70k + + - - 3.3 F 70 k + - 3.3 8200pF 0.015 F 0.33 F F VOLUME in 3.3 F VOLUME Cch,SWch,SLch,SRch (0dB - dB) + 3.3 F Note: 1. The resistance value of Volume change about 18 to 22k by attenuated condition. 2. No built in a zero cross circuit. 3. When the mode changed(BYPASS/TONE), it is necessary the muting function. CLK,DATA,LATCH S INPUT: Schmitt trigger type Rev.1.0, Apr.16.2004, page 15 of 17 M61539FP Application Example (When using Tone control and Bypass) SWin AVDD=7V AVDD=5V 47 F 3.3 F 10 F MCU C C C R 4700pF 0.001 F DGND AGND 30 31 SRin SLin 3.3 F 29 28 27 26 25 24 23 22 21 3.3 F MCU I/F volume volume volume volume 20 3.3 F SWout SRout 3.3 F 32 33 34 19 18 3.3 F 3.3 F SLout 17 3.3 F Cout Rout 3.3 F Cin 3.3 F 35 36 16 15 Lout AVSS = -7V Rin 3.3 F 37 38 tone volume 14 4700pF 47 F 13 3.3 F Lin BYPASSRin 3.3 F 39 tone volume 12 11 7 0.33 F 3.3 F 40 1 3.3 F 2 3 4 0.33 F 5 6 8 0.015 F 9 10 8200pF 3.3 F 8200pF 0.015 F BYPASSLin Note: To connect capacitor to DATA, CLOCK pin is the incorrect operation prevention by the noise. (Recommendation value :47 to 100pF) For the same reason, LATCH pin connect resistor and capacitor. (about 1k, 330pF) Rev.1.0, Apr.16.2004, page 16 of 17 M61539FP Package Dimensions As of January, 2003 Unit: mm 9.0 0.2 7.0 30 21 9.0 0.2 31 20 40 10 11 *0.17 0.05 0.15 0.04 1.40 1.70 Max 1 *0.25 0.05 0.22 0.04 0.13 M 0.65 0.575 1.0 0.575 0 - 8 0.50 0.10 0.10 0.09 0.13+ 0.05 - *Dimension including the plating thickness Base material dimension Package Code JEDEC JEITA Mass(reference value) FP-40B -- Conforms 0.2 g Rev.1.0, Apr.16.2004, page 17 of 17 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. 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The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500 Fax: <1> (408) 382-7501 Renesas Technology Europe Limited. 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