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| S MSUN G ELECTRONICS KS88C0116 8-Bit CMOS Microcontroller Product Specification OVERVIEW The KS88C0116 single-chip 8-bit microcontroller is fabricated using a highly advanced CMOS process. Its fast and reliable CPU is based on Zilog's Super8(R) architecture. With two 8-bit and two 16-bit timer/counters, a large number of general I/O pins, full-duplex serial port, and 16-bit backup timer, the KS88C0116 is an excellent choice for a wide range of general-purpose electronics applications. FEATURES CPU * SAM8 CPU core Instruction Execution Time * 600 ns at 20 MHz fOSC (min.) Timer/Counters * * Two 8-bit timers with interval timer and PWM modes Two 16-bit general-purpose timer/counters Memory * * * 272-byte general purpose register area 16-Kbyte internal program memory ROM-less operating mode Interrupts * * * * 18 interrupt sources 18 interrupt vectors Eight interrupt levels Fast interrupt processing Backup Timer * 16-bit backup timer Serial Port External Interface * * 64-Kbyte external data memory area 64-Kbyte external program memory area (ROM-less mode) General I/O * * * * * Seven I/O ports (54 pins): Three nibble-programmable ports One bit-programmable port Two bit-programmable ports for external interrupts One n-channel, open-drain output port * One synchronous operating mode and three full-duplex asynchronous UART modes Operating Temperature Range * - 20C to + 85C Operating Voltage Range * 4.5 V to 5.5 V Instruction Set * * 79 instructions IDLE and STOP instructions added for power-down modes Package Types * 64-pin SDIP, 64-pin QFP 2-1 June 1996 KS88C0116 MICROCONTROLLER PRODUCT SPECIFICATION EXTERNAL ADDRESS/DATA BUS P0.0-P0.7 (A8-A15) P1.0-P1.7 (AD0-AD7) P2.0-P2.3, P2.4/INT0-P2.7/INT3 RESET EA PORT 0 PORT 1 PORT 2 SAM8 BUS XIN XOUT XT IN XT OUT MAIN OSC SUB OSC BACKUP TIMER PORT 3 P3.0-P3.7 PORT I/O and INTERRUPT CONTROL PORT 4 P4.0/INT4 (TCG P4.1/INT5 (TDG P4.2/INT6 - P4.7/INT11 TA TB TIMERS A and B SAM8 CPU PORT 5 P5.0-P5.3 P5.4-P5.5 TCCK TDCK TIMERS C and D RxD TxD SERIAL PORT 16-KB ROM 272-BYTE REGISTER FILE PORT 6 P6.0-P6.7 Figure 1. KS88C0116 Block Diagram S MSUN G June 1996 2-2 ELECTRONICS PRODUCT SPECIFICATION KS88C0116 MICROCONTROLLER P0.7 / A15 P0.6 / A14 P0.5 / A13 P0.4 / A12 P0.3 / A11 P0.2 / A10 P0.1 / A9 P0.0 / A8 P4.7 / INT11 P4.6 / INT10 P4.5 / INT9 P4.4 / INT8 P4.3 / INT7 P4.2 / INT6 P4.1 / INT5 / TDG P4.0 / INT4 / TCG VDD2 P3.7 / RxD P3.6 / TxD P3.5 / TB P3.4 / TA P3.3 P3.2 P3.1 / TDCK P3.0 / TCCK P6.0 P6.1 P6.2 P6.3 P6.4 P6.5 VSS2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 KS88C0116 64-SDIP (Top View) 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 VDD1 P1.0 / AD0 P1.1 / AD1 P1.2 / AD2 P1.3 / AD3 P1.4 / AD4 P1.5 / AD5 P1.6 / AD6 P1.7 / AD7 RESET XTOUT XTIN VSS1 XOUT XIN P5.5 P5.4 P5.3 P5.2 P5.1 P5.0 EA P2.0 / AS P2.1 / DS P2.2 / R/W P2.3 / DM P2.4 / INT0 / WAIT P2.5 / INT1 P2.6 / INT2 P2.7 / INT3 P6.7 P6.6 Figure 2. KS88C0116 Pin Assignments (64-SDIP) S MSUN G ELECTRONICS 2-3 June 1996 KS88C0116 MICROCONTROLLER PRODUCT SPECIFICATION P2.0 / AS EA P5.0 P5.1 P5.2 P5.3 P5.4 P5.5 P2.1 / DS P2.2 / R/W P2.3 / DM P2.4 / INT0 / WAIT P2.5 / INT1 P2.6 / INT2 P2.7 / INT3 P6.7 P6.6 VSS2 P6.5 P6.4 P6.3 P6.2 P6.1 P6.0 P3.0 / TCCK P3.1 / TDCK P3.2 XIN XOUT VSS1 XTIN XTOUT 52 53 54 55 56 57 58 59 60 61 62 63 64 RESET P1.7 / AD7 P1.6 / AD6 P1.5 / AD5 P1.4 / AD4 P1.3 / AD3 P1.2 / AD2 P1.1 / AD1 P1.0 / AD0 VDD1 P0.7 / A15 P0.6 / A14 P0.5 / A13 P0.4 / A12 P0.3 / A11 P0.2 / A10 P0.1 / A9 P0.0 / A8 P4.7 / INT11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 Figure 3. KS88C0116 Pin Assignments (64-QFP) 64-QFP (Top View) KS88C0116 32 31 30 29 28 27 26 25 24 23 22 21 20 P3.3 P3.4 / TA P3.5 / TB P3.6 / TxD P3.7 / RxD VDD2 P4.0 / INT4 / TCG P4.1 / INT5 / TDG P4.2 / INT6 P4.3 / INT7 P4.4 / INT8 P4.5 / INT9 P4.6 / INT10 S MSUN G June 1996 2-4 ELECTRONICS PRODUCT SPECIFICATION KS88C0116 MICROCONTROLLER Table 1. KS88C0116 Pin Descriptions Pin Name P0.0-P0.7 Pin Type I/O Pin Description I/O port with nibble-programmable pins; Schmitt trigger input or push-pull, opendrain output and software assignable pullups; also configurable as external interface address lines A8-A15. Same general characteristics as port 0; also configurable as external interface address/data lines AD0-AD7. I/O port with Schmitt trigger input (P2.0- P2.3 only) or push-pull output. Lower nibble pins 0-3 are configurable for external interface signals; upper nibble pins 4-7 are bit-programmable for external interrupts INT0-INT3. P2.4 can also be used for external WAIT input. I/O port with bit-programmable pins; Schmitt trigger input or push-pull output. Alternate functions include software-selectable UART transmit and receive on pins 3.7 and 3.6, timer B and timer A outputs at pins 3.5 and 3.4, and timer D and C clock inputs at pins 3.1 and 3.0. Circuit Number 1 SDIP Pin Number 8-1 Share Pins A8-A15 P1.0-P1.7 I/O 1 63-56 AD0-AD7 P2.0-P2.3 P2.4-P2.7 I/O 2 (lower nibble); 3 (upper nibble; with noise filter) 4 42-39; 38-35 AS, DS, DM, R/W; INT0-INT3, WAIT P3.0-P3.7 I/O 25-18 TCCK, TDCK, TA, TB, TxD, RxD P4.0-P4.7 I/O I/O port with bit-programmable pins; Schmitt 5 trigger input or push-pull output; software(with assignable pull-ups. Alternate functions noise filter) include external interrupt inputs INT4-INT11 (with interrupt enable and pending control) and timer C and D gate input at P4.0 and P4.1. I/O port with nibble-programmable pins; Schmitt trigger input or push-pull, opendrain output; software-assignable pull-ups. N-channel, open-drain output pins; up to 9-volt capacity Bi-directional serial data input pin Serial data output pin Timer A and B output pins Timer C and D external clock input pins External interrupts. I/O pin 2.4 (share pin with INT0) is also configurable as a WAIT signal input pin for the external interface. 1 16-9 INT4- INT11; TCG, TDG P5.0-P5.5 I/O 44-49 - P6.0-P6.7 RxD TxD TA, TB TCCK, TDCK INT0-INT3 O I/O I/O I/O I/O I/O 6 - - 4 4 3 (with noise filter) 26-31, 33-34 18 19 21, 20 25, 24 38-35 - P3.7 P3.6 P3.4, P3.5 P3.0, P3.1 P2.4-P2.7 S MSUN G ELECTRONICS 2-5 June 1996 KS88C0116 MICROCONTROLLER PRODUCT SPECIFICATION Table 1. KS88C0116 Pin Descriptions (Continued) Pin Name INT4-INT11 Pin Type I/O Pin Description Bit-programmable external interrupt input pins with interrupt pending and enable /disable control System clock input and output pins Suboscillator clock pins for backup timer System reset pin (internal pull-up: 280 k) External access (EA) pin with three modes: 0 V: Normal operation (internal ROM) 5 V: ROM-less operation (external interface) Power input pins for port output (external) Power input pins for CPU (internal) Circuit Number 5 (with noise filter) - - 7 - SDIP Pin Number 16-9 Share Pins P4.0-P4.7 X IN, XOUT XTIN, XTOUT - - I I 50, 51 53, 54 55 43 - - - - RESET EA V DD2, VSS2 V DD1, VSS1 - - - - 17, 32 64, 52 - - V DD PULL-UP RESISTOR (Typical 47 K) PULL-UP ENABLE V DD DATA OPENDRAIN OUTPUT DISABLE IN / OUT VSS IN Figure 4. Pin Circuit Type 1 (Ports 0, 1, and 5) S MSUN G June 1996 2-6 ELECTRONICS |
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