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HCF4068B
8 INPUT NAND/AND GATE
s
s s
s s
s s
MEDIUM-SPEED OPERATION tPHL, tPLH = 75ns (Typ.) at 10V BUFFERED OUTPUT QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"
DIP
SOP
ORDER CODES
PACKAGE DIP SOP TUBE HCF4068BEY HCF4068BM1 T&R HCF4068M013TR
DESCRIPTION The HCF4068B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4068B 8 INPUT NAND/AND GATE provide the system designer with direct
implementation of the positive-logic 8-input NAND and AND functions and supplements the existing family of CMOS gates.
PIN CONNECTION
September 2001
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HCF4068B
INPUT EQUIVALENT CIRCUIT TRUTH TABLES
INPUTS A L X X X X X X X H B X L X X X X X X H C X X L X X X X X H D X X X L X X X X H E X X X X L X X X H F X X X X X L X X H G X X X X X X L X H H X X X X X X X L H OUTPUT J (NAND) H H H H H H H H L OUTPUT F X X X X X L X X H G X X X X X X L X H H X X X X X X X L H K (AND) L L L L L L L L H
INPUTS A B X L X X X X X X H C X X L X X X X X H D X X X L X X X X H E X X X X L X X X H
PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION Data Inputs Not Connected Data Output (AND) Data Output (NAND) Negative Supply Voltage Positive Supply Voltage
2, 3, 4, 5, 9, A, B, C, D, E, 10, 11, 12 F, G, H 6, 8 NC 1 K 13 J VSS 7 14 VDD
L X X X X X X X H
ABSOLUTE MAXIMUM RATINGS
Symbol VDD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol VDD VI Top Supply Voltage Input Voltage Operating Temperature Parameter Value 3 to 20 0 to VDD -55 to 125 Unit V V C
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DC SPECIFICATIONS
Test Condition Symbol Parameter VI (V) 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 0.5/4.5 1/9 1.5/13.5 4.5/0.5 9/1 13.5/1.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 VO (V) |IO| VDD (A) (V) 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 10 15 18 TA = 25C Min. Typ. 0.01 0.01 0.01 0.02 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 -1.36 -0.44 -1.1 -3.0 0.44 1.1 3.0 -3.2 -1 -2.6 -6.8 1 2.6 6.8 10-5 5 0.1 7.5 -1.15 -0.36 -0.9 -2.4 0.36 0.9 2.4 1 3.5 7 11 1.5 3 4 -1.1 -0.36 -0.9 -2.4 0.36 0.9 2.4 1 Max. 0.25 0.5 1 5 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 Value -40 to 85C Min. Max. 7.5 15 30 150 4.95 9.95 14.95 0.05 0.05 0.05 -55 to 125C Min. Max. 7.5 15 30 150 Unit
IL
Quiescent Current
A
VOH
High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage Output Drive Current
VOL
VIH
VIL
IOH
IOL
Output Sink Current Input Leakage Current Input Capacitance
0/5 0/5 0/10 0/15 0/5 0/10 0/15 0/18
<1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1
V
V
V
V
mA
mA A pF
II CI
Any Input Any Input
The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25C, CL = 50pF, RL = 200K, tr = tf = 20 ns)
Test Condition Symbol Parameter VDD (V) tPLH tPHL Propagation Delay Time 5 10 15 5 10 15 Min. Typ. 150 75 55 100 50 40 Max. 300 150 110 200 100 80 ns Value (*) Unit
tTLH tTHL Output Transition Time
ns
(*) Typical temperature coefficient for all VDD value is 0.3 %/C.
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HCF4068B
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance) RL = 200K RT = ZOUT of pulse generator (typically 50)
WAVEFORM 1 : PROPAGATION DELAY TIMES FOR K OUTPUT (AND FUNCTION) (f=1MHz; 50% duty cycle)
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WAVEFORM 2 : PROPAGATION DELAY TIMES FOR J OUTPUT (NAND FUNCTION)(f=1MHz; 50% duty cycle)
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Plastic DIP-14 MECHANICAL DATA
mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 1.27 3.3 2.54 0.050 8.5 2.54 15.24 7.1 5.1 0.130 0.100 0.51 1.39 0.5 0.25 20 0.335 0.100 0.600 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 TYP. MAX. inch
P001A
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SO-14 MECHANICAL DATA
DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8 (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45 (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
PO13G
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com
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