![]() |
|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
PRELIMINARY INFORMATION ICS3727XP LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO Description The ICS3727XP combines the functions of a VCXO (Voltage Controlled Crystal Oscillator) and PLL (Phase-Locked Loop) frequency doubler onto a single chip. It is designed primarily for data and clock recovery applications within end products such as set-top box receivers. The ICS3727XP exhibits a moderate VCXO gain of 200 ppm/V typical, when used with a high quality external pullable quartz crystal. The frequency of the on-chip VCXO is adjusted by an external control voltage input into pin VIN. Because VIN is a high impedance input, it can be driven directly from an PWM RC integrator circuit. Frequency output increases with VIN voltage input. The usable range of VIN is 0 to 3.3 V. Features * ICS3727XP offers 24 to 36 MHz output frequency range (output frequency = 2x crystal frequency) and improved power supply noise rejection * Uses an inexpensive 12 to 18 MHz external crystal * Ideal for DV CODEC applications using 27 MHz external pullable crystal with extended pull range to generate locked 27 MHz clock transport video clock * On-chip VCXO with guaranteed pull range of 200 ppm minimum * VCXO input tuning voltage 0 to 3.3 V * Packaged in 8-pin SOIC (150 mil wide) Block Diagram VIN 12-18 MHz Pullable Crystal X1 X2 Voltage Controlled Crystal Oscillator PLL Frequency Doubler 24-36 MHz (2x Crystal Frequency) MDS 3727XP A I n t e gra te d C i r c u i t S y s t e m s 1 525 Race Stre et, San Jo se, CA 9 5126 Revision 102004 te l (40 8) 2 97-12 01 w w w. i c st . c o m PRELIMINARY INFORMATION ICS3727XP LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO Pin Assignment X1 VDD VI N GND 1 2 3 4 8 7 6 5 X2 GND NC CLK I CS3 7 2 7 XP 8 - p i n ( 1 5 0 mi l ) SOI C Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name XI VDD VIN GND CLK NC GND X2 Pin Type Input Power Input Power Output -- Power Input Pin Description Crystal connection -- Connect to the external pullable crystal. Connect to +3.3 V (0.01uf decoupling capacitor recommended). Voltage input to VCXO -- 0 to 3.3 V analog input which controls the oscillation frequency of the VCXO. Connect to ground. Clock output. No internal connection (may connect to ground or VDD). Connect to ground. Crystal connection -- Connect to the external pullable crystal. MDS 3727XP A In te grated Circuit Systems 2 525 Ra ce Street, San Jose, CA 9512 6 Revision 102004 tel (4 08) 297-1 201 w w w. i c s t . c o m PRELIMINARY INFORMATION ICS3727XP LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO External Component Selection The ICS3727XP requires a minimum number of external components for proper operation. Decoupling Capacitor A decoupling capacitor of 0.01F must be connected between VDD (pin 2) and GND (pin 4), as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. The external crystal must be connected as close to the chip as possible and should be on the same side of the PCB as the ICS3727XP. There should be no via's between the crystal pins and the X1 and X2 device pins. There should be no signal traces underneath or close to the crystal. Crystal Tuning Load Capacitors The crystal traces should include pads for small fixed capacitors, one between X1 and ground, and another between X2 and ground. Stuffing of these capacitors on the PCB is optional. The need for these capacitors is determined at system prototype evaluation, and is influenced by the particular crystal used (manufacture and frequency) and by PCB layout. The typical required capacitor value is 1 to 4 pF. To determine the need for and value of the crystal adjustment capacitors, you will need a PC board of your final layout, a frequency counter capable of about 1 ppm resolution and accuracy, two power supplies, and some samples of the crystals which you plan to use in production, along with measured initial accuracy for each crystal at the specified crystal load capacitance, CL. To determine the value of the crystal capacitors: 1. Connect VDD of the ICS3727XP to 3.3 V. Connect pin 3 of the ICS3727XP to the second power supply. Adjust the voltage on pin 3 to 0V. Measure and record the frequency of the CLK output. 2. Adjust the voltage on pin 3 to 3.3 V. Measure and record the frequency of the same output. To calculate the centering error: Series Termination Resistor When the PCB trace between the clock output (CLK, pin 5) and the load is over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance) place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. Quartz Crystal The ICS3727XP VCXO function consists of the external crystal and the integrated VCXO oscillator circuit. To assure the best system performance (frequency pull range) and reliability, a crystal device with the recommended parameters (shown below) must be used, and the layout guidelines discussed in the following section shown must be followed. The frequency of oscillation of a quartz crystal is determined by its "cut" and by the load capacitors connected to it. The ICS3727XP incorporates on-chip variable load capacitors that "pull" (change) the frequency of the crystal. The crystal specified for use with the ICS3727XP is designed to have zero frequency error when the total of on-chip + stray capacitance is 14 pF. Recommended Crystal Parameters: Initial Accuracy at 25C Temperature Stability Aging Load Capacitance Shunt Capacitance, C0 C0/C1 Ratio Equivalent Series Resistance 6 ( f 3.0V - f t arg et ) + ( f 0V - f t arg et ) Error = 10 x ------------------------------------------------------------------------------ - error xtal f t arg et Where: 20 ppm 30 ppm 20 ppm 14 pf 7 pF Max 250 Max 35 Max ftarget = nominal crystal frequency errorxtal =actual initial accuracy (in ppm) of the crystal being measured If the centering error is less than 25 ppm, no adjustment is needed. If the centering error is more than 25ppm negative, the PC board has excessive stray capacitance and a new PCB layout should be MDS 3727XP A In te grated Circuit Systems 3 525 Ra ce Street, San Jose, CA 9512 6 Revision 102004 tel (4 08) 297-1 201 w w w. i c s t . c o m PRELIMINARY INFORMATION ICS3727XP LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO considered to reduce stray capacitance. (Alternately, the crystal may be re-specified to a higher load capacitance. Contact ICS for details.) If the centering error is more than 25 ppm positive, add identical fixed centering capacitors from each crystal pin to ground. The value for each of these caps (in pF) is given by: External Capacitor = 2 x (centering error)/(trim sensitivity) Trim sensitivity is a parameter which can be supplied by your crystal vendor. If you do not know the value, assume it is 30 ppm/pF. After any changes, repeat the measurement to verify that the remaining error is acceptably low (typically less than 25 ppm). Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS3727XP. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Reference crystal parameters Min. 0 +3.15 Typ. Max. +70 +3.45 Units C V Refer to page 3 MDS 3727XP A In te grated Circuit Systems 4 525 Ra ce Street, San Jose, CA 9512 6 Revision 102004 tel (4 08) 297-1 201 w w w. i c s t . c o m PRELIMINARY INFORMATION ICS3727XP LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO DC Electrical Characteristics VDD=3.3 V 5% , Ambient temperature 0 to +70C, unless stated otherwise Parameter Operating Voltage Output High Voltage Output Low Voltage Output High Voltage (CMOS Level) Operating Supply Current Short Circuit Current VIN, VCXO Control Voltage Symbol VDD VOH VOL VOH IDD IOS VIA Conditions IOH = -12 mA IOL = 12 mA IOH = -4 mA Output = 27 MHz, no load Min. 3.15 2.4 Typ. Max. 3.45 0.4 Units V V V V VDD-0.4 10 50 0 3.3 mA mA V AC Electrical Characteristics VDD = 3.3 V 5%, Ambient Temperature 0 to +70 C, unless stated otherwise Parameter Output Frequency Crystal Pullability VCXO Gain Output Rise Time Output Fall Time Output Clock Duty Cycle Maximum Output Jitter, short term Symbol FO FP tOR tOF tD tJ Conditions VCXO Crystal frequency = 1/2 Output 0V< VIN < 3.3 V, Note 1 VIN = VDD/2 + 1 V, Note 1 0.8 to 2.0 V, CL=15 pF 2.0 to 0.8 V, CL=15 pF Measured at 1.4 V, CL=15 pF CL=15 pF Min. 24 + 200 Typ. Max. Units 36 MHz ppm 200 1.5 1.5 40 50 100 60 ppm/V ns ns % ps Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3. MDS 3727XP A In te grated Circuit Systems 5 525 Ra ce Street, San Jose, CA 9512 6 Revision 102004 tel (4 08) 297-1 201 w w w. i c s t . c o m PRELIMINARY INFORMATION ICS3727XP LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Min Max Inches Min Max Symbol Index Area EH Pin 1 D h x 45 0 A A1 B C D E e H h L a 1.35 1.75 1.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 Basic 5.80 6.20 0.25 0.50 0.40 1.27 0 8 0.0532 0.0688 0.0040 0.0098 0.013 0.020 0.0075 0.0098 .1890 .1968 0.1497 0.1574 0.050 Basic 0.2284 0.2440 0.010 0.020 0.016 0.050 0 8 A Q e b c Ordering Information Part / Order Number ICS3727XPM ICS3727XPMT Marking 3727XPM 3727XPM Shipping Packaging Tubes Tape and Reel Package 8-pin SOIC 8-pin SOIC Temperature 0 to +70 C 0 to +70 C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 3727XP A In te grated Circuit Systems 6 525 Ra ce Street, San Jose, CA 9512 6 Revision 102004 tel (4 08) 297-1 201 w w w. i c s t . c o m PRELIMINARY INFORMATION ICS3727XP LOW COST 24 TO 36 MHZ 3.3 VOLT VCXO Revision History Rev. A Originator P.Griffith Date 10/20/04 Description of Change New device/datasheet. MDS 3727XP A In te grated Circuit Systems 7 525 Ra ce Street, San Jose, CA 9512 6 Revision 102004 tel (4 08) 297-1 201 w w w. i c s t . c o m |
Price & Availability of ICS3727XP
![]() |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |