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MK2731-01 LOW COST VCXO Description The MK2731-01 is a low cost, low jitter, high-performance VCXO and PLL clock synthesizer designed to replace expensive discrete VCXOs, PLLs and oscillators. The on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3V input voltage to cause the output clocks to vary by 100 ppm. Using ICS's patented VCXO and analog Phase-Locked Loop (PLL) techniques, the device uses an inexpensive 10 MHz or 13.5 MHz pullable crystal input to produce two low skew output clocks. ICS manufactures a large variety of Set-Top Box and multimedia clock synthesizers for all applications. If more clock outputs are needed, see the MK277x family of parts. Consult ICS to eliminate VCXOs, crystals and oscillators from your board. Features * Packaged in 16-pin narrow SOIC * Uses an inexpensive 10 or 13.5 MHz crystal * On-chip VCXO (patented) with pull range of 200 ppm (minimum) * * * * VCXO tuning voltage of 0 to 3 V Zero ppm synthesis error in all clocks Low skew output clocks - 1 ns maximum CMOS level outputs with 25 mA output drive capability at TTL levels * Advanced, low power, sub-micron CMOS process * 5 V operating voltage Block Diagram S2:0 VIN X1 3 CLK1 PLL/Clock Synthesis Circuitry CLK2 10 MHz or 13.5 MHz Pullable Crystal X2 Voltage Controlled Crystal Oscillator OE (both outputs) MDS 2731-01 E I n t e gra te d C i r c u i t S y s t e m s 1 525 Race Stre et, San Jo se, CA 9 5126 Revision 021804 te l (40 8) 2 97-12 01 w w w. i c st . c o m MK2731-01 LOW COST VCXO Pin Assignment X2 X1 VDD VIN GND GND OE CLK1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD NC S2 VDD GND CLK2 S1 S0 Output Clock Select Table Input S2 10 10 13.5 13.5 13.5 13.5 -- 13.5 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 CLK1 40 40 40 27 33.33 24.576 32 CLK2 80 OFF OFF 54 66.66 49.152 64 Test use 16-pin narrow (150 mil) SOIC (All OFF outputs are stopped low) Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name X2 X1 VDD VIN GND GND OE CLK1 S0 S1 CLK2 GND VDD S2 NC VDD Pin Type Output Input Power Input Power Power Input Output Input Input Output Power Power Input -Power Pin Description Crystal connection. Connect to a 10 or 13.5 MHz pullable crystal. Crystal connection. Connect to a 10 or 13.5 MHz pullable crystal. Connect to +5 V. Voltage input to VCXO. Zero to 3 V signal which controls the VCXO frequency. Connect to ground. Connect to ground. Output Enable. Active high. Tri-states both outputs when low. Clock output 1 determined by status of S2, S1, and S0. See table above. Fixed Clock Select 0. Selects outputs per table above. Fixed Clock Select 1. Selects outputs per table above. Clock output 2 determined by status of S2, S1, and S0. See table above. Connect to ground. Connect to +5 V. Fixed Clock Select 2. Selects outputs per table above. No connect. Connect to +5 V. MDS 2731-01 E In te grated Circuit Systems 2 525 Ra ce Street, San Jose, CA 9512 6 Revision 021804 tel (4 08) 297-1 201 w w w. i c s t . c o m MK2731-01 LOW COST VCXO External Component Selection The MK2731-01 requires a minimum number of external components for proper operation. Crystal Tuning Load Capacitors The crystal traces should include pads for small fixed capacitors, one between X1 and ground, and another between X2 and ground. Stuffing of these capacitors on the PCB is optional. The need for these capacitors is determined at system prototype evaluation, and is influenced by the particular crystal used (manufacture and frequency) and by PCB layout. The typical required capacitor value is 1 to 4 pF. The procedure for determining the value of these capacitors can be found in application note MAN05. Decoupling Capacitors Decoupling capacitors of 0.01F should be connected between VDD and GND, as close to the MK2731-01 as possible. For optimum device performance, the decoupling capacitors should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. Series Termination Resistor When the PCB traces between the clock outputs and the loads are over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance) place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. Quartz Crystal The MK2731-01 VCXO function consists of the external crystal and the integrated VCXO oscillator circuit. To assure the best system performance (frequency pull range) and reliability, a crystal device meeting ICS' recommended parameters must be used, and the layout guidelines discussed in the following section must be followed. See Application Note MAN05 for a full list of crystal parameters. The frequency of oscillation of a quartz crystal is determined by its "cut" and by the load capacitors connected to it. The MK2731-01 incorporates on-chip variable load capacitors that "pull" (change) the frequency of the crystal. The crystal specified for use with the MK2731-01 is designed to have zero frequency error when the total of on-chip + stray capacitance is 14 pF. The external crystal must be connected as close to the chip as possible and should be on the same side of the PCB as the MK2731-01. There should be no via's between the crystal pins and the X1 and X2 device pins. There should be no signal traces underneath or close to the crystal. MDS 2731-01 E In te grated Circuit Systems 3 525 Ra ce Street, San Jose, CA 9512 6 Revision 021804 tel (4 08) 297-1 201 w w w. i c s t . c o m MK2731-01 LOW COST VCXO Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK2731-01. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Reference crystal parameters Min. 0 +4.75 Typ. Max. +70 +5.25 Units C V Refer to page 3 DC Electrical Characteristics VDD=3.3 V 5% , Ambient temperature 0 to +70C, unless stated otherwise Parameter Operating Voltage Output High Voltage Output Low Voltage Output High Voltage (CMOS Level) Input High Voltage (X1 only) Input High Voltage Input Low Voltage (X1 only) Input Low Voltage Operating Supply Current Short Circuit Current VIN, VCXO Control Voltage Frequency Synthesis Error Input Capacitance Symbol VDD VOH VOL VOH VIH VIH VIL VIL IDD IOS VIA Conditions IOH = -25 mA IOL = 25 mA IOH = -8 mA Min. 4.75 2.4 Typ. Max. 5.25 0.4 Units V V V V VDD-0.4 3.5 2.0 2.5 1.5 0.8 2.5 V V V V mA mA 3 0 V ppm pF No load, S2:0 = 000 Each output 0 All clocks S0, S1, S2, OE 20 100 CIN 7 MDS 2731-01 E In te grated Circuit Systems 4 525 Ra ce Street, San Jose, CA 9512 6 Revision 021804 tel (4 08) 297-1 201 w w w. i c s t . c o m MK2731-01 LOW COST VCXO AC Electrical Characteristics VDD = 3.3 V 5%, Ambient Temperature 0 to +70 C, unless stated otherwise Parameter CLK1 and CLK2 Output Pullability Input Crystal Frequency Input Crystal Accuracy Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle Maximum Absolute Jitter, short term Skew of CLK1 (with respect to CLK2) Symbol fP Conditions 0V< VIN < 3 V, Note 1 Min. +100 Typ. Max. Units ppm 10 or 13.5 +30 tOR tOF tD tJ 0.8 to 2.0V 2.0 to 0.8V Measured at 1.4V CL=15pF Measured at 1.4V 40 50 200 1 1.5 1.5 60 MHz ppm ns ns % ps ns Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3. Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Symbol JA JA JA JC Conditions Still air 1 m/s air flow 3 m/s air flow Min. Typ. 120 115 105 58 Max. Units C/W C/W C/W C/W Thermal Resistance Junction to Case MDS 2731-01 E In te grated Circuit Systems 5 525 Ra ce Street, San Jose, CA 9512 6 Revision 021804 tel (4 08) 297-1 201 w w w. i c s t . c o m MK2731-01 LOW COST VCXO Package Outline and Package Dimensions (16-pin 150 mil SOIC) Package dimensions are kept current with JEDEC Publication No. 95 16 Millimeters Symbol Min Max Inches Min Max E INDEX AREA H 12 D A A1 B C D E e H h L 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 9.80 10.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8 .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .3859 .3937 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8 A A1 h x 45 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number MK2731-01G MK2731-01GTR Marking MK2731-01 MK2731-01 Shipping packaging Tubes Tape and Reel Package 16-pin SOIC 16-pin SOIC Temperature 0 to +70 C 0 to +70 C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 2731-01 E In te grated Circuit Systems 6 525 Ra ce Street, San Jose, CA 9512 6 Revision 021804 tel (4 08) 297-1 201 w w w. i c s t . c o m |
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