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WIRELESS COMMUNICATIONS DIVISION
TQ5622
DATA SHEET
GND 1 RF IN GND VDD LNA LO IN Vdd MXR GND GND 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Sleep Control LNA Out GND MXR RF IN GND IF OUT/Vdd GND GND
3V PCS Receiver IC With Power- Down
Features
Power-Down, "Sleep" Mode Single 2.8V operation Low-current operation Small QSOP-16 plastic package Few external components
Product Description
The TQ5622 is a 3V, RF receiver IC designed specifically for PCS band TDMA applications. It's RF performance meets the requirements for products designed to the IS-136 TDMA standards. The TQ5622 includes a power-down mode which allows current saving during standby and the non-operating portion of the TDMA pulse. The TQ5622 contains LNA and Mixer circuits matched to the 1900MHz PCS band. The mixer uses a high-side LO frequency. The IF has a usable frequency range of 85 to 150MHz. The LNA Output and Mixer Input ports are internally matched to simplify the design and keep the number of external components to a minimum. The TQ5622 achieves excellent RF performance with low current consumption which gives long standby times in portable applications. The small QSOP-16 package is ideally suited for PCS band mobile phones. Electrical Specifications1
Parameter Frequency Gain Noise Figure Input 3rd Order Intercept Min 1930 17.5 2.8 -9 12.0 Typ Max 1990 Units MHz dB dB dBm mA
Applications
PCS, IS-136 based TDMA Mobile Phones
DC supply Current
Note 1: Test Conditions: Vdd=2.8VDC, Tc=25C, Filter IL=2.5dB, RF=1960MHz, LO=2095MHz, IF=135MHz, LO input=-7dBm
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TQ5622 Data Sheet
Electrical Characteristics1,2
Parameter RF Frequency LO Frequency IF Frequency LO input level Supply voltage Gain Gain Variation vs. Temp. Noise Figure Input 3rd Order Intercept Return Loss LNA input - with external match LNA output Mixer RF input, externally matched Mixer LO input Isolation LO to LNA RF in LO to IF; after external IF match RF to IF; after external IF match IF Output Impedance Vdd = 2.8V; Sleep mode, Device On Vdd = 2.8V; Sleep mode, Device Off Vdd = 0V Power Down, "sleep" Device On Voltage Device Off Voltage Supply Current, Sleep mode, Device On Supply Current, Sleep mode, Device Off Operating Temperature, case Tc = + 25 C Enable voltage = 0, LO Drive off -40 0 -11.0 10 10 10 10 35 40 20 500 Approx. Open <50 Vdd 0 12 100 25 15 1000 +85 Vdd -40 to 85 C 2.8 -9 Conditions Min. 1930 2015 85 -7 2.7 16.0 -4 2.8 17.5 +/-2.0 3.5 Typ/Nom Max. 1990 2140 150 0 4.0 Units MHz MHz MHz dBm V dB dB dB dBm dB dB dB dB dB dB dB Ohm Ohm Ohm VDC VDC mA A C
Note 1: Test Conditions: Vdd=2.8VDC, Filter IL=2.5dB, RF=1960MHz, LO=2095MHz, IF=135MHz, LO input=-7dBm, TC = 25C, unless otherwise specified. Note 2: Min./Max. limits are at +25C case temperature unless otherwise specified.
Absolute Maximum Ratings
Parameter DC Power Supply Power Dissipation Operating Temperature Storage Temperature Signal level on inputs/outputs Voltage to any non supply pin Value 5.0 500 -55 to 100 -60 to 150 +20 -0.3 to Vdd + 0.3 Units V mW C C dBm V
2
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TQ5622 Data Sheet
Typical Performance
Test Conditions (Unless Otherwise Specified): Vdd=2.8VDC, Tc=25C, filter IL=2.5dB, RF=1960MHz, LO=2095MHz, IF=135MHz, LO input=-7dBm
Gain vs. Frequency vs. Temperature 25 20 Gain (dB) Gain (dB) 15 10 5 0 1930
-40C +25C +85C
Gain vs. Vdd vs. Temperature 25 20 15 10 5 0
-40C +25C +85C
1940
1950 1960 1970 Frequency (MHz)
1980
1990
2.7
2.8
2.9
3
3.1 3.2 3.3 Vdd (volts)
3.4
3.5
3.6
Input IP3 vs. Frequency vs. Temperature 0 -2 Input IP3 (dBm) -4 -6 -8 -10 -12 1930
+85C +25C -40C
Input IP3 vs Vdd vs Temperature 0 -2 Input IP3 (dBm) -4 -6 -8
+85C +25C -40C
-10 -12 1940 1950 1960 1970 Frequency (MHz) 1980 1990 2.7 2.8 2.9 3 3.1 3.2 3.3 Vdd (volts) 3.4 3.5 3.6
NF vs. Frequency vs. Temperature 6
+85C
NF vs. Vdd vs. Temperature 4 3.5 3 NF (dB) 2.5 2 1.5 1
+85C +25C -40C
5 4 NF (dB) 3 2 1 0 1930
+25C -40C
0.5 0 1940 1950 1960 1970 Frequency (MHz) 1980 1990 2.7 2.8
2.9
3
3.1 3.2 3.3 Vdd (volts)
3.4
3.5
3.6
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TQ5622 Data Sheet
Application/Test Circuit
1
16
Sleep Mode
L1 LNA in L3
3 14 2 15
F1900
C7
R2 V LNA
C2
4 13
L4 LO in R1 V MX C3
7 10 6 11 5 12
V IF C6 IF out R3 C4
L3
C5
8
9
Bill of Material for TQ5622 Receiver Application/Test Circuit*
Component Receiver IC Capacitor Capacitor Capacitor Capacitor Capacitor Capacitor Inductor Inductor Inductor Inductor Filter Reference Designator U1 C1 C2 C3,C6 C4 C5 C7 L1 L2 L3 L4 F1 Part Number TQ5622 Not used 5.6pF 1000pF 10pF 15pF 1.0pF 2.2nH 150nH 2.7nH 3.9nH 1930-1990MHz 0603 0603 0603 0603 0402 0603 0805 0603 0402 Toyocom Value Size QSOP-16 Manufacturer TriQuint Semiconductor
* May vary due to printed circuit board layout and material.
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TQ5622 Data Sheet
TQ5622 Product Description
The TQ5622 3V RFIC Downconverter is designed specifically for PCS band TDMA applications. The TQ5622 contains LNA, Mixer and LO buffer circuits matched to the 1900 MHz US PCS frequency band. Any IF frequency may be selected between 85 and 150 MHz. Most RF ports are internally matched to 50 simplifying the design and minimizing the number of external components. The TQ5622 also includes a power-down mode switch which allows current saving during standby and the nonoperating portion of the TDMA pulse. presented to the input pin. Highest gain and lowest return loss occur when s is equal to the complex conjugate of the LNA input impedance. A different source reflection coefficient, opt, which is experimentally determined, will provide the lowest noise figure, Fmin. The noise resistance, Rn, provides an indication of the sensitivity of the noise performance to changes in s as seen by the LNA input.
FLNA = FMIN +
opt - S 4 RN Z 0 1 + opt 2 1 - s 2
2
(
)
Operation
Please refer to the test circuit above. Low Noise Amplifier (LNA) The LNA section of the TQ5622 are cascaded common source FET's, see Figure 1. It is designed to operate on DC supply voltages from 2.7V to 5V. The source terminal must be grounded as close as possible to Pin 1 to avoid significant gain reduction due to degeneration. The LNA requires an input matching circuit to obtain best noise figure, gain and return loss. The LNA output is close to 50 for direct connection to a 50 image reject filter.
Components such as filters and mixers placed after the LNA degrade the overall system noise figure according to the following equation:
FSYSTEM = FLNA +
F2 - 1 GLNA
FLNA and GLNA represent the linear noise factor and gain of the LNA and F2 is the noise factor of the next stage. The system noise figure is a compromise between the highest gain and minimum noise figure of the LNA. See Table 1 for noise parameters. Table 1. TQ5622 Noise Parameters
Vdd
LOAD
LNA out LNA in
BIAS BIAS
Freq. MHz 1930 1960 1990
|Gopt| 0.70 0.70 0.69
/ Gopt 97 94 91
Fmin 1.2 1.2 1.2
Rn 17 18 19
LNA Output Match The output impedance of the LNA was designed for 50. The internal 50 match eliminates the need for external components at this port. It also improves IP3 performance and power gain. The output of the LNA is intended to be connected directly to an image reject filter. Depending on the filter, additional components may be needed to better match to the LNA output. Some image reject filters may require a series inductor to smooth the frequency response and improve overall performance.
Figure 1. Simplified Schematic of LNA Section
LNA Input Match The designer can make some Noise Figure and Gain trade off by varying the off chip LNA input matching circuit values and topology. This allows the TQ5622 to be optimized for specific system requirements. The LNA gain, noise figure and input return loss are a function of the source impedance (Zs), or reflection coefficient (s),
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TQ5622 Data Sheet
Mixer The mixer of the TQ5622 uses a common source depletion mode MESFET. The mixer is designed to operate on supply voltages from 2.7V to 5V. A 50 matched on-chip buffer amplifier allows direct connection of the LO input to commercially available VCO's with output drive levels as low as -7dBm. The LO buffer provides good input match and supplies the voltage gain needed to drive the mixer FET. The mixer also has an "open-drain" IF output which provides flexibility in matching to various IF frequencies and filter impedances, see Figure 2.
Open Drain IF Output
model and the line length between the mixer input pin and the filter. In some cases a small inductance can be added between the filter and the mixer input to compensate. With some line lengths and filter combinations, no inductor is necessary. Mixer IF Port The Mixer IF output is an "open-drain" configuration, allowing flexibility in matching to various filter types and various IF frequencies. For evaluation of the LNA and mixer, it is usually necessary to impedance match the IF port to the 50 test system. When verifying or adjusting the matching circuit on the prototype circuit board, the LO drive should be injected at pin 5 at the nominal power level of -4 dBm, since the LO level does have an impact on the IF port impedance. There are several networks that can be used to properly match the IF port to the SAW or ceramic IF filter. The mixer supply voltage is applied through the IF port, so the matching circuit topology must contain either an RF choke or shunt inductor. An
Figure 2, Mixer Section LO Bias and Tuning Mixer RF Input
LO Input
extra DC blocking capacitor is not necessary if the output will be attached directly to a SAW or ceramic bandpass filter. Figure 3 illustrates a shunt L, series C, shunt C IF matching network. It is one of the simplest matching networks and requires the fewest components. DC current can be easily injected through the shunt inductor and the series C provides a DC block, if needed. The shunt C, is used to reduce the LO leakage.
10 pF Pin 11 100nH IF out 15pF
LO Input Port The LO input port is matched to 50. This allows the TQ5622 to operate at low LO drivel levels. However, the position of C3 shown in the applications circuit may effect the gain of the LO buffer amplifier, it should be placed as close as practicable to Pin 6. The buffer amplifier provides the voltage gain needed to drive the gate of the mixer FET while using very little current (approximately 1.5mA). Because of the 50 input match of the buffer amplifier and the internal DC blocking capacitor, the system VCO output can be directly connected to the TQ5622 LO input via a 50 transmission line with no additional components. Mixer Input
Pin 10 1000pF V IF
Figure 3, IF Output Match, 135 MHz
Power down, "sleep" mode TriQuint has found that LO leakage through the Mixer RF input pin, can in some cases, reflect off the SAW image reject filter and return back to the mixer out of phase. This may cause some degradation in conversion gain and system noise figure. Sensitivity to the phenomena depends on the particular filter The power down circuit is used to reduce average power consumption of the receiver in TDMA applications by toggling the receiver on and off within the TDMA receive time slot when no signal is present. The power down circuitry operates through
6
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TQ5622 Data Sheet
the incorporation of enhancement-mode FET switches in all DC paths. Level shifting circuitry is incorporated to provide an interface compatible with CMOS logic levels. The entire TQ5622 chip nominally draws 100uA when the power-down pin is at 0V. When the power-down pin is at 2.8V (Vdd), the chip draws nominal specified current. The power-down pin itself, Pin 16, draws approximately 40uA when 2.8V is applied. Less than 1uA is sourced from the power-down pin when 0V is applied.
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TQ5622 Data Sheet
Package Pinout
Sleep Control LNA Out GND MXR RF IN GND IF OUT/Vdd GND GND
GND 1 RF IN GND VDD LNA LO IN Vdd MXR GND GND 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
Pin Descriptions
Pin Name GND, LNA LNA IN GND VDD LNA MXR LO IN VDD_MXR GND GND GND GND IF OUT GND MXR_RF GND LNA OUT SLEEP Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description and Usage LNA first stage ground connection. Direct connection to ground required. LNA RF input. DC blocked. Requires external matching elements for noise match and match to 50 Ground LNA DC supply voltage. Local external bypass capacitor required. Mixer LO input. DC blocked, matched to 50 Mixer LO buffer supply voltage. Local external bypass capacitor required. Ground Ground Ground Ground IF output. Open drain output, connection to Vdd required. External matching is required. Ground Mixer RF input, DC blocked. Matched to 50. Ground LNA RF Output. DC blocked. Matched to 50. Power-Down mode control.
For ground pins 1,3,7,8,9,10,12, and 14, TriQuint recommends use of several via holes to the backside ground immediately adjacent to the pin.
Package Type: Power QSOP-16 Plastic Package
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TQ5622 Data Sheet
D
NOTE A
E E1 b A e A1 c L
NOTE B
DESIGNATION A A1 b c D e E E1 L NOTES: A.
DESCRIPTION OVERALL HEIGHT STANDOFF LEAD WIDTH LEAD THICKNESS PACKAGE LENGTH LEAD PITCH LEAD TIP SPAN PACKAGE WIDTH FOOT LENGTH FOOT ANGLE
ENGLISH 0.064 +/-.005 in 0.007 +/-.003 in 0.010 +/-.002 in 0.085 +/-.015 in 0.193 +/-.004 in 0.025 BSC 0.236 +/-.008 in 0.154 +/-.003 in 0.033 +/-.017 in 4 +/-4 DEG
METRIC 1.63 +/-.13 mm 0.18 +/-.08 mm 0.25 +/-.05 mm 2.16 +/-.38 mm 4.90 +/-.10 mm 0.635 BSC 5.99 +/-.20 mm 3.91 +/-.08 mm 0.84 +/-.43 mm 4 +/-4 DEG
NOTE C C C C A, C C B, C C
The D dimension does not include mold flashing and mismatch. Mold flashing and mismatch shall not exceed .006 in (.15 mm) per side. The E1 dimension does not include mold flashing and mismatch. Mold flashing and mismatch shall not exceed .010 in (.25 mm) per side.
B.
C. Primary units are English inches. The metric equivalents are subject to rounding error.
Additional Information
For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Email: info_wireless@tqs.com Tel: (503) 615-9000 Fax: (503) 615-8900
For technical questions and additional information on specific applications: Email: info_wireless@tqs.com
The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright (c) 1999 TriQuint Semiconductor, Inc. All rights reserved. Revision A, September 20, 1999
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