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CXG1130AER
Triple Low Noise Amplifier/Dual Mixer
Description The CXG1130AER is a triple low noise amplifier/ dual mixer. This IC is designed using the Sony's GaAs J-FET process. Features * Single 3V power supply operation * 2-pin control by the on-chip logic circuit * High gain: Gp = 16.5dB (LNA typ.) Gc = 10dB (MIX typ.) * Low noise figure: NF = 1.5 to 1.6dB (LNA typ.) NF = 4.5dB (MIX typ.) * Low LO input power operation * 24-pin VQFN small package Applications 800MHz/1.5GHz Japan digital cellular phones (PDC) Structure GaAs J-FET MMIC 24 pin VQFN (Plastic)
Absolute Maximum Ratings (Ta = 25C) * Supply voltage VDD 4.5 V * Input power PIN +13 dBm * Current consumption IDD 15 mA * Operating temperature Topr -35 to +85 C * Storage temperature Tstg -65 to +150 C Recommended Operating Conditions 2.7 to 3.3 * Supply voltage VDD * Control voltage VCTL (H) 2.4 to 3.3 VCTL (L) 0 to 0.3
V V V
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E01827-PS
CXG1130AER
Block Diagram and Pin Configuration
RFin1 RFin2 RFin3
7 6 5 4 3 2 1 19 20 21 22 23 24 RFout2 GND CTL2 GND OPT MIXin2
CAP1
CAP2
12 RFout1 13 GND 14 CTL1 15 MIXin1 16 GND 17 VDD_LO1 18
11
10
9
GND
GND
CAP3
8
Recommended Evaluation Circuit
LNAin_885MHz LNAin_810MHz LNAin_1490MHz
VDD_LO2
LOin1
LOin2
IFout
2.7nH 27nH VDD_LNA800MHz-band 22nH 1nF LNAout_810/885MHz 100pF CTL1 15 MIXin_810/885MHz 10nH 4.7k 16 2.7nH 22nH 17 VDD_LO680/755MHz 1nF 33nH 18 19 39nH LOin_680/755MHz 8.2nH LOin_1360MHz 3.9nH 5pF 150nH IFout_130MHz 100pF 100nH 1nF VDD_MIX 20 21 22 23 24 8.2nH VDD_LO1360MHz 1nF 2 1 8.2nH 1nH 2.7nH 3 470k MIXin_1490MHz 4 10nH 13 18nH 14 5 4.7k CTL2 12 11 10 9 8 7 6.8nH 6 100pF 8.2nH 3.9nH LNAout_1490MHz 22pF 100pF 12pF 15nH VDD_LNA1500MHz-band 1nF
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CXG1130AER
Electrical Characteristics The normalized values are those when the Sony's recommended evaluation board is used. 800MHz Band Low Noise Amplifier Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF1 = 885MHz, fRF2 = 810MHz (Ta = 25C) Item Current consumption Control current Symbol IDD ICTL1 Path -- -- RFIN1 RFOUT1 Power gain Gp RFIN2 RFOUT1 Noise figure Input IP3 Isolation NF IIP3 ISO RFIN1 RFOUT1 RFIN2 RFOUT1 RFIN1 RFOUT1 RFIN2 RFOUT1 RFOUT1 RFIN1 RFOUT1 RFIN2 fRF2 fRF1 fRF2 fRF1 fRF2 fRF1 fRF2 Frequency VCTL1 VCTL2 Min. -- -- -- -- fRF1 H L H L H L H L H L H L H L L L L L L L L L L L L L L L -- -- -- -5 14.5 -- -- 14.5 -- -- -10 -11 22 18 Typ. 2.0 2.0 60 0 16.5 -20 -25 16.5 1.3 1.5 -6.5 -8 26 22 Max. 2.65 2.65 90 5 18.5 -15 -20 18.5 2.0 2.0 -- -- -- -- dB dBm 1 dB When a small signal dB When a small signal Unit mA When no signal A Measurement condition
1 Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = -30dBm.
1.5GHz Band Low Noise Amplifier Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF3 = 1490MHz (Ta = 25C) Item Current consumption Control current Power gain Noise figure Input IP3 Isolation Symbol IDD ICTL2 Gp NF IIP3 ISO Path -- -- RFIN3 RFOUT2 RFIN3 RFOUT2 RFIN3 RFOUT2 RFOUT2 RFIN3 Frequency VCTL1 VCTL2 Min. -- -- fRF3 fRF3 fRF3 fRF3 -- -- -- -- -- -- H H H H H H -- -- 14 -- -9 20 Typ. 2.9 90 16 1.6 -6 23 Max. 3.7 120 18 2.1 -- -- Unit mA A dB dB Measurement condition When no signal When a small signal
dBm 1 dB When a small signal
1 Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = -30dBm.
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CXG1130AER
800MHz Band Mixer Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF1 = 885MHz, fRF2 = 810MHz, fLO = fRF - 130MHz, PLO = -15dBm (Ta = 25C) Item Current consumption Control current Conversion gain Noise figure Input IP3 LO RF leak Symbol RF frequency VCTL1 VCTL2 Min. IDD ICTL2 Gc NF IIP3 Plk -- -- fRF1 fRF2 fRF1 fRF2 fRF1 fRF2 fRF1 fRF2 -- -- -- -- -- -- -- -- -- -- L L L L L L L L L L -- -5 9 8.5 -- -- -1 -0.5 -- -- Typ. 5 0 10 9.5 5 4 +2 +2.5 -21 -24 Max. 6.5 5 11.5 11 6.5 5.5 -- -- -18 -21 Unit Measurement condition mA A dB When a small signal dB dBm 1 dBm fLO = 755MHz fLO = 680MHz When no signal
1 Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = -25dBm.
1.5GHz Band Mixer Conditions: Unless otherwise specified, VDD = 3.0V, VCTL (H) = 3.0V, VCTL (L) = 0V, fRF3 = 1490MHz, fLO = 1360MHz, PLO = -15dBm Item Current consumption Control current Conversion gain Noise figure Input IP3 LO RF leak Symbol RF frequency VCTL1 VCTL2 Min. IDD ICTL2 Gc NF IIP3 Plk -- -- fRF3 fRF3 fRF3 fRF3 -- -- -- -- -- -- H H H H H H -- -- 9 -- -1 -- Typ. 5.5 90 10 4.5 +2 -24 Max. 7.5 120 11.5 6 -- -21
(Ta = 25C)
Unit Measurement condition mA A dB dB When no signal When a small signal
dBm 1 dBm fLO = 1360MHz
1 Conversion from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = -25dBm.
Operation Logic VCTL1 H L -- VCTL2 L L H LNA1 (800MHz_U) LNA2 (800MHz_L) LNA3 (1.5GHz) ON OFF OFF OFF ON OFF OFF OFF ON MIX1 (800MHz) ON ON OFF MIX2 (1.5GHz) OFF OFF ON
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CXG1130AER
Example of Representative Characteristics 1. CXG1130AER frequency characteristics of main items in LNA block (25C) [Condition] VDD = 3V, 800MHz_L (Pin 9 input Pin 13 output): VCTL1 = 0V, VCTL2 = 0V, 800MHz_U (Pin 12 input Pin 13 output): VCTL1 = 3V, VCTL2 = 0V, 1500MHz (Pin 7 input Pin 6 output): VCTL2 = 3V Gp and NF are those when a small signal is input. The input IP3 is converted from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = -30dBm.
Power gain Gp
19 19
Power gain Gp
18
18
Gp [dB]
Gp [dB]
17
800MHz (U)
17 1500MHz 16
16
800MHz (L)
15
15
14 780
800
820
840
860
880
900
920
14 1440
1460
1480
1500
1520
1540
f [MHz]
f [MHz]
Noise figure NF
2.5 2.5
Noise figure NF
2.0
2.0 1500MHz
NF [dB]
800MHz (U) 1.0 800MHz (L)
NF [dB]
920
1.5
1.5
1.0
0.5
0.5
0 780
800
820
840
860
880
900
0 1440
1460
1480
1500
1520
1540
f [MHz]
f [MHz]
Input IP3
-2 -2
Input IP3
-4 800MHz (U)
-4 1500MHz
Input IP3 [dBm]
Input IP3 [dBm]
-6
-6
-8 800MHz (L) -10
-8
-10
-12 780
800
820
840
860
880
900
920
-12 1440
1460
1480
1500
1520
1540
f [MHz]
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f [MHz]
CXG1130AER
2. CXG1130AER frequency characteristics of main items in MIX block (25C) [Condition] VDD = 3V, fLO = fRF - 130MHz, PLO = -15dBm, 800MHz: VCTL2 = 0V, 1500MHz: VCTL2 = 3V Gc and NF are those when a small signal is input. The input IP3 is converted from the IM3 suppression ratio for two-wave input: fRFoffset = 100kHz, PRF = -25dBm.
Conversion gain Gc
12 12 1500MHz 11 800MHz
Gc [dB] Gc [dB]
Conversion gain Gc
11
10
10
9
9
8
8
7 780
800
820
840
860
880
900
920
7 1440
1460
1480
1500
1520
1540
f [MHz]
f [MHz]
Noise figure NF
10 10
Noise figure NF
8
8
NF [dB]
800MHz 4
NF [dB]
6
6 1500MHz 4
2
2
0 780
800
820
840
860
880
900
920
0 1440
1460
1480
1500
1520
1540
f [MHz]
f [MHz]
Input IP3
4 4
Input IP3
3
Input IP3 [dBm] Input IP3 [dBm]
3
1500MHz
2 800MHz 1
2
1
0
0
-1 780
800
820
840
860
880
900
920
-1 1440
1460
1480
1500
1520
1540
f [MHz]
f [MHz]
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CXG1130AER
Recommended Evaluation Board
LNA_800MHz (U) in LNA_800MHz (L) in LNA_1500MHz in
LNA_800MHz out
LNA_1500MHz out
VDD_LNA800MHz
VDD_LNA1500MHz CTL2
MIX_800MHz in
CTL1
MIX_1500MHz in
VDD_Lo800MHz
VDD_Lo1500MHz
LO_800MHz in
VDD_MIX
LO_1500MHz in
SONY
G1130
IFout
Enlarged Diagram of External Circuit Block
LNA15 A15
LNA8 A8
CTL1
CTL2
LO15
Glass fabric-base 4-layer epoxy board Thickness of film between layers 1 and 2: 0.2mm Dimension: 50mm x 66mm
MIX
LO8
C3 L6 C4 C5 L2 L6 L11 C5 L12 L5 L3 L8 L9 L9
L10 C4 C2
L2 L7 L5 L4 R1 L2 L5 L5 L1 C5 C5 L3 C4
C1
L1 = 1nH L2 = 2.7nH L3 = 3.9nH L4 = 6.8nH L5 = 8.2nH L6 = 10nH L7 = 15nH L8 = 18nH L9 = 22nH L10 = 27nH L11 = 33nH L12 = 39nH L13 = 100nH L14 = 150nH
C1 C2 C3 C4 C5
= = = = =
5pF 12pF 22pF 100pF 1nF
R1 = 470
L14
L13 C5 C4
Series resistors of 4.7k to CTL1 and CTL2 are attached on the solder side of the board.
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CXG1130AER
Package Outline
Unit: mm
24PIN VQFN(PLASTIC)
4.0 3.6 C 13 0.7 0.9 0.1 0.05 S 0.6 0.1
18 19
A
12
B
78 4.
9) .3 (0
PIN 1 INDEX 24 7 1 6 0.4 x4 0.2 S A-B C x4 0.2 S A-B C 0.05 M S A-B C
45
S
C
0. 6
0.03 0.03 (1) (Stand Off)
Solder Plating 0.13 0.025 + 0.09 0.14 - 0.03 TERMINAL SECTION
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE VQFN-24P-03 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.04g
LEAD SPECIFICATIONS ITEM LEAD MATERIAL SOLDER PLATING LEAD TREATMENT THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18m
0.2 0.01
0.225 0.03
(0
.1
1.0
5)
-8-
Sony Corporation

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