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ICs for TV AN5819K Sound multiplex demodulator IC for TV in the North American market s Overview The AN5819K is a single chip IC, which includes a sound multiplex demodulator for Zenith TV system and the dbx TV sound noise reduction function. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 Unit: mm 0.50.1 4.80.25 +0.1 s Features * Stereo demodulation, SAP demodulation and dbx noise reduction are integrated into a single chip * Enabling various kinds of adjustment and mode changeover thanks to I2C bus * Built-in input volume (I2C control) for interface with intermediate frequency processing IC 26.70.3 8.40.3 1.050.25 3.050.25 s Applications * TV and VCR for the North American market (A licensing agreement with THAT Corporation is necessary in order to use this IC with built-in dbx-TV noise reduction function.) 3 to 15 10.160.25 0.3 -0.05 SDIP028-P-0400B s Block Diagram VCC 9 V Stereo R-out L-out GND 21 10 17 26 25 8 7 6 5 Pilot det. Matrix LED driver I2C decoder 2 3 SDA 11 Stereo filter St.PLL L+R demod. L-R demod. SAP filter Noise filter V-reg. I-reg. 13 14 28 27 9 SAP demod. SAP noise det. (L-R)/SAP switch 15 dbx de-emph. 1 16 L+R filter L-R filter SAP out filter 75 s de-emph. 4 SAP SCL 1 I2C GND dbx de-emph. 2 dbx wide band dbx spectral Wide band filter Spectral filter 22 23 20 19 18 24 MPX in 12 Input VCA 1.778 0.90.25 1 AN5819K s Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 I2C GND Description Pin No. 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Description ICs for TV (L-R)/SAP demodulation output dbx input (L+R) demodulation output offset cancel Spectral level adjustment Spectral timing Spectral level sensor input GND Wide band level sensor input Wide band timing dbx offset cancel R output L output SAP carrier detection SAP noise level detection SDA SCL SAP LED Stereo LED Pilot signal detection Stereo PLL filter VCC SAP trap filter Quasi sine-wave filter Stereo filter offset cancel Composite input dbx timing current Reference voltage source filter s Absolute Maximum Ratings Parameter Supply voltage Supply current LED drive current Power dissipation *3 *2 *1 Symbol VCC ICC ILED PD Topr Tstg Rating 11.0 75 10 1 143 -20 to +75 -55 to +150 Unit V mA mA mW C C Operating ambient temperature Storage temperature *1 Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25C. *2: Power dissipation shown is for the IC package in free air at Ta = 70C *3: LED drive currents are the currents flowing into pin 4 and pin 5. s Recommended Operating Range Parameter Supply voltage Symbol VCC Range 8.5 to 9.5 Unit V 2 ICs for TV s Electrical Characteristics at VCC = 9.0 V, Ta = 25C * Stereo PLL VCO adjustment: 15.734 kHz 50 Hz * Input level (at 100% modulation) L+R: 0.424 V[p-p] (pre-emphasis off) L-R: 0.848 V[p-p] (dbx noise reduction off) Pilot: 0.084 V[p-p] SAP: 0.254 V[p-p] (dbx noise reduction off) Parameter Total circuit current Mono output level Symbol ICC V0(MON) No signal f = 1 kHz, (mono) 100%mod. f = 300 Hz, (mono) 30%mod. f = 8 kHz, (mono) 30%mod. f = 1 kHz, (mono) 100%mod. Input short-circuit, BPF (A curve) f = 1 kHz, (mono) 100%mod. f = 1 kHz, (L(R)-only) 100%mod. f = 300 Hz, (L(R)-only) 30%mod. f = 3 kHz, (L(R)-only) 30%mod. f = 8 kHz, (L(R)-only) 30%mod. f = 1 kHz, (L(R)-only) 100%mod. f = 15.73 kHz, (fH), V= 0.084 V[p-p], BPF f = 15.73 kHz (fH) f = 15.73 kHz (fH) f = 1 kHz, (SAP) 100%mod. f = 300 Hz, (SAP) 30%mod. f = 3 kHz, (SAP) 30%mod. f = 1 kHz, (SAP) 100% f = 78.7 kHz, (5fH),V= 0.42 V[p-p], BPF f = 78.7 kHz, (5fH) f = 78.7 kHz, (5fH) (SAP) 1 kHz, 100%mod. (Stereo) pilot-signal (Stereo) 1 kHz, 100%mod. (SAP) carrier-signal Pin 27: f = 240 kHz at 5 V applied Pin 27: f = 240 kHz at 5 V applied Conditions Min 35 480 - 0.5 -1.5 - 0.5 420 - 0.7 -1 -2.5 9 -6 350 -1.0 -3 22 -4 38 -5.5 Typ 55 530 0 - 0.4 0 520 0 0 - 0.5 17 500 0 -1.5 AN5819K Max 75 +0.5 +0.4 0.7 -60 +0.5 +0.7 +1 +1.5 1 -60 26 - 0.5 +1.0 +0.5 1.5 -65 53 - 0.5 -50 -50 84 - 0.3 Unit mA 580 mV[rms] dB dB % dBV dB Mono frequency characteristics-1 V1(MON) Mono frequency characteristics-2 V2(MON) Mono distortion ratio Mono noise level THD(MON) VN(MON) (L), (R) output voltage difference VLR(MON) Stereo output level V0(ST) 620 mV[rms] dB dB dB % dBV mV[rms] dB Stereo frequency characteristics-1 V1(ST) Stereo frequency characteristics-2 V2(ST) Stereo frequency characteristics-3 V3(ST) Stereo distortion ratio Stereo noise level Stereo discrimination level THD(ST) VN(ST) VTH(ST) Stereo discrimination hysteresis VHY(ST) SAP output level V0(SAP) 700 mV[rms] dB dB % dBV mV[rms] dB dB dB mV[rms] dB SAP frequency characteristics-1 V1(SAP) SAP frequency characteristics-2 V2(SAP) SAP distortion ratio SAP noise level SAP discrimination level SAP discrimination hysteresis SAP Stereo crosstalk Stereo SAP crosstalk Noise discrimination level THD(SAP) VN(SAP) VTH(SAP) VHY(SAP) CT1 CT2 VTH(NOI) Noise discrimination hysteresis VHY(NOI) 3 AN5819K s Electrical Characteristics at VCC = 9.0 V, Ta = 25C (continued) Parameter I2C interface IACK VIHI VILO fIMAX Maximum pin-2 sink current at ACK 2.0 3.5 0 10 Symbol Conditions Min Typ ICs for TV Max Unit Sink current at ACK SCL, SDA signal input high level SCL, SDA signal input low level Input available maximum frequency 20 5.0 0.9 100 mA V V kbit/s * Design reference data Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed. Parameter Stereo separation (30%)-1 Stereo separation (30%)-2 Stereo separation (30%)-3 Stereo separation (30%)-4 Stereo separation (100%)-1 Stereo separation (100%)-2 Stereo separation (100%)-3 Stereo separation (100%)-4 Stereo separation (10%)-1 Stereo separation (10%)-2 Stereo separation (10%)-3 Stereo separation (10%)-4 SAP Mono crosstalk Mono SAP crosstalk I2C interface Bus free before start Start condition set-up time Start condition hold time Low period SCL, SDA High period SCL Rise time SCL, SDA Fall time SCL, SDA Data set-up time (write) Data hold time (write) Symbol Sep30-1 Sep30-2 Sep30-3 Sep30-4 Sep100-1 Sep100-2 Sep100-3 Sep100-4 Sep10-1 Sep10-2 Sep10-3 Sep10-4 CT3 CT4 Conditions f = 300 Hz, (L(R)-only) 30%mod. f = 1 kHz, (L(R)-only) 30%mod. f = 3 kHz, (L(R)-only) 30%mod. f = 8 kHz, (L(R)-only) 30%mod. f = 300 Hz, (L(R)-only) 100%mod. f = 1 kHz, (L(R)-only) 100%mod. f = 3 kHz, (L(R)-only) 100%mod. f = 8 kHz, (L(R)-only) 100%mod. f = 300 Hz, (L(R)-only) 10%mod. f = 1 kHz, (L(R)-only) 10%mod. f = 3 kHz, (L(R)-only) 10%mod. f = 8 kHz, (L(R)-only) 10%mod. (SAP) 1 kHz, 100%mod. (Mono)1 kHz, 0%mod. (SAP) 1 kHz, 0%mod. (Mono) 1 kHz, 100%mod. Min 22 22 22 12 20 20 20 8 20 20 20 12 Typ 30 30 30 18 30 25 30 11 30 30 30 18 Max -53 -56 Unit dB dB dB dB dB dB dB dB dB dB dB dB dB dB tBUF tSU.STA tHD.STA tLO tHI tr tf tSU.DAT tHD.DAT 4.0 4.0 4.0 4.0 4.0 0.25 0 1.0 0.35 s s s s s s s s s 4 ICs for TV s Electrical Characteristics at VCC = 9.0 V, Ta = 25C (continued) * Design reference data Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed. AN5819K Parameter I2C interface (continued) Symbol Conditions 1LSB = (data (max.)-data (00))/63 Min 0 4.0 Typ Max Unit s s s Acknowledge set-up time Acknowledge hold time Stop condition set-up time DAC 6-bit DAC DNLE tSU.ACK tHD.ACK tSU.STO L6 3.5 0.1 1.0 1.9 LSB Step * DAC timing chart Start condition Slave address ACK Sub address ACK Data byte Stop ACK condition SDA tBUF SCL tSU.STA tHD.STA tr tf tHI tLO tSU.DAT tHD.DAT tLO tSU.STO s Terminal Equivalent Circuits Pin No. 1 2 Equivalent circuit I2C Description GND: * I2C bus DAC GND pin SDA: * I2C bus data input pin Voltage (V) 0 100 k 2 1 k VDD 5V 2.5 V 500 GND 3 SCL: * I2C bus clock input pin 100 k 3 1 k VDD 5V 2.5 V 500 GND 5 AN5819K s Terminal Equivalent Circuits (continued) Pin No. 4 Equivalent circuit Description ICs for TV Voltage (V) VCC SAP LED: * SAP LED connection pin 4 3 k 35 k GND 5 VCC Stereo LED: * Stereo LED connection pin 5 3 k 35 k GND 6 VCC Pilot signal detection: * Stereo pilot signal detection pin VCC 2 6 18 k VCC 2 GND Stereo PLL filter: * Stereo PLL low-pass filter connection pin 2.8 7 VCC 7 6 k 28 k GND 8 9 VCC: * VCC pin VCC VCC 2 VCC SAP trap filter: * SAP trap filter 9 100 VCC 2 GND 6 ICs for TV s Terminal Equivalent Circuits (continued) Pin No. 10 VCC AN5819K Equivalent circuit Description Quasi sine-wave filter: * Low-pass filter pin in quasi-sine wave circuit Voltage (V) VCC 2 10 13.5 k VCC 2 GND 11 VCC Stereo filter offset cancel: * Offset cancel pin for stereo filter output VCC 2 11 10 k VCC 2 GND 12 Composite input: * Composite signal input pin VCC 2 VCC 12 50 k VCC 2 GND 13 VCC dbx timing current: * Timing current setting pin for dbx RMS detection 1.3 13 220 25 k 3.9 V GND 14 VCC 45 k 14 220 45 k GND Reference: * Reference power supply stabilization pin VCC 2 7 AN5819K s Terminal Equivalent Circuits (continued) Pin No. 15 VCC ICs for TV Equivalent circuit Description (L-R)/SAP demodulation output: * (L-R)/SAP demodulation signal output pin Voltage (V) VCC - 0.7 2 15 VCC 2 GND 16 VCC dbx input: * Input signal of (L-R)/SAP signal to dbx NR VCC 2 16 50 k VCC 2 GND 17 VCC (L+R) demodulation output offset cancel: * (L+R) demodulation signal offset cancel pin VCC 2 17 10 k VCC 2 GND 18 VCC Spectral level adjustment: * Variable emphasis level adjustment pin VCC 2 18 360 18 k VCC 2 GND 19 7.5 A 19 15 A GND VCC Spectral timing: * RMS detection recovery time setting pin for variable emphasis 0.2 8 ICs for TV s Terminal Equivalent Circuits (continued) Pin No. 20 VCC AN5819K Equivalent circuit Description Spectral level sensor input: * RMS detection circuit input pin for variable emphasis Voltage (V) VCC 2 3.1 k 20 VCC 2 GND 21 22 GND: * GND pin 0 VCC 2 VCC Wideband level sensor input: * RMS detection circuit input pin for wide band expander 22 4 k VCC 2 GND 23 7.5 A VCC Wideband timing: * RMS detection recovery time setting pin for wide band expander 0.2 23 15 A GND 24 VCC dbx offset cancel: * dbx NR output offset cancel pin VCC 2 24 10 k VCC 2 GND 25 50 25 VCC R output: * R line-out output pin VCC 2 GND 9 AN5819K s Terminal Equivalent Circuits (continued) Pin No. 26 VCC 50 26 ICs for TV Equivalent circuit Description L output: * L line-out output pin Voltage (V) VCC 2 GND 27 VCC SAP carrier detection: * SAP signal carrier level detection pin VCC 2 27 20 k VCC 2 GND SAP noise level setting: * Noise detection pin for SAP malfunction prevention circuit (Mute SAP demodulation at detecting noise) VCC 2 28 VCC a 28 11 A SW b V28>V27 V28 GND 10 ICs for TV s Application Circuit Example AN5819K 7 6.8 k 0.33 F 0.68 F 26 4.7 F L-out 25 4.7 F R-out VCC 9 V 10 0.0033 F GND 6 4.7 F 17 4.7 F Stereo 5 21 8 Pilot det. 4.7 F Matrix LED driver I2 C decoder 2 3 1 SDA SCL I2C GND 11 Stereo filter St. PLL L+R demod. L-R demod. SAP filter Noise filter V-reg. I-reg. SAP demod. SAP noise det. (L-R)/SAP switch dbx de-emph. 1 L+R filter L-R filter SAP out filter 75 s de-emph. 4.7 F MPX in dbx de-emph. 2 dbx wide band dbx spectral Wide band filter Spectral filter 22 12 Input VCA 4 SAP 1 F 23 20 10 F 0.1 F 19 18 3.3 F 0.022 F 24 4.7 F 13 91 k (allowance: 1%) 14 4.7 F 28 10 F 27 15 470 H 1 mH 4.7 F 0.01 F 0.0047 F 2.2 F 16 9 11 |
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