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19-3395; Rev 0; 8/04
MAX9485 Evaluation Kit
General Description
The MAX9485 evaluation kit (EV kit) evaluates the MAX9485, a programmable multiple-output clock generator. The EV kit provides a fixed 27MHz reference clock output, CLK0, and two buffered clock outputs, CLK1 and CLK2. The output frequency is 256, 384, or 768 times the chosen sampling frequency selected through an I2CTM interface or hardwire pins. The sampling frequencies are 12kHz, 32kHz, 44.1kHz, 48kHz, 64kHz, 88.2kHz, and 96kHz. The EV kit operates from a single 3.3V power supply. Low Single 3.3V Supply Controlled 50 Coplanar Traces I2C Interface or On-Board Hardwire Options for Output Clock Selection Fully Assembled and Tested
Features
Evaluates: MAX9485
Ordering Information
PART MAX9485EVKIT TEMP RANGE 0 C to +70 C
o o
IC PACKAGE 20 TSSOP
Component List
DESIGNATION QTY DESCRIPTION 10F 20%, 6.3V X5R ceramic capacitors (0805) Taiyo Yuden JMK212BJ106MG TDK C2012X5R0J106M 0.01F 10%, 16V X7R ceramic capacitors (0402) Taiyo Yuden EMK105BJ103K or Murata GRM36X7R103K016 Not installed, ceramic capacitors (0402) 0.001F 10%, 50V X7R ceramic capacitors (0402) TDK C1005X7R1H102K 4.0pF 0.25pF, 50V C0G ceramic capacitors (0402) TDK C1005C0G1H4R0CT DESIGNATION C20 JU1-JU8 JU9, JU10, JU11 R1 U1 INPUT, CLK0, CLK1, CLK2 Y1 QTY 0 8 3 0 1 4 DESCRIPTION Not installed, ceramic capacitor (0603) 3-pin headers 2-pin headers Not installed, resistor (0402) MAX9485EUP (20-pin TSSOP) SMA edge-mount connectors Through-hole crystal resonator (with 14pF load capacitance) Ecliptek ECX-5527-27.000M Not installed, SMD crystal resonator Shunts MAX9485 PC board
C1, C2, C3
3
C4, C5, C6, C9, C10, C11
6
C7, C8, C17, C18, C19 C12, C13, C14
0
1
3
Y2 None None
0 8 1
C15, C16
2
Component Suppliers
SUPPLIER Ecliptek Murata Taiyo Yuden TDK PHONE 800-433-1280 770-436-1300 800-348-2496 847-803-6100 FAX 714-433-1234 770-436-3030 847-925-0899 847-390-4405 WEBSITE www.ecliptek.com www.murata.com www.t-yuden.com www.component.tdk.com
Note: Indicate that you are using the MAX9485 when contacting these component suppliers. I2C is a trademark of Philips Corp. Purchase of I2C components of Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
MAX9485 Evaluation Kit Evaluates: MAX9485
Quick Start
The MAX9485 EV kit is fully assembled and tested. Do not turn on the power supplies until all connections are completed. the sampling frequency, jumper JU2 controls the frequency-scaling factors, and jumper JU3 sets the sampling rate. See Table 4 for JU1, JU2, and JU3 functions. Jumpers JU4 and JU5 control the SAO2 and SAO1 pins of the MAX9485 device, respectively. See Table 5 for JU5 function, and Table 6 for JU4 function.
Recommended Equipment
* * * 3.3V, 500mA power supply Optional 0.0V to 3.0V, 10mA power supply (for VCXO tuning) Frequency counter(s)/500MHz oscilloscope
Software Mode
To use the I2C-compatible 2-wire interface, make sure a shunt is across pins 2 and 3 of jumper JU6 (MODE = low). Leave jumpers JU1, JU2, and JU3 uninstalled. Connect the external I2C clock to SCL pad and I2C data to SDA pad. At software mode, jumpers JU4 and JU5 set an 8-bit register for the device address; see Table 7 for setting the device address. Refer to the Software Mode Programming section on the MAX9485 IC data sheet for control register bit mapping. Maxim also provides the CMOD232 board for I2C interface. Contact Maxim for details.
Procedure
1) Verify that there are no shunts across JU1 and JU2. Verify that a shunt is across on JU3 (pins 1 and 2). (Set CLK1 and CLK2 at 73.728MHz.) 2) Verify that there is no shunt across JU4, and there is a shunt across JU5 (pins 1 and 2). (CLK0, CLK1, and CLK2 are enabled.) 3) Verify that there are shunts on JU6 (pins 1 and 2) (hardwire mode), JU7 (pins 1 and 2) (internal power reset), and there is a shunt across JU8 (pins 1 and 2). 4) Verify that there is no shunt across JU9, JU10, and JU11. 5) Connect frequency counter(s) to the CLK0, CLK1, and/or CLK2 SMA connectors. 6) Connect the positive of the power supply to VDD, VDDP, and DVDD pads. 7) Connect the power ground to the GND pads. 8) Turn on the power supply, and enable frequency counter(s). 9) Verify output frequency CLK0 is around 27.000MHz, and CLK1 and CLK2 are around 73.728MHz.
Using External Clock as Reference Input
To use an external clock as reference input, remove the crystal on the board (Y1 or Y2), and install a 0 resistor on R1 pads, then connect the external clock to the INPUT connector. In this case, the function of tuning output frequency is invalid.
Table 1. JU6 Function (MODE)
SHUNT LOCATION Pins 1 and 2 (default) Pins 2 and 3 MODE PIN Connected to DVDD Connected to GND OPERATING MODE Hardwire mode Software mode
Detailed Description
The MAX9485 EV kit contains the MAX9485, a programmable multiple-output clock generator. Output CLK0 provides a fixed 27MHz-reference output, and CLK1 and CLK2 provide two buffered clock outputs of 256, 384, or 768 times the chosen sampling frequency selected through an I2C interface or on-board hardwire option. Jumpers JU6, JU7, and JU8 are incorporated to control MODE, RST, and TUN pins of the MAX9485 device, respectively. See Table 1 for JU6 function, Table 2 for JU7 function, and Table 3 for JU8 function.
Table 2. JU7 Function (RST)
SHUNT LOCATION Pins 1 and 2 (default) Pins 2 and 3 RST PIN Connected to DVDD Connected to GND CHIP RESET FUNCTION On-chip internal power-on reset External reset
Table 3. JU8 Function (TUN)
SHUNT LOCATION Pins 1 and 2 (default) Pins 2 and 3 Not installed TUN PIN TUN = DVDD. TUN = 0.0V. To tune VCO frequency, apply a 0.0V to 3.0V power supply to TUN pad.
Hardwire Mode
The EV kit provides on-board hardwire selection. Jumpers JU1-JU5 control pins SCL/FS0, SDA/FS1, FS2, SAO2, and SAO1, respectively. To set the EV kit at hardwire mode, make sure a shunt is across pins 1 and 2 of jumper JU6 (MODE = high). Jumper JU1 controls
2
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MAX9485 Evaluation Kit Evaluates: MAX9485
Table 4. JU1, JU2, and JU3 Functions
JU1 Any Setting Pins 2 and 3 Pins 1 and 2 Not installed Pins 2 and 3 Pins 1 and 2 Not installed (default) SAMPLING FREQUENCY fs (kHz) 12 32 44.1 48 64 88.2 JU3 SAMPLING RATE Standard Standard Standard Standard Double Double CLK1 AND CLK2 FREQUENCY (MHz) JU2 Pins 2 and 3 Pins 2 and 3 Pins 2 and 3 Pins 2 and 3 Pins 2 and 3 Pins 2 and 3 256 x fs 3.072 8.1920 11.2896 12.2880 16.3840 22.5792 JU2 Pins 1 and 2 Pins 1 and 2 Pins 1 and 2 Pins 1 and 2 Pins 1 and 2 Pins 1 and 2 384 x fs 4.608 12.2880 16.9344 18.4320 24.5760 33.8688 JU2 Not installed Not installed Not installed Not installed Not installed Not installed Not installed (default) 768 x fs 9.126 24.5760 33.8688 36.8640 49.1520 67.7376
Not installed Pins 2 and 3 Pins 2 and 3 Pins 2 and 3 Pins 1 and 2 Pins 1 and 2 Pins 1 and 2 (default)
96
Double
Pins 2 and 3
24.5760
Pins 1 and 2
36.8640
73.7280
Table 5. JU5 Function (SAO1)
SHUNT LOCATION Pins 1 and 2 (default) Pins 2 and 3 Not installed SAO1 PIN Connected to DVDD Connected to GND Open CLK0 Enabled Disabled Reserved
Table 6. JU4 Function (SAO2)
SHUNT LOCATION Pins 1 and 2 Pins 2 and 3 Not installed SAO2 PIN Connected to DVDD Connected to GND Floating CLK1 Disabled Enabled Enabled CLK2 Enabled Disabled Enabled
Table 7. Setting Device Address
JU5 Not installed Pins 2 and 3 Pins 1 and 2 Not installed Pins 2 and 3 Pins 1 and 2 Not installed Pins 2 and 3 Pins 1 and 2 SAO1 PIN Open Connected to GND Connected to DVDD Open Connected to GND Connected to DVDD Open Connected to GND Connected to DVDD JU4 Not installed Not installed Not installed Pins 2 and 3 Pins 2 and 3 Pins 2 and 3 Pins 1 and 2 Pins 1 and 2 Pins 1 and 2 SAO2 PIN Open Open Open Connected to GND Connected to GND Connected to GND Connected to DVDD Connected to DVDD Connected to DVDD DEVICE ADDRESS 110 0000 110 0011 110 0010 110 0100 110 1000 111 0000 111 0001 111 0010 111 0100
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3
MAX9485 Evaluation Kit Evaluates: MAX9485
DVDD DVDD
C3 10F 6.3V C6 0.01F C14 0.001F
GND
DVDD 1 SAO2 20 C11 0.01F DVDD 1 3 R2 464 1% C17 OPEN JU5 SAO1 3 JU4 2 SAO2
VDDP VDDP C1 10F 6.3V GND 1 C4 0.01F C12 0.001F GND_P GND1 11 GND2 15 GND3 10 C2 10F 6.3V VDD 17 INPUT R1 OPEN C15 4.0pF Y2 Y1 5 DVDD SCL FS0 1 3 DVDD JU2 SDA FS1 1 3 DVDD FS2 1 3 JU3 9 C9 0.01 F FS2 2 C8 OPEN JU1 7 C7 OPEN SCL/FS0 C16 4.0pF X2 4 VDD2 X1 2
6 VDD1 VDD_P
SAO1
19 C10 0.01F
2
GND
U1 C5 0.01F C13 0.001F MAX9485
MCLK
18 JU9
CLK0
CLK_OUT1
14 C18 OPEN JU10
R3 464 1%
CLK1
CLK_OUT2
16 C19 OPEN JU11
R4 464 1%
CLK2
DVDD 1 JU6 2 MODE
2
MODE
13 3 DVDD 1 JU7 2 RST DVDD 1 3 JU8
8
SDA/FS1
RST
12 3
2
TUN
3 C20 OPEN
2
TUN
Figure 1. MAX9485 EV Kit Schematic
4
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MAX9485 Evaluation Kit Evaluates: MAX9485
Figure 2. MAX9485 EV Kit Component Placement Guide-- Component Side
Figure 3. MAX9485 EV Kit PC Board Layout--Component Side
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5
MAX9485 Evaluation Kit Evaluates: MAX9485
Figure 4. MAX9485 EV Kit PC Board Layout--Inner Layer 2 (GND Layer)
Figure 5. MAX9485 EV Kit PC Board Layout--Inner Layer 3 (DVDD Layer)
6
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MAX9485 Evaluation Kit Evaluates: MAX9485
Figure 6. MAX9485 EV Kit PC Board Layout--Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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