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| Preliminary 8 Link Inverse Multiplexer for ATM (IMA) / UNI PHY FEATURES IMA * Supports up to 8 T1, E1, ADSL or unchannelized links and up to 4 IMA groups with 1 to 8 links/group. * Link and Group State Machines implemented on-chip requiring no real time software in the data path. * Fully compliant with the ATM Forum Inverse Multiplexer for ATM (IMA) 1.1 specification and backward compatible to IMA 1.0. * Supports both independent transmit clock (ITC) and common transmit clock (CTC) modes. * Supports all IMA Group Symmetry modes: Symmetric/Asymmetric configuration and operation. * Differential delay tolerance of 279 ms (for T1 links) and 226 ms (for E1 links). * Performs IMA differential delay calculation and synchronization. * Provides programmable limit on allowable differential delay and minimum number of links per group. * Performs ICP and stuff-cell insertion and removal. * Supports IMA frame length (M) equal to 32, 64, 128, or 256. * Provides IMA layer statistic counts and alarms for support of IMA Performance and Failure Alarm Monitoring and MIB support. * Provides per link counters for statistics and performance monitoring. PM7340 S/UNI(R)-IMA-8 LINE INTERFACE * 8 T1, E1, ADSL or unchannelized links via 2-pin line interfaces. UTOPIA / ANY-PHY INTERFACE * Supports 8- and 16-bit UTOPIA L2 and Any-PHY cell interfaces at clock rates up to 52 MHz. * UTOPIA L2 transmit and receive slave appears as an 8-port multi-PHY. * UTOPIA L2 receive slave can also appear as a single port with the logical port provided as a prepend. * Any-PHY transmit slave appears as an 8 port multi-PHY. The PHY-ID of each cell is identified using in-band addressing. * Any-PHY receive slave appears as a single device. The PHY-ID of each cell is identified using in-band addressing. UNI * Each link is software configurable as either a UNI or part of an IMA group. * Performs receive cell Header Error Check (HEC) checking and transmit cell HEC generation. * Optionally supports receive cell payload unscrambling and transmit cell payload scrambling. * Provides TC layer statistics counts and alarms for MIB support. LOOPBACK AND DIAGNOSTICS * Supports UTOPIA Side Loopback. * Supports Line Side Loopback. * Supports per group ICP cell trace capability. ATM OVER FRACTIONAL T1/E1 * Supports ATM over Fractional T1/E1 compliant with the ATM Forum AF-PHY-0130.00 specification. REFCLK SYSCLK OE RSTB D[15:0] A[10:1] ALE WRB RDB CSB INTB TCK TMS TDI TRSTB TDO BLOCK DIAGRAM DLL MicroProcess I/F JTAG Tx Slave ATM I/F TCLK TPA TENB TADR[6:0] TCSB TSOP TSX TDAT[15:0] TPRTY TSCLK[7:0] TSDATA[7:0] CTSCLK TCAS TC Layer (TTTC-8) 8-chan x 7 cell FIFO (MCFD) Tx IMA Processor (TIMA) 8-chan x 3 cell FIFO AnyPHY/ UTOPIA Tx Slave (TXAPS) IDCC Internal Bus IDCC Rx IMA Protocol Processor (RIPP) AnyPHY/ UTOPIA Rx Slave (RXAPS) Rx Slave ATM I/F RCLK RPA RENB RADR[4:0] RCSB RSOP RSX RDAT[15:0] RPRTY RSCLK[7:0] RSDATA[7:0] RCAS TC Layer (RTTC-8) 8-chan x2 cell FIFO Rx IMA Data Processor (RDAT) Cell Writer Cell Reader 8 chan 4 cell FIFO Memory Interface (MEMI) PMC-2001521 (p3) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE CBCSB CBRASB CBCASB CBWEB CBA[11:0] CBBS[1:0] CBDQM CBDQ[15:0] (c) Copyright PMC-Sierra, Inc. 2001 Preliminary PM7340 S/UNI(R)-IMA-8 8 Link Inverse Multiplexer for ATM (IMA) / UNI PHY SOFTWARE * The S/UNI-IMA device driver, written in ANSI C, provides a well-defined Application Programming Interface (API) and low level utility functions for diagnostics and debugging purposes. * Software wrappers are used for RTOSrelated functions making the S/UNIIMA device driver portable to any Real Time Operating System (RTOS) environment. GENERAL * 16-bit interface for 1M x 16 SDRAM. * Provides a 16-bit microprocessor interface for configuration, statistics gathering and Link and Unit Management. * Provides a standard 5-pin P1149 JTAG port. * Low-power 1.8 V CMOS with TTLcompatible I/O. * 324-pin plastic ball grid array (PBGA) package. APPLICATIONS * * * * DSLAMs. Wireless Basestations. Integrated Access Devices (IADs). Access Concentrators. TYPICAL APPLICATIONS INTEGRATED ACCESS DEVICE (IAD) UTOPIA L2/ Any-PHY UTOPIA L2 T1/E1 x 4 PM4354 COMET-QUAD PM73124 AAL1gator-4 PM7329 S/UNI-APEX1K800 PM7340 S/UNI-IMA-8 PM7328 S/UNI-ATLAS1K800 Clock/ Data PM4354 COMET-QUAD x2 Ethernet Video ATM Interworking Function, AAL5 SAR DSLAM WAN UPLINK UTOPIA L2 / Any-PHY UTOPIA L2 PM7329 S/UNI-APEX1K800 PM7351 S/UNI-VORTEX PM7328 S/UNI-ATLAS1K800 PM7340 S/UNI-IMA-8 Clock/ Data PM4354 COMET-QUAD x2 Head Office: PMC-Sierra, Inc. 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200 To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: info@pmc-sierra.com PMC-2001521 (p3) (c) Copyright PMC-Sierra, Inc. 2001. All rights reserved. August 2001 S/UNI is a registered trademark of PMC-Sierra, Inc. SBI, AAL1gator-4, FREEDM-8, COMET-QUAD, VORTEX, Any-PHY, and PMC-Sierra are trademarks of PMC-Sierra, Inc. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE |
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