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AU9331 USB Secure Digital Card Reader Technical Reference Manual Revision 1.2 (c) 1997-2002 Alcor Micro Corp. All Rights Reserved Copyright Notice Copyright 1997 - 2002 Alcor Micro Corp. All Rights Reserved. Trademark Acknowledgements The company and product names mentioned in this document may be the trademarks or registered trademarks of their manufacturers. Disclaimer Alcor Micro Corp. reserves the right to change this product without prior notice. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. Specifications are subject to change without prior notice. Contact Information: Web site: http://www.alcormicro.com/ Taiwan Alcor Micro Corp. 4F-1, No 200 Kang Chien Rd., Nei Hu, Taipei, Taiwan, R.O.C. Phone: 886-2-8751-1984 Fax: 886-2-2659-7723 Santa Clara Office 2901 Tasman Drive, Suite 206 Santa Clara, CA 95054 USA Phone: (408) 845-9300 Fax: (408) 845-9086 Los Angeles Office 9400 Seventh St., Bldg. A2 Rancho Cucamonga, CA 91730 USA Phone: (909) 483-9900 Fax: (909) 944-0464 Table of Contents 1.0 Introduction-------------------------------------------------------------------------------------1.1 Description---------------------------------------------------------------------------------1.2 Features-------------------------------------------------------------------------------------1 1 1 3 5 7 7 8 9 9 9 9 2.0 3.0 4.0 Application Block Diagram----------------------------------------------------------------Pin Assignment-------------------------------------------------------------------------------System Architecture and Reference Design----------------------------------------4.1 AU9331 Block Diagram-----------------------------------------------------------------4.2 Sample Schematics------------------------------------------------------------------------ 5.0 Electrical Characteristics------------------------------------------------------------------5.1 Recommended Operating Conditions------------------------------------------------5.2 General DC Characteristics -----------------------------------------------------------5.3 DC Electrical Characteristic for 3.3 volts operation ------------------------------- 5.4 Crystal Oscillator Circuit Setup for Characteristics ------------------------------ 10 5.5 ESD Test Results -------------------------------------------------------------------------- 11 5.6 Latch-Up Test Results ------------------------------------------------------------------- 12 6.0 Mechanical Information---------------------------------------------------------------------- 15 TABLE OF CONTENTS i This page Intentionally Left Blank TABLE OF CONTENTS i 1.0 Introduction 1.1 Description The AU9331 is an integrated USB Secure Digital (SD) card reader controller. It supports Secure Digital (SD) and Multimedia Card (MMC) with automatic card type detection capability. It can be used as a removable storage disk in enormous data exchange applications between PC and PC or PC and various consumer electronic devices. The AU9331 can read Secure Digital card's contents created by handheld consumer electronic devices such as digital camera, MP3 player, PDA and mobile phone.., etc. It provides a faster and convenient way of data transfer scheme to meet the emerging need of a data exchange center between PC and various consumer devices. With AU9331, users' experience will be further enhanced by the Plug-and-Play nature built into latest operation systems such as Windows XP and MacOS X. Because of the multiple sectors transfer up to 4G bytes and the single chip integration, AU9331 is the most powerful and cost efficient SD reader controller solution in the market. 1.2 Features Fully compliant with USB v1.1 specification and USB Device Class Definition for Mass Storage, Bulk-Transport v1.0 Fully compliant with Secure Digital (SD) v1.0 Specification. Work with default driver from Windows ME, Windows 2000, Windows XP, Mac OS 9.1, Mac OS X; Linux, Windows 98 and WinCE 3.0 are supported by vendor driver from Alcor. Ping-pong FIFO implementation for concurrent bus operation to increase bandwidth Support multiple sectors transfer up to 4G bytes to optimize performance Support optional external EEPROM for USB VID, PID and string customization LED for bus activity monitoring Runs at 12MHz Built-in 3.3V regulator 28-pin SSOP package INTRODUCTION 1 This Page Intentionally Left Blank INTRODUCTION 2 2.0 Application Block Diagram Following is the application diagram of a typical flash memory card reader using AU9330. By connecting the reader to a PC through USB port, the AU9331 is acting as a bridge between the flash memory card from digital camera, MP3 player, PDA or mobile phone and PC. Digital Camera PC with USB Host Controller MP3 Player PDA USB Flash Card Reader SD/MMC Card Moble Phones PC APPLICATION BLOCK DIAGRAM 3 This Page Intentionally Left Blank APPLICATION BLOCK DIAGRAM 4 3.0 Pin Assignment The AU9331 is packed in 28-SSOP form factor. The following figure shows signal name for each pin and the table in the following page describes each pin in detail. NC XTAL1 XTAL2 VSSA VCCA VCC5V VCCIO USB_DM USB_DP SDA SCK VSSIO TEST NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 AU9331 28-pin SSOP 28 27 26 25 24 23 22 21 20 19 18 17 16 15 NC GPO7 GPI0 GPI1 GPI2 VCCK VSSK SDCMD SDCLK SDDATA SDCD SDWP PWD NC PIN ASSIGNMENT 5 Table 3-1. Pin Descriptions pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Name NC XTAL1 XTAL2 VSSA VCCA VCC5V VCCIO USB_DM USB_DP SDA SCK VSSIO Test NC NC PWD SDWP SDCD SDDATA SDCLK SDCMD VSSK VCCK GPI2 GPI1 GPI0 GPO7 NC IO Type I O Ground PWR PWR PWR I/O I/O I/O O PWR I Description Crystal Oscillator Input (12MHz) Crystal Oscillator Output (12MHz) Analog Ground Analog power supply 5V power supply Regular 3.3V output/ IO 3.3V input USB DUSB D+ EEPROM data inout EEPROM clcok Ground Should connect to Vss O I I I/O O I/O PWR PWR I I I O 0 Power on; 1 Power down SD Write Protect SD Card Detect SD Card Data SD Card Clock SD Card Command Ground Core 3.3V Input Should connect to Vss Should connect to Vss Should connect to Vss General Purpose Output pin, used as activity LED PIN ASSIGNMENT 6 4.0 System Architecture and Reference Design 4.1 AU9331 Block Diagram Alcor Micro - AU9331 Flash Memory Card Reader Block Diagram USB Upstream Port XCVR USB SIE DMA Engine SD/MMC control & S/P SD/MMC BUS Optional Processor ROM RAM EEPROM EEPROM 3.3 V 3.3 V Voltage Regulator PLL 12MHz XTAL SYSTEM ARCHITECTURE AND REFERENCE DESIGN 7 4.2 Sample Schematics VCC FB C1 B TYPE CONNECTOR J1 VCC DATADATA+ GND FGND1 1 2 3 4 5 0.1UF 1UF F1 C2 VCC3.3 R1 FB C3 1UF VSSIO 1.5K F2 C4 0.1UF R2 R3 39 39 XTAL1 XTAL2 VSSA VCCA VCC5V U4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NC XTAL1 XTAL2 AVSS AVCC VCC5V VCCIO USB_DM USB_DP SDA SCK VSSIO TEST NC NC GPO7 GPI0 GPI1 GPI2 VCC VSS SDCMD SDCLK SDDATA SDCD SDWP PWD NC 28 27 26 25 24 23 22 21 20 19 18 17 16 15 GPO7 GPI0 GPI1 GPI2 VCCK VSSK SDCMD SDCLK SDDATA SDCD SDWP R12 1K C14 0.1UF CARD POWER VCC3.3 SDA SCK VSSIO Q1 1N9012 VCC D1 330 R4 GPO7 AU9331-28SSOP ACTIVITY LED VCC VCC5V VCC3.3 FB C6 0.1UF FB F4 F3 C7 0.1UF VSSA VCCA C5 0.1UF CARD POWER CARD POWER R5 R6 R7 R8 VCC3.3 10K 10K SDCMD SDCD VCC3.3 SDCLK C13 0.1UF SDDATA SDWP 100K 100K JP1 9 1 2 SDCD 3 4 5 6 7 8 SDWP SD SOCKET R10 VCC3.3 FB C9 0.1UF FB F6 F5 C10 0.1UF VSSK VCCK VCC3.3 C12 0.1UF 47K SCK SDA U2 8 7 VCC A0 A1 6 WP 5 SCL A2 SDA GND 1 2 3 4 C8 18PF R9 Y1 XTAL1 24C08 or compatible C11 18PF 1M 12MHZ XTAL2 Disclaimer: This schematic is for reference only. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. Specifications are subject to change without notice. Size A Date: Document Number AU9331 USB SD/MMC CARD READER DEMO BOARD Tuesday, May 21, 2002 Sheet 1 of 1 Rev 2.0 SYSTEM ARCHITECTURE AND REFERENCE DESIGN 8 5.0 Electrical Characteristics 5.1 Recommended Operating Conditions SYMBOL VCC VIN TOPR TSTG PARAMETER Power Supply Input Voltage Operating Temperature Storage Temperature MIN 4.75 0 0 -40 TYP 5 MAX 5.25 VCC 85 125 UNITS V V O C O C 5.2 General DC Characteristics SYMBOL IIL IIH IOZ CIN COUT CBID PARAMETER CONDITIONS MIN TYP MAX UNITS Input low current no pull-up or pull-down -1 1 A Input high current no pull-up or pull-down -1 1 A Tri-state leakage current -10 10 A Input capacitance 5 F Output capacitance 5 F Bi-directional buffer capacitance 5 F 5.3 DC Electrical Characteristics for 3.3 volts operation SYMBOL PARAMETER CONDITIONS VIL Input Low Voltage CMOS VIH Input Hight Voltage CMOS VOL Output low voltage IOL=4mA, 16mA VOH Output high voltage IOH=4mA,16mA RI Input Pull-up/down resistance Vil=0V or Vih=VCC MIN 2.3 2.4 10k/200k TYP MAX UNITS 0.9 V V 0.4 V V K ELECTRICAL CHARACTERISTICS 9 5.4 Crystal Oscillator Circuit Setup for Characterization The following setup was used to measure the open loop voltage gain for crystal oscillator circuits. The feedback resistor serves to bias the circuit at its quiescent operating point and the AC coupling capacitor, Cs, is much larger than C1 and C2. Rf=1M-Ohm Cs XIN C1 18pF M IN XOUT C2 18pF M C3 10pF ELECTRICAL CHARACTERISTICS 10 5.5 ESD Test Results Test Description : ESD Testing was performed on a Zapmaster system using the HumanBody -Model (HBM) and Machine-Model (MM), according to MIL_STD 883 and EIAJ IC_121 respectively. Human-Body-Model stress devices by sudden application of a high voltage supplied by a 100 PF capacitor through 1.5 Kohm resistance. Machine-Model stresses devices by sudden application of a high voltage supplied by a 200 PF capacitor through very low (0 ohm) resistance Test circuit & condition Zap Interval : 1 second Number of Zaps : 3 positive and 3 negative at room temperature Critera : I-V Curve Tracing Model HBM MM Model Vdd, Vss, I/C Vdd, Vss, I/C S/S 15 15 TARGET 4000V 200V Results Pass Pass ELECTRICAL CHARACTERISTICS 11 5.6 Latch-Up Test Results Test Description: Latch-Up testing was performed at room ambient using an IMCS-4600 system which applies a stepped voltage to one pin per device with all other pins open except Vdd and Vss which were biased to 5 Volts and ground respectively. Testing was started at 5.0 V (Positive) or 0 V(Negative), and the DUT was biased for 0.5 seconds. If neither the PUT current supply nor the device current supply reached the predefined limit (DUT=0 mA , Icc=100 mA), then the voltage was increased by 0.1 Volts and the pin was tested again. This procedure was recommended by the JEDEC JC-40.2 CMOS Logic standardization committee. Notes: 1. DUT: Device Under Test. 2. PUT: Pin Under Test. Icc Measurement m 1 Source V Supply Vcc Pin under + Untested Input Tied to V supply Trigger Source DUT GND Untested Output Open Circuit + Test Circuit : Positive Input/ output Overvoltage /Overcurrent ELECTRICAL CHARACTERISTICS 12 Icc M easurem ent mA 1 Source Untested Input Tied to V supply Trigger Source V Supply Vcc Pin under test DUT GND Untested Output O pen C ircuit + + Test Circuit : Negative Input/ O utput O vervoltage /O vercurrent Icc Measurement mA V Supply Untested Output Open Circuit Vcc All Input Tied to V supply + DUT GND Supply Voltage test Latch-Up Data Model Voltage Current Vdd-Vxx Model + + Voltage (v)/ Current (mA) 11.0 11.0 200 200 9.0 S/S 5 5 5 Pass 13 Results Pass ELECTRICAL CHARACTERISTICS This Page Intentionally Left Blank ELECTRICAL CHARACTERISTICS 14 6.0 Mechanical Information MECHANICAL INFORMATION 15 |
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