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LR38269
LR38269
DESCRIPTION
The LR38269 is a CMOS digital signal processor for color CCD camera system of 270 k/320 k-pixel CCD with complementary color filters. The camera system consists of CDS/AGC/ADC IC (IR3Y38M), DSP IC (LR38269), and V driver IC (LR36685) with CCD.
Digital Signal Processor for Color CCD Cameras
FEATURES
* Designed for 270 k/320 k color CCDs with Mg, G, Cy, and Ye complementary color filters * Switchable between NTSC and PAL modes * External control interface input/output * Variable GAMMA and KNEE response (Select one out of 4 kinds of GAMMA & KNEE response) * 10-bit digital input * Analog NTSC/PAL composite output by built-in 9bit 1 ch DA converter * Built-in mirror image function * Built-in timing generator to drive CCD * Built-in 2 k-bit EEPROM controller to set the camera adjustment data * Built-in auto exposure control * Built-in auto white balance control * Built-in auto carrier balance control * Single + 3.3 V power supply * Package : 80-pin LQFP (LQFP080-P-1212) 0.5 mm pin-pitch
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LR38269
PIN CONNECTIONS
80-PIN LQFP
FCDS FS RS GND VDD FH2 FH1 FR GND VDD OFDX VH3X VH1X GND VDD V4X V3X V2X V1X VD
TOP VIEW
80
79
78
77
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74
73
72
71
70
69
68
67
66
65
64
63
62
ACL CKI CKO VDD GND ADCK SCK SDATA ADI9 ADI8 ADI7 ADI6 ADI5 ADI4 VDD GND ADI3 ADI2 ADI1 ADI0
61
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
HD Y7 Y6 Y5 Y4 VDD GND Y3 Y2 Y1 Y0 EXCKI DCK2 DCK1 VDD GND EEMD3 EEMD2 EEMD1 EEMDS
21
22
23
24
25
26
27
28
29
30
31
32
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34
35
36
37
38
39
OBCP ADCLP BLKX EEPDA GND VDD EEPCK EEPFL EEPSL WB1 WB2 MIR BLC GNDDA VDDDA VB IREF VREF GNDDA VIDEO
(LQFP080-P-1212)
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40
LR38269
BLOCK DIAGRAM
ADI9-ADI0
OB CLAMPING
4 LINES DELAY
LUMINANCE SIGNAL PROCESS
VIDEO 9-BIT DA Y7-Y0
BLKX, CSYNC HD, VD, ADCLP OBCP
SSG
COLOR SIGNAL PROCESS
DCK1, DCK2
EXCKI
CKI CKO FR, FH1, FH2 V1X-V4X VH1X, VH3X FCDS, FS, RS ADCK TG EEPSL, EEPFL EEPCK, EEPDA
AUTOMATIC CONTROL
EEPROM CONTROL
EEMD2, EEMD3 EEMDS, EEMD1 WB1, WB2, MIR, BLC
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LR38269
PIN DESCRIPTION
PIN NO. SYMBOL 1 ACL 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 CKI CKO VDD GND ADCK SCK SDATA ADI9 ADI8 ADI7 ADI6 ADI5 ADI4 VDD GND ADI3 ADI2 ADI1 ADI0 OBCP ADCLP BLKX EEPDA GND VDD EEPCK EEPFL EEPSL I/O IC OSCI OSCO - - OBF6M OBF4M OBF4M IC IC IC IC IC IC - - IC IC IC IC OBF4M OBF4M OBF4M IO4MU - - IO4MU IC IC POLARITY Initializing input. Input for reference clock oscillation. Connect to CKO (pin 3) with R. Output for reference clock oscillation. The output is the inverse of CKI (pin 2). Supply of +3.3 V power. A grounding pin. Clock output of AD converter, connected to pin 13 of IR3Y38M. Clock output of serial data, connected to pin 16 of IR3Y38M. Serial data output, connected to pin 19 of IR3Y38M. Digital signal input, fed from pin 12 of IR3Y38M (MSB). Digital signal input, fed from pin 11 of IR3Y38M. Digital signal input, fed from pin 10 of IR3Y38M. Digital signal input, fed from pin 9 of IR3Y38M. Digital signal input, fed from pin 8 of IR3Y38M. Digital signal input, fed from pin 5 of IR3Y38M. Supply of +3.3 V power. A grounding pin. Digital signal input, fed from pin 4 of IR3Y38M. Digital signal input, fed from pin 3 of IR3Y38M. Digital signal input, fed from pin 2 of IR3Y38M. Digital signal input, fed from pin 1 of IR3Y38M (LSB). Optical clamp pulse output, connected to pin 32 of IR3Y38M. Clamp pulse output, connected to pin 45 of IR3Y38M. Blanking pulse output, connected to pin 35 of IR3Y38M. Data input from EEPROM output pin. Supply of +3.3 V power. A grounding pin. Clock output to EEPROM clock input pin. This pin keeps high-impedance under high level of pin 29. Control pin of EEPROM. Connect to the pull-up resistor. Control pin of EEPROM. A pull-down resistor should be connected between pin 29 and GND. High level of pin 29 can make data-setting from outside available. White balance mode setting by both WB1 and WB2. Pin 30 0 0 1 1 Pin 31 0 1 0 1 White balance mode AUTO PRESET WB1 PRESET WB2 PRESET WB3 DESCRIPTION
30
WB1
IO4M
31
WB2
IO4M
In digital output mode, pin 30 is assigned to bit 0 (LSB) of U/V signal and pin 31 is assigned to bit 1.
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LR38269
PIN NO. SYMBOL 32 MIR I/O IO4M POLARITY Video output mode setting. L : Normal H : Mirror In digital output mode, this pin is assigned to bit 2 of U/V signal. Backlight compensation selection. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 BLC GNDDA VDDDA VB IREF VREF GNDDA VIDEO EEMDS EEMD1 EEMD2 EEMD3 GND VDD DCK1 IO4M - - DAO DAO DAI - DAO IO4MU IO4MU IO4MU IO4MU - - OBF4M L : OFF H : ON In digital output mode, this pin is assigned to bit 3 of U/V signal. A grounding pin of built-in DA converter. Supply of +3.3 V power of built-in DA converter. Bias voltage output of built-in DA converter, connected to GND through a capacitor. Bias current output of built-in DA converter, connected to GND through a resistor. Bias voltage input of built-in DA converter, connected to +1.0 V power supply. A grounding pin of built-in DA converter. Analog video signal output. Electronic exposure mode setting by EEMDS, EEMD1, EEMD2 and EEMD3. See "Electronic Shutter Speed Setting" in AUTOMATIC CAMERA FUNCTION CONTROL. In digital output mode, 41 to 44 pins are assigned to bits 7 to 4 of U/V signals. A grounding pin Supply of +3.3 V power. Clock output for digital signal output. Output mode setting switches to CSYNC output. ID pulse output for U/V output signal. In digital output, this pin outputs KEIPULSE. 48 DCK2 OBF4M NOTE : KEI-PULSE
At power-on, it keeps low. Both 1/60 s (PAL 1/50 s) as shutter speed and AGC gain more than data of address 78h sets it high.
DESCRIPTION
49 50 51 52 53 54 55 56 57 58
EXCKI Y0 Y1 Y2 Y3 GND VDD Y4 Y5 Y6
IC OBF4M OBF4M OBF4M OBF4M - - OBF4M OBF4M OBF4M
Bit 3 of address 03h sets the function of this pin. 1 : Clock input of 13.5 MHz for digital output 0 : VRI input for analog output Bit 0 (LSB) of digital luminance signal output. Bit 1 of digital luminance signal output. Bit 2 of digital luminance signal output. Bit 3 of digital luminance signal output. A grounding pin. Supply of +3.3 V power. Bit 4 of digital luminance signal output. Bit 5 of digital luminance signal output. Bit 6 of digital luminance signal output.
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LR38269
PIN NO. SYMBOL I/O POLARITY DESCRIPTION 59 Y7 OBF4M Bit 7 (MSB) of digital luminance signal output Horizontal driving pulse output. Either CCD driving timing or BELL-PULSE is selected by output mode setting. 60 HD OBF4M NOTE : BELL-PULSE
Some period with high level every field.
61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
VD V1X V2X V3X V4X VDD GND VH1X VH3X OFDX VDD GND FR FH1 FH2 VDD GND RS FS FCDS
OBF4M OBF4M OBF4M OBF4M OBF4M - - OBF4M OBF4M OBF6M - - OBF12M OBF12M OBF12M - - OBF6M OBF6M OBF6M
Vertical driving pulse output. Either VD or CSYNC with either driving timing or video output timing is selected by output mode setting. Vertical driving pulse output, connected to pin 20 of LR36685. Vertical driving pulse output, connected to pin 21 of LR36685. Vertical driving pulse output, connected to pin 18 of LR36685. Vertical driving pulse output, connected to pin 14 of LR36685. Supply of +3.3 V power. A grounding pin. Vertical driving pulse output, connected to pin 19 of LR36685. Vertical driving pulse output, connected to pin 15 of LR36685. OFD driving pulse output, connected to pin 22 of LR36685. Supply of +3.3 V power. A grounding pin. Reset pulse output, connected to CCD through a capacitor. Horizontal driving pulse output, connected to CCD. Horizontal driving pulse output, connected to CCD. Supply of +3.3 V power. A grounding pin. Sample-hold pulse output, connected to pin 31 of IR3Y38M. Sample-hold pulse output, connected to pin 30 of IR3Y38M. Sample-hold pulse output, connected to both pin 28 and pin 29 of IR3Y38M.
IO4MU OSCI OSCO DAI DAO : Input/output pin with pull-up resistor : Input pin for oscillation : Output pin for oscillation : Input pin for DA converter : Output pin for DA converter
IC OBF4M OBF6M OBF12M IO4M
: Input pin : Output pin : Output pin : Output pin : Input/output pin
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LR38269
INTERNAL COEFFICIENT TABLE
ADDRESS 00h 01h NAME BIT Not used 7 6 5 4 3 2 1 0 02h 7-6 5-4 3 2 1 0 03h 7 6 5 MODE 3 4 3 2 1 0 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h REF_IRIS1 CTLD_01 CTLD_02 REF_IRIS2 UW_E1 UW_E2 UW_E3 UW_E4 UW_E5 UW_E6 UW_E7 UW_E8 CW_E CWP_E CWA_E 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 6-0 6-0 6-0 TV mode Input signal delay Clock polarity to latch input signal YL killer Pin mode selection (NOTE 1) VD output timing selection (NOTE 1) HD output timing selection DCK1 output selection (NOTE 1) Luminance gamma selection Color gamma selection Vertical aperture enhancement Horizontal aperture enhancement Color killer Flicker reduction Polarity selection of SP1 and SP2 Polarity inverter of HG Video format selection UV dot-sequence selection (output stage) UV dot-sequence selection Carrier balance tuning AGC Digital output clock Higher level of exposure reference level Lower level of exposure reference level Exposure reference level with backlight compensation Exposure control weighting factor 1 Exposure control weighting factor 2 Exposure control weighting factor 3 Exposure control weighting factor 4 Exposure control weighting factor 5 Exposure control weighting factor 6 Exposure control weighting factor 7 Exposure control weighting factor 8 Weighting factor of exposure window area Top-left point of exposure window area Bottom-right point of exposure window area 0 : ON 0 : Auto 0 : 9.6 MHz 1 : OFF 1 : Fixed (gain at address 1Bh) 1 : Clock of EXCKI pin Exposure reference level (target of exposure control) 0 : Interlace 1 : Non-interlace 0 : ON 0 : ON 0 : ON 0 : ON 1 : OFF 1 : OFF 1 : OFF 1 : OFF 0 : NTSC 0 : No delay 0 : Normal 0 : Normal 0 : Mode input 0 : TG 1 : PAL 1 : 1 clock cycle delay 1 : Inverted 1 : Killed 1 : U/V output 1 : Video output CONTENTS
MODE 1
MODE 2
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LR38269
ADDRESS NAME 13h EE_DIV_STP LPFE_F LPFE_N 14h 15h 16h P_HEE_IRIS P_LEE_IRIS INT_PEAK BIT 6-4 3-2 1-0 7-0 7-0 6 5 IRIS_DLY1 4 3 2 IRIS_DLY2 1 0 7-5 4-0 CONTENTS Electronic shutter speed pitch 000 : Slower Exposure response speed selection with flicker reduction 00 : Slower 01 : Normal Exposure response speed selection 00 : Slower 01 : Normal 10 or 11 : Quicker 10 or 11 : Quicker
111 : Quicker
Maximum luminance level factor to control exposure Minimum luminance level factor to control exposure Integrated pixels of peak signal 0 : 8 pixels 1 : 4 pixels
Condition of exposure control under locking-in number of images to control exposure. Valid image to control exposure 0 : 1 image 1 : Integrated 3 images 00 : Every image
01 : Every 2 images 10 : Every 4 images 11 : Every 8 images Condition of exposure control under free-running Number of images Valid image to control exposure 01 : Every 2 images 10 : Every 4 images AGC control data Minimum pitch of AGC variable gain Not used AGC gain at power-on AGC reference gain (more than data of 19h) Fixed AGC gain AGC maximum gain Offset control Offset data Coefficient to extract red color signal Coefficient to extract blue color signal Red signal carrier balance Blue signal carrier balance Basic red WB gain Basic blue WB gain Red WB gain at maximum color temperature Red WB gain at minimum color temperature Blue WB gain at minimum color temperature Blue WB gain red at maximum color temperature Red WB data (preset 1) Blue WB data (preset 1) Red WB data (preset 2) Blue WB data (preset 2) Red WB data (preset 3) 0 : Auto 1 : Fixed 0 : 1 image 1 : Integrated 3 images 00 : Every image 11 : Every 8 images 000 : Slower 111 : Quicker
17h
AG_DIV_STP AG_GAIN
DATA should be between 01h (finest pitch) and 1Fh.
18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh 20h 21h 22h 23h 24h 25h 26h 27h 28h 29h 2Ah 2Bh 2Ch I_AGC_D8 REF_AGC_D8 S_38M_GA S_38M_MAX S_38M_OFS CSEPR CSEPB CB_R CB_B K_T_R K_T_B MAX_WBR MIN_WBR MAX_WBB MIN_WBB WBR1 WBB1 WBR2 WBB2 WBR3 7-0 7-0 7-0 2-0 6 5-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0
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LR38269
ADDRESS NAME 2Dh WBB3 2Eh 2Fh 30h 31h 32h 33h 34h 35h 36h 37h 38h K_GA_R K_GA_B REF_GA_R REF_GA_B GA_R1 GA_B1 GA_R2 GA_B2 GA_R3 GA_B3 MAX_IQAREA LPFIQ_F LPFIQ_N FINE 39h 3Ah 3Bh 3Ch 3Dh 3Eh 3Fh 40h 41h 42h 43h 44h 45h 46h AWB_WAIT_C AWB_WAIT_C CMP_CT AWB_HCL AWB_LCL REF_WBPK K_CL K_WBCL UW_IQ1 UW_IQ2 UW_IQ3 UW_IQ4 INT_I_R - Y CW_IQ CWPA_IQ CTLD_AW0 BIT 7-0 7-0 7-0 5-0 5-0 5-0 5-0 5-0 5-0 5-0 5-0 7 6-5 4-3 2 1-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7 6-0 7-4 3-0 7-0 CONTENTS Blue WB data (preset 3) Correction coefficient of R - Y gain Correction coefficient of B - Y gain Basic gain of R - Y signal Basic gain of B - Y signal R - Y gain data (preset 1) B - Y gain data (preset 1) R - Y gain data (preset 2) B - Y gain data (preset 2) R - Y gain data (preset 3) B - Y gain data (preset 3) AWB IQ area selection 0 : Set data Response speed selection with flicker reduction 00 : Slower 01 : Normal 10 or 11 : Quicker Response speed Fine-tuning mode of auto white balance AWB time constant after lock-in (upper 2 bits) AWB time constant after lock-in (lower 8 bits) Valid data to control AWB (01h makes all AWB data valid.) Highest luminance level to be available for AWB control Lowest luminance level to be available for AWB control Offset luminance level to control data of 3Bh and 3Ch Maximum luminance level factor to control data of 3Bh and 3Ch Weighting factor for data of 3Dh and 3Eh AWB control weighting factor 1 AWB control weighting factor 2 AWB control weighting factor 3 AWB control weighting factor 4 AWB control data Weighting factor of AWB window area Top-left point of AWB window area Bottom-right point of AWB window area Exposure level to erase the area to detect white color 0 : I/Q 1 : R - Y/B - Y 1 : Widest
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LR38269
ADDRESS NAME AWB_IP_L 47h 48h 49h 4Ah 4Bh 4Ch 4Dh 4Eh 4Fh 50h 51h 52h 53h 54h 55h 56h 57h 58h 59h 5Ah 5Bh 5Ch 5Dh 5Eh 5Fh 60h 61h 62h 63h 64h 65h 66h 67h AWB_IM_L AWB_QP_L AWB_QM_L AWB_IP_S AWB_IM_S AWB_QP_S AWB_QM_S AWB_I_WH_L AWB_Q_WH_L AWB_I_WH_S AWB_Q_WH_S K_MAT_R K_MAT_B REF_MAT_R REF_MAT_B MAT1 MAT2 MAT3 COL_S COL_H CKI_HCL CKI_LCL CKI_HLGA CKI_HLTI CKI_HECL CKI_EVCL CKI_EGA APT_S APT_H NSUP_R NSUP_B CKI_IEL CKI_ETI 68h APT_HTIM APT_HGA BIT 7-0 7-0 7-0 7-0 7-0 7-0 7-0 7-0 6-0 6-0 6-0 6-0 7-0 7-0 5-0 5-0 7-0 7-0 7-0 7-0 5-0 7-0 7-0 7-4 3-0 7-4 3-0 7-0 7-0 7-4 3-0 7-0 5-0 7-0 7-0 7 6-4 3-1 7-6 5-1 CONTENTS First AWB detector area I-PLUS First AWB detector area I-MINUS First AWB detector area Q-PLUS First AWB detector area Q-MINUS Second AWB detector area I-PLUS Second AWB detector area I-MINUS Second AWB detector area Q-PLUS Second AWB detector area Q-MINUS First AWB white zone I-PLUS First AWB white zone Q-PLUS Second AWB white zone I-MINUS Second AWB white zone Q-MINUS R - Y gain factor for color matrix correction B - Y gain factor for color matrix correction Basic R - Y data of color matrix correction Basic B - Y data of color matrix correction Color matrix data (preset 1) R - Y 4 bits, B - Y 4 bits Color matrix data (preset 2) R - Y 4 bits, B - Y 4 bits Color matrix data (preset 3) R - Y 4 bits, B - Y 4 bits AGC gain to start suppressing color signal Pitch of color signal suppressing by address 5Ah Higher luminance level to start suppressing color signal Lower luminance level to start suppressing color signal Color signal suppression gain for higher luminance signal Color signal suppression gain for lower luminance signal Highlight luminance signal position to suppress color -2 to +2 Lowest luminance signal position to suppress color -2 to +2 Horizontal aperture level to start suppressing color signal Vertical aperture level to start suppressing color signal Horizontal aperture gain to suppress color signal by address 60h Vertical aperture gain to suppress color signal by address 61h AGC gain to start suppressing aperture signal Gain to suppress aperture signal by address 63h R - Y signal coring level B - Y signal coring level Color-killer level 0 : Unity gain 1 : 1/4 gain Horizontal edge signal position to kill color signal -2 to +2 Vertical edge signal position to kill color signal -2 to +2 Horizontal aperture signal position -1 to +1 Horizontal aperture gain
Second area should be closer to the cross point of I-axis and Q-axis, compared to first area.
NOTE :
Data to set first area should be larger than data to set second area.
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LR38269
ADDRESS NAME 69h APT_HCL 6Ah 6Bh 6Ch 6Dh 6Eh 6Fh 70h 71h APT_VGA APT_VCL CBLK_LV SETUP VARI_Y SW_CTRL TG_SEL1 TG_SEL2 ENC_MUTE SYNC_SW SEL_RB OUT_GAIN 72h 73h 74h 75h 76h 77h SYNC_LEV BAS_R BAS_B MUTE_OUT TEST VRI TEST 78h TEST KEI_AGC BIT 6-0 4-0 6-0 7 6-1 4-0 7-0 7-5 4-2 7-5 4-2 7 6 5 4-0 7-0 7-0 7-0 7 6-0 2-0 2 1 0 8 CONTENTS Horizontal aperture signal coring Vertical aperture gain Vertical aperture signal coring CBLK level selection Set up level luminance signal position The following setting is available under both EEPSL = H and digital output mode WB1 (LSB), WB2, BACK, EEMDS, EEMD1 EEMD2, EEMD3, MIR (MSB) ADCK phase setting (6 steps per 60) FS phase setting (2 ns x 3) FCDS phase setting (2 ns x 3) FR phase setting (2 ns x 3) Encoder muting SYNC adder Serial digital data setting Gain of video output amplifier SYNC level (80h = 40 IRE) BURST level of R - Y BURST level of B - Y Muting at power-on Muting period (data multiplied by 1 field period) Test data (EEPROM data must be 00h) EXCKI pin function Test data (EEPROM data must be 0) Test data (EEPROM data must be 0) AGC gain to set KEI-PULSE high 1 : VRI function 0 : Clock input 0 : OFF 0 : ON 1 : ON 1 : OFF 0 : 00h 1 : 10h
(NOTE 1)
ADDRESS Bit 3 DIGITAL 1 ANALOG 0 01 Bit 2 1 0 x 1 0 1 0 Bit 0 0 0 1 0 0 1 1 DCK1 DCK1 DCK1 CSYNC CSYNC CSYNC CSYNC DCK1 (Pin 47) SIGNAL OUTPUT VD (Pin 61) VD for video out VD for CCD driving CSYNC VD for video out VD for CCD driving VD for video out VD for CCD driving HD HD HD HD HD BELL BELL HD (Pin 60)
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LR38269
ABSOLUTE MAXIMUM RATINGS
PARAMETER Power supply voltage Input voltage Output voltage Storage temperature SYMBOL VDD VI VO TSTG RATING -0.3 to +4.3 -0.3 to VDD + 0.3 -0.3 to VDD + 0.3 -55 to +150 UNIT V V V C
RECOMMENDED OPERATING CONDITIONS
PARAMETER Power supply voltage Operating temperature Input clock frequency SYMBOL VDD TOPR fCK MIN. 3.0 -20 TYP. 3.3 +25 28.6 MAX. 3.6 +70 UNIT V C MHz
ELECTRICAL CHARACTERISTICS
PARAMETER Input "Low" voltage Input "High" voltage Input "Low" current Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Output "Low" voltage Output "High" voltage Resolution Linearity error Differential error Full scale current Reference voltage Reference resistance Output load resistance SYMBOL VIL VIH |IIL1| VOL1 VOH1 VOL2 VOH2 VOL3 VOH3 VOL4 VOH4 RES EL ED |IFS| VREF RREF ROUT
6. 7. 8. 9.
(VDD = 3.0 to 3.6 V, TOPR = -20 to +70 C)
CONDITIONS MIN. 0.8 VDD VIN = 0 V IOL = 4 mA IOH = -4 mA IOL = 6 mA IOH = -6 mA IOL = 12 mA IOH = -12 mA IOL = 3 mA IOH = -2 mA VREF = 1.0 V RREF= 4.8 k$ ROUT = 75 $ 13 1.0 4.8 75
Applied Applied Applied Applied to to to to output (OSCO). output (VIDEO). input (VREF). output (IREF).
TYP.
MAX. UNIT V 0.2 VDD V A 0.2 VDD V V 0.2 VDD V V V V V V bit 3.0 1.0 LSB LSB mA V k$ $
NOTE 1 2 3 4 5 6
100 0.8 VDD 0.8 VDD 0.2 VDD 0.8 VDD 0.2 VDD 0.8 VDD 9
7
8 9 7
NOTES :
1. 2. 3. 4. 5. Applied Applied Applied Applied Applied to to to to to inputs (IC, IO4M, IO4MU). input (IO4MU). outputs (OBF4M, IO4M, IO4MU). output (OBF6M). output (OBF12M).
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LR38269
Data Interface
(1) Format of data transfers * Format of transfers : Asynchronous (Based on RS-232C standard) * Bit rate : 9 600 bps * Data length : 8 bits * Parity check : 1 even parity bit * Start bit : 1 bit * Stop bit : 1 bit * Signal voltage level (CMOS)
3.3 V RxD Start Bit GND D0 D1 D2 D3 D4 D5 D6 D7 Even Parity Bit Stop Bit
LSB
MSB
Data Bit
* System configuration
SCK LR38269 SDATA SLDI Dedicated Adjustment Tool by SHARP
RxD PC with Windows TxD
11.6 s
1.4 s
SCK
SDATA
SLDI DSP Address DSP Data 5.8 s
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LR38269
AUTOMATIC CAMERA FUNCTION CONTROL Automatic Electronic Exposure Control
Electronic shutter speed is controlled so that the exposure control data approach to the data of address 04h. Under BLC mode, the data of address 07h is available instead of address 04h. After the exposure control data is less than the data of address 05h, an electronic shutter speed is hold. And then AGC gain is controlled so that the exposure control data will be less than the data of address 06h. In the case of coming more than the data of address 07h, exposure control starts again.
Electronic Shutter Speed Setting
By either hardware or coefficient data, electronic shutter speed below is selectable.
ELECTRONIC SHUTTER SPEED NTSC PAL 1/50 s 1/120 s 1/250 s 1/500 s 1/1 000 s 1/2 000 s 1/5 000 s 1/10 000 s 1/20 000 s 1/50 000 s 1/100 000 s 1/25 s 1/12.5 s 1/6.25 s AUTO 1/50 to 1/100 000 s AUTO 1/50 to 1/100 000 s
EEMDS 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
EEMD1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
EEMD2 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
EEMD3 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1/60 s 1/100 s 1/250 s 1/500 s 1/1 000 s 1/2 000 s 1/5 000 s 1/10 000 s 1/20 000 s 1/50 000 s 1/100 000 s 1/30 s 1/15 s 1/7.5 s
AUTO 1/60 to 1/100 000 s AUTO 1/60 to 1/100 000 s
Slower shutter speed less than 1/60 s (1/50 s of PAL) can make images whose interval is every two fields, every four fields, etc..
VD pulse is also converted to the same frequency as the output image rate.
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LR38269
Electronic exposure control data comes from below equation using averaged luminance levels of 64 areas in one image, made by DSP. Electronic exposure control data = [{Weighted data 1 q x (64 - address 10h) + weighted data 2 w x address 10h} / 64 x (256 - address 14h - address 15h) + top level e x address 14h + bottom level r x address 15h] / 256
Y11 Y21 Y31 Y41 Y51 Y61 Y71 Y81 Y12 Y22 Y32 Y42 Y52 Y62 Y72 Y82 Y13 Y23 Y33 Y43 Y53 Y63 Y73 Y83 Y14 Y24 Y34 Y44 Y54 Y64 Y74 Y84 Y15 Y25 Y35 Y45 Y55 Y65 Y75 Y85 Y16 Y26 Y36 Y46 Y56 Y66 Y76 Y86 Y17 Y27 Y37 Y47 Y57 Y67 Y77 Y87 Y18 Y28 Y38 Y48 Y58 Y68 Y78 Y88
e Top level : The highest luminance data in one image by averaging either 4 pixels or 8 pixels in horizontal. r Bottom level : The lowest luminance data in one image by averaging either 4 pixels or 8 pixels in horizontal.
Auto White Balance Control
White balance control data less than the data of address 51h and address 52h stops AWB. White balance control data less than the data of address 4Fh and address 50h makes AWB active so that white balance control data is less than the data of address 51h and address 52h. In the case of larger than the data of address 4Fh and address 50h, AWB will be active again. White balance data comes from the following equation using averaged I and Q data of 16 areas in one image.
I11 I21 I31 I41 I12 I22 I32 I42 Q12 Q22 Q32 Q42 I13 I23 I33 I43 Q13 Q23 Q33 Q43 I14 I24 I34 I44 Q14 Q24 Q34 Q44
q Weighted data 1 This comes from the following equation weighting in horizontal. Weighting factors are the data from address 08h to address 0Fh. {(Y11 + Y12 + Y18) / 8 x address 08h + (Y21 + Y22 + Y28) / 8 x address 09h : + (Y81 + Y82 + Y88) / 8 x address 0Fh} / 256 = Weighted data 1 The sum from address 08h to address 0Fh shall be 256. w Weighted data 2 Weighting area can be set by the data of address 11h and address 12h. (see "NOTES" in Gamma Characteristic Option) This comes from the following equation weighting in selected areas. (Y33 + Y34 + Y66)/number of areas to be selected = Weighted data 2
Q11 Q21 Q31 Q41
White balance data = {Weighted data 3 q x (64 - address 44h) + weighted data 4 w x address 44h} / 64
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LR38269
q Weighted data 3 I (or Q) data comes from the following equation using the weighting data from address 40h to address 43h. {(I11 + I12 + I14) / 4 x address 40h + (I21 + I22 + I24) / 4 x address 41h : + (I41 + I42 + I44) / 4 x address 43h} / 256 = Weighted data 3 The sum from the data of address 40h to the data of address 43h shall be 256. w Weighted data 4 Weighting area can be selected by address 45h. (see "NOTES" in Gamma Characteristic Option.) Weighted data comes from averaged data in selected area. e White balance area setting The sum of I and Q can be regulated by the luminance level and the color level. Setting target zone : address 47h to address 4Ah White balance data less than the data of address 51h and address 52h changes the target zone of auto white balance to the zone by the data from address 4Bh to 4Eh. Above regulation comes from the following equation along the luminance level. Setting available luminance level range : Highest luminance level limiter = address 3Bh + [{address 3Eh x H peak level + (256 - address 3Eh) x exposure control data} / 256 - address 3Dh] x address 3Fh Lowest luminance level limiter = address 3Ch + [{address 3Eh x H peak level + (256 - address 3Eh) x exposure control data} / 256 - address 3Dh] x address 3Fh
Auto Color Matrix Compensation
Color matrix compensation can be done by R - Y = R - Y (Data 1 x B - Y) B - Y = B - Y (Data 2 x R - Y) Above data comes from below equation along the variation of color temperature. Data 2 = address 55h + {(working R white balance data - address 25h + (address 26h - working B white balance data)} / 32 x address 53h / 8 Data 2 = address 56h + {(working R white balance data - address 25h) + (address 26h - working B white balance data)} / 32 x address 54h / 8
Auto Color Level Compensation
Color level can be auto-controlled by the following equation along the variation of color temperature. B - Y level = address 30h + {(working R white balance data - address 25h) x address 22h + (address 26h - working B white balance data) x address 23h} / 32 x address 2Eh / 8 R - Y level = address 31h + {(working R white balance data - address 25h) x address 22h + (address 26h - working B white balance data) x address 23h} / 32 x address 2Fh / 8
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LR38269
Color Level Suppression Under Lower Illuminance
Working AGC gain can control both R - Y level and B - Y level by the following equation. R - Y level = address 31h x {16 - (working AGC gain - address 5Ah) x address 5Bh / 16} / 16 B - Y level = address 30h x {16 - (working AGC gain - address 5Ah) x address 5Bh / 16} / 16 {16 - (working AGC gain - address 5Ah) x address 5Bh / 16} 16 When (working AGC gain - address 5Ah) 0, ( ) = 0.
Aperture Level Suppression Under Illuminance
Working AGC gain can control both the horizontal aperture level and the vertical aperture level by the following equation. Horizontal aperture level = address 68h x {16 - (working AGC gain - address 63h) x address 64h / 16} / 16 Vertical aperture level = address 6Ah x {16 - (working AGC gain - address 63h) x address 64h / 16} / 16 {16 - (working AGC gain - address 63h) x address 64h / 16} 16 When (working AGC gain - address 63h) 0, ( ) = 0.
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LR38269
Gamma Characteristic Option
(1) Luminance Signal Gamma Option Bit 7 and bit 6 of address 02h can select one out of 4 responses below.
256 224 192 160 OUTPUT 128 96 64 32 11 0 0 64 128 192 256 320 384 448 512 576 640 704 768 832 896 00 01 10 32 11 0 0 64 128 192 256 320 384 448 512 576 640 704 768 832 896 960 960 00 01 10
INPUT
(2) Color Signal Gamma Option Bit 5 and bit 4 of address 02h can select one out of 4 responses below.
256 224 192 160 OUTPUT 128 96 64
INPUT
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LR38269
NOTES :
* Weighting position of auto electronic exposure control (address 11h)
00h 01h * 06h 07h
08h 09h * 0Eh 0Fh
* * * * *
30h 31h * 36h 37h
38h 39h * 3Eh 3Fh
* Weighting area of auto electronic exposure control (address 12h)
00h 01h * 06h 07h
08h 09h * 0Eh 0Fh
* * * * *
30h 31h * 36h 37h
38h 39h * 3Eh 3Fh
* Weighting position of auto white balance control (address 45h)
00h 01h 02h 03h
04h 05h 06h 07h
08h 09h 0Ah 0Bh
0Ch 0Dh 0Eh 0Fh
* Weighting area of auto white balance control (address 45h)
00h 01h 02h 03h
04h 05h 06h 07h
08h 09h 0Ah 0Bh
0Ch 0Dh 0Eh 0Fh
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PACKAGES FOR CCD AND CMOS DEVICES
PACKAGE
80 LQFP (LQFP080-P-1212)
0.08 0.5TYP. 60 61 0.20.08 (1.0) 41 40 0.1250.05 M
(Unit : mm)
12.00.2
14.00.3
13.00.2 0.6375 1.70MAX. 1.400.2 0.10.1
Package base plane
80 1 (1.0) 12.00.2 14.00.3 20
21 (1.0)
(1.0)
20
0.10

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