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19-2398; Rev 1; 7/93
Ultra-Fast ECL-Output Comparator with Latch Enable
_______________General Description
The MAX9685 is an ultra-fast ECL comparator manufactured with a high-frequency bipolar process (fT = 6GHz) capable of very short propagation delays. This design maintains the excellent DC matching characteristics normally found only in slower comparators. The device is pin-compatible with the AD9685 and Am6685, but exceeds their AC characteristics. The MAX9685 has differential inputs and complementary outputs that are fully compatible with ECL-logic levels. Output current levels are capable of driving 50 terminated transmission lines. The ultra-fast operation makes signal processing possible at frequencies in excess of 600MHz. A latch-enable (LE) function is provided to allow the comparator to be used in a sample-hold mode. When LE is ECL high, the comparator functions normally. When LE is driven ECL low, the outputs are forced to an unambiguous ECL-logic state, dependent on the input conditions at the time of the latch input transition. If the latch-enable function is not used, the LE pin must be connected to ground.
____________________________Features
o 1.3ns Propagation Delay o 0.5ns Latch Setup Time o +5V, -5.2V Power Supplies o Pin-Compatible with AD9685, Am6685 o Available in Commercial, Extended-Industrial, and Military Temperature Ranges o Available in Narrow SO Package
MAX9685
______________Ordering Information
PART MAX9685CPE MAX9685CSE MAX9685CJE MAX9685CTW MAX9685C/D MAX9685EPE MAX9685ESE MAX9685MJE MAX9685MTW TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -55C to +125C -55C to +125C PIN-PACKAGE* 16 Plastic DIP 16 Narrow SO 16 CERDIP 10 TO-100 Dice** 16 Plastic DIP 16 Narrow SO 16 CERDIP 10 TO-100
________________________Applications
High-Speed A/D Converters High-Speed Line Receivers Peak Detectors Threshold Detectors High-Speed Triggers
* Contact factory for availability of 20-pin PLCC. ** Contact factory for dice specifications.
__________________________________________________________Pin Configurations
TOP VIEW
GND1 V+ GND1 1 GND2 16 GND2
1
IN+
10 9
V+ 2 IN+ 3 Q OUT IN- 4 N.C. 5
MAX9685
15 N.C. 14 N.C. 13 N.C. 12 Q OUT 11 Q OUT 10 N.C. 9 N.C.
2 3 4
LE
8 7 5
V-
IN-
Q OUT
LE 6 N.C. 7
6
N.C.
V- 8
TO-100
DIP/SO
________________________________________________________________ Maxim Integrated Products
1
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Ultra-Fast ECL-Output Comparator with Latch Enable MAX9685
ABSOLUTE MAXIMUM RATINGS
Supply Voltages.....................................................................6V Output Short-Circuit Duration .......................................Indefinite Input Voltages........................................................................5V Differential Input Voltages .....................................................7.0V Output Current ....................................................................30mA Continuous Power Dissipation (TA = +70C) Plastic DIP (derate 10.53mW/C above +70C) ..........842mW Narrow SO (derate 8.70mW/C above +70C) ............696mW CERDIP (derate 10.00mW/C above +70C) ...............800mW TO-100 (derate 6.67mW/C above +70C) ..................533mW Operating Temperature Ranges MAX9685C_ _ .....................................................0C to +70C MAX9685E_ _ ..................................................-40C to +85C MAX9685M_ _................................................-55C to +125C Storage Temperature Range .............................-55C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = +5V, V- = -5.2V, RL = 50, VT = -2V, TA = +25C, unless otherwise noted.) PARAMETER Input Offset Voltage SYMBOL VOS CONDITIONS RS =100 TA = +25C TA = TMIN to TMAX MAX9685C/E MIN TYP MAX -5 5 -7 7 10 TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX (Note 1) 5 8 20 30 +2.5 MAX9685M MIN TYP MAX -5 5 -8 8 15 5 12 20 40 +2.5 UNITS mV V/C A A V dB 60 60 3 TA = TMIN MAX9685C, MAX9685M Logic Output High Voltage VOH MAX9685E TA = TMAX TA = +25C TA = TMIN TA = TMAX TA = +25C TA = TMIN MAX9685C, MAX9685M Logic Output Low Voltage VOL TA = TMAX TA = +25C TA = TMIN -1.05 -0.89 -0.96 -1.14 -0.88 -0.96 -1.89 -1.83 -1.85 -1.90 -1.83 -1.85 16 20 -0.87 -0.70 -0.81 -0.88 -0.70 -0.81 -1.69 -1.57 -1.65 -1.65 -1.57 -1.65 22 24 32 36 20 16 22 25 32 36 mA mA -1.90 -1.82 -1.85 -1.65 -1.55 -1.65 V -1.16 0.88 -0.96 3 -0.89 -0.69 -0.81 V dB k pF
Temperature Coefficient VOS/T Input Offset Current Input Bias Current Input Voltage Range Common-Mode Rejection Ratio Power-Supply Rejection Ratio Input Resistance Input Capacitance IOS IB VCM CMRR PSRR RIN CIN (Note 1) 60
10 -2.5 80 60
10 -2.5 80
MAX9685E
TA = +25C
TA = TMAX TA = +25C
Positive Supply Current Negative Supply Current 2
ICC IEE
TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX
_______________________________________________________________________________________
Ultra-Fast ECL-Output Comparator with Latch Enable
SWITCHING CHARACTERISTICS
(V+ = 5V, V- = -5.2V, RL = 50, VT = -2V, TA = +25C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS TA = +25C Input to Output High (Notes 1, 2) tpd+ TA = 0C to +70C TA = -55C to +125C TA = +25C Input to Output Low (Notes 1, 2) tpdTA = 0C to +70C TA = -55C to +125C TA = +25C Latch-Enable to Output High (Notes 1, 2) tpd+(E) TA = 0C to +70C TA = -55C to +125C TA = +25C Latch-Enable to Output High (Notes 1, 2) tpd-(E) TA = 0C to +70C TA = -55C to +125C Latch-Enable Pulse Width (Note 2) Minimum Setup Time Minimum Hold Time tpw(E) ts th 3.0 2.0 0.5 0.5 1.0 1.0 3.0 1.2 1.4 1.7 2.0 2.0 2.0 0.5 0.5 1.0 1.0 3.0 ns ns ns 1.2 1.4 1.7 2.0 2.0 1.2 3.0 1.7 ns 1.3 1.5 1.8 2.0 1.7 1.2 2.4 1.7 ns MAX9685C/E MIN TYP MAX 1.3 1.5 1.8 2.0 1.7 1.3 2.4 1.8 ns MAX9685M MIN TYP MAX 1.3 1.8 ns UNITS
MAX9685
Note 1: Not tested, guaranteed by design. Note 2: VIN = 100mV, VOD = 10mV
__________Applications Information
Layout
Because of the MAX9685's large gain-bandwidth characteristic, special precautions need to be taken if its high-speed capabilities are to be used. A PC board with a ground plane is mandatory. Mount all decoupling capacitors as close to the power-supply pins as possible, and process the ECL outputs in microstrip fashion, consistent with the load termination of 50 to 120. For low-impedance applications, microstrip layout at the input may also be helpful. Pay close attention to the bandwidth of the decoupling and terminating components. Chip components can be used to minimize lead inductance. An unused LE pin must be connected to ground.
minimum slew-rate requirements. The tendency of the part to oscillate is a function of the layout and source impedance of the circuit employed. Poor layout and larger source impedance will increase the minimum slew-rate requirement. Figure 1 shows a high-speed receiver application with 50 input and output termination. With this configuration, in which a ground plane and microstrip PC board were used, the minimum slew rate for clean output switching is 1.6V/s. Sine-wave inputs imply a minimum signal size of 360mV RMS at 500kHz and 90mVRMS at 4MHz.
E RMS = Slew Rate 2 2nf
Input Slew-Rate Requirements
As with all high-speed comparators, the high gainbandwidth product of these devices creates oscillation problems when the input traverses through the linear region. For clean switching without oscillation or steps in the output waveform, the input must meet certain
In many applications, the addition of regenerative feedback will assist the input signal through the linear region, which will lower the minimum slew-rate requirement considerably. For example, with the addition of positive feedback components R f = 1k and C f = 10pF, the minimum slew-rate requirement can be reduced by a factor of four.
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_______________________________________________________________________________________
Ultra-Fast ECL-Output Comparator with Latch Enable MAX9685
INPUT 20mV/div OUTPUT 500mV/div 2ns/div
VIN
50 LE
INPUT
50 -2V 50 Rf Cf 50
-0V
OUTPUT
-0.9V -1.7V
Figure 1. Regenerative Feedback. High-speed receiver with 50 input and output termination.
Figure 2. As a high-speed receiver, the MAX9685 is capable of processing signals in excess of 600MHz. Figure 2 is a 100MHz example with an input signal level of 14mVRMS.
The timing diagram (Figure 3) illustrates the series of events that complete the compare function, under worst-case conditions. The top line of the diagram illustrates two latch-enable pulses. Each pulse is high for the compare function and low for the latch function. The first pulse demonstrates the compare function; part of the input action takes place during the compare mode. The second pulse demonstrates a compare-function interval during which there is no change in the input. The leading edge of the input signal (illustrated as a large-amplitude, small-overdrive pulse) switches the comparator after time interval tpd. Output Q and Q transistors are similar in timing. The input signal must occur at time ts before the latch falling edge, and it must be maintained for time th after the edge to be acquired. After th, the output is no longer affected by the input status until the latch is again strobed. A minimum latch pulse width of t pw (E) is needed for the strobe operation, and the output transitions occur after a time tpd(E).
Definition of Terms
VOS Input Offset Voltage--The voltage required between the input terminals to obtain 0V differential at the output. Input Voltage Pulse Amplitude Input Voltage Overdrive Input to Output High Delay--The propagation delay measured from the time the input signal crosses the input offset voltage to the 50% point of an output low-to-high transition.
VIN VOD tpd+
Input to Output Low Delay--The propagation delay measured from the time the input signal crosses the input offset voltage to the 50% point of an output high-to-low transition. tpd+(E) Latch-Enable to Output High Delay--The propagation delay measured from the 50% point of the latch-enable signal low-to-high transition to the 50% point of an output low-tohigh transition. tpd-(E) Latch-Enable to Output Low Delay--The propagation delay measured from the 50% point of the latch-enable signal low-to-high transition to the 50% point of an output highto-low transition. tpw(E) Minimum Latch-Enable Pulse Width--The minimum time the latch-enable signal must be high to acquire and hold an input signal. ts Minimum Setup Time--The minimum time before the negative transition of the latchenable pulse that an input signal must be present to be acquired and held at the outputs. th Minimum Hold Time--The minimum time after the negative transition of the latch-enable signal that an input signal must remain unchanged to be acquired and held at the output.
tpd-
4
_______________________________________________________________________________________
Ultra-Fast ECL-Output Comparator with Latch Enable MAX9685
COMPARE LATCH ENABLE LATCH DIFFERENTIAL INPUT VOLTAGE ts th VIN t pw (E) 50%
VOS VOD t pd t pd (E) 50%
Q
Q
50%
Figure 3. Timing Diagram
_______________________________________________________________________________________
5
Ultra-Fast ECL-Output Comparator with Latch Enable MAX9685
________________________________________________________Package Information
E D A3 A A2 E1
DIM A A1 A2 A3 B B1 C D1 E E1 e eA eB L INCHES MAX MIN 0.200 - - 0.015 0.175 0.125 0.080 0.055 0.022 0.016 0.065 0.045 0.012 0.008 0.080 0.005 0.325 0.300 0.310 0.240 - 0.100 - 0.300 0.400 - 0.150 0.115 INCHES MIN MAX 0.348 0.390 0.735 0.765 0.745 0.765 0.885 0.915 1.015 1.045 1.14 1.265 MILLIMETERS MIN MAX - 5.08 0.38 - 3.18 4.45 1.40 2.03 0.41 0.56 1.14 1.65 0.20 0.30 0.13 2.03 7.62 8.26 6.10 7.87 2.54 - 7.62 - - 10.16 2.92 3.81 MILLIMETERS MIN MAX 8.84 9.91 18.67 19.43 18.92 19.43 22.48 23.24 25.78 26.54 28.96 32.13
21-0043A
L A1 e B D1
0 - 15 C B1 eA eB
Plastic DIP PLASTIC DUAL-IN-LINE PACKAGE (0.300 in.)
PKG. DIM PINS P P P P P N D D D D D D 8 14 16 18 20 24
DIM
D A e B
0.101mm 0.004in.
0-8
A1
C
L
A A1 B C E e H L
INCHES MAX MIN 0.069 0.053 0.010 0.004 0.019 0.014 0.010 0.007 0.157 0.150 0.050 0.244 0.228 0.050 0.016
MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 3.80 4.00 1.27 5.80 6.20 0.40 1.27
E
H
Narrow SO SMALL-OUTLINE PACKAGE (0.150 in.)
DIM PINS D D D 8 14 16
INCHES MILLIMETERS MIN MAX MIN MAX 0.189 0.197 4.80 5.00 0.337 0.344 8.55 8.75 0.386 0.394 9.80 10.00
21-0041A
6
_______________________________________________________________________________________
Ultra-Fast ECL-Output Comparator with Latch Enable
___________________________________________Package Information (continued)
DIM INCHES MIN MAX - 0.200 0.014 0.023 0.038 0.065 0.008 0.015 0.220 0.310 0.290 0.320 0.100 0.125 0.200 0.150 - 0.015 0.070 - 0.098 0.005 - MILLIMETERS MIN MAX - 5.08 0.36 0.58 0.97 1.65 0.20 0.38 5.59 7.87 7.37 8.13 2.54 3.18 5.08 3.81 - 0.38 1.78 - 2.49 0.13 -
MAX9685
E1 A D E
Q L e B S1 S B1 L1
0-15 C
A B B1 C E E1 e L L1 Q S S1
CERDIP CERAMIC DUAL-IN-LINE PACKAGE (0.300 in.)
DIM PINS D D D D D D 8 14 16 18 20 24
INCHES MILLIMETERS MIN MAX MIN MAX - 0.405 - 10.29 - 0.785 - 19.94 - 0.840 - 21.34 - 0.960 - 24.38 - 1.060 - 26.92 - 1.280 - 32.51
21-0045A
D D1
DIM A b b1 D D1 D2 e e1 F k k1 L L1 L2 Q
Q
F
L1 L2
A
L
BASE & SEATING PLANE b b1 e e1
INCHES MAX MIN 0.185 0.165 0.019 0.016 0.021 0.016 0.375 0.335 0.335 0.305 0.160 0.110 0.230 BSC 0.115 BSC 0.040 0.034 0.027 0.045 0.027 0.750 0.500 0.050 0.250 0.045 0.010 36 BSC 36 BSC
MILLIMETERS MIN MAX 4.19 4.70 0.41 0.48 0.41 0.53 8.51 9.40 7.75 8.51 2.79 4.06 5.84 BSC 2.92 BSC 1.02 0.69 0.86 0.69 1.14 12.70 19.05 1.27 6.35 0.25 1.14 36 BSC 36 BSC
21-0023A
k1 k D2
10-PIN TO-100 METAL CAN PACKAGE
_______________________________________________________________________________________
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Ultra-Fast ECL-Output Comparator with Latch Enable MAX9685
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 ___________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1994 Maxim Integrated Products 1993 Printed USA is a registered trademark of Maxim Integrated Products.

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