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PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52797SP/FP
AV SWITCH with I2C BUS CONTROL
DESCRIPTION
The M52797 is AV switch semiconductor integrated circuit with I2C bus control . This IC contains 1-channel of 4-input audio switches and 1channel of 4-input video switches. Each audio switches and video switches can be controled independently . The video switches contain amplifiers can be controled a gain of output 0dB or 6dB .
PIN CONFIGURATION ( TOP VIEW )
FEATURES
*Video and stereo sound switches in one package *Wide frequency range ( video switch )...........DC~20MHz *High separation ( video switch ) .........................Crosstalk -60dB ( typ. ) at 1MHz *Two types of packages are provided : SDIP with a lead pitch of 1.778mm ( M52797SP ) ; and SOP with a lead pitch of 1.27mm ( M52797FP ) .
VCC VCC Lch 2 IN VIDEO 2 IN Rch 2 IN Lch 3 IN VIDEO 3 IN Rch 3 IN Lch 4 IN VIDEO 4 IN Rch 4 IN SCL SDA NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
NC Lch T IN TUNER IN Rch T IN Lch 1 OUT V 1 OUT Rch 1 OUT BIAS V 2 OUT D4 D5 CHIP SELECT GND GND
Outline 28P4B (Lead pitch :1.778mm)
APPLICATION
Video equipment
NC: No connection
PIN CONFIGURATION ( TOP VIEW ) RECOMMENDED OPERATING CONDITION
Supply voltage Rated supply voltage Maximum output current 4.7V~9.3V 5V,9V 24mA(at 9V)
VCC Lch 2 IN VIDEO 2 IN Rch 2 IN Lch 3 IN VIDEO 3 IN Rch 3 IN Lch 4 IN VIDEO 4 IN Rch 4 IN SCL SDA
1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13
Lch T IN TUNER IN Rch T IN Lch 1 OUT V 1 OUT Rch 1 OUT BIAS V 2 OUT D4 D5 CHIP SELECT GND
Outline 24P2N-B (Lead pitch :1.27mm)
MITSUBISHI
1-9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52797SP/FP
AV SWITCH with I2C BUS CONTROL
BLOCK DIAGRAM
VCC
TUNER IN VIDEO 2 IN VIDEO 3 IN VIDEO 4 IN
1 26
2
0/6dB
4 7 10
0dB
V-SW
23
V 1 OUT
20
V 2 OUT
Rch T IN Rch 2 IN Rch 3 IN Rch 4 IN 11 25 5 8
R-SW R-MODE
R M L
0dB
22
Rch 1 OUT
Lch T IN Lch 2 IN Lch 3 IN Lch 4 IN 6 9
L-SW
27 3
L-MODE
L M R
0dB
24
Lch 1 OUT
BIAS 21
BIAS
14 28 15 GND 16
I2C Control
19 18 D4 D5 17
13 12
SDA SCL
NC
CHIP SELECT
(at 28P4B)
MITSUBISHI
2-9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52797SP/FP
AV SWITCH with I2C BUS CONTROL
DESCRIPTION OF PIN
Pin No.
1 2 3 5 6 8 9 11 25 27 4 7 10 26
Name
Vcc Lch 2 IN Rch 2 IN Lch 3 IN Rch 3 IN Lch 4 IN Rch 4 IN Rch T IN Lch T IN VIDEO 2 IN VIDEO 3 IN VIDEO 4 IN TUNER IN
Peripheral circuit pins
DC voltage(V)
9V 4.7V
Remarks
5~9V
30K
3.6V
Clamp in
12
SCL
VIL max.=1.5V VIH min.=3.0V
13
SDA
VIL max.=1.5V VIH min.=3.0V VOL max.=0.4V (at Iin=3mA)
15 16 17
GND CHIP SELECT
70K
30K
SLAVE ADDRESS 0~1.5V-----90H 2.5V~Vcc--92H OPEN------90H
MITSUBISHI
3- 9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52797SP/FP
AV SWITCH with I2C BUS CONTROL
DESCRIPTION OF PIN (cont.)
Pin No.
18 19
Name
D5 D4
Peripheral circuit pins
DC voltage(V)
Remarks
VOL max.=0.4V (at Iin=1mA)
20
V 2 OUT
SYNC CHIP DC=2.2V
23
V 1 OUT
SYNC CHIP DC=2.9V
5K
5K
21
BIAS
4.2V
30K
22 24
Rch 1 OUT Lch 1 OUT
4.0V
1.5K
1.5K
15K
MITSUBISHI
4 -9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52797SP/FP
AV SWITCH with I2C BUS CONTROL
I C BUS
I 2C BUS(Inter IC BUS)is multi master bus system developed by PHILIPS . Two wires ( SDA - serial data, SCL - serial clock ) realize functions of start , stop , transferring data , synchronization and arbitration. The output stages of device connected to the bus must have an open drain or open collector in order to perform the wired-AND function .
2
SDA A MSB SCL
S P
A MSB LSB
LSB
1
2
3
4
5
6
7
8
9
1
2
9
S ; Start condition, a high to low transition of the SDA line while SCL is high P ; Stop condition, a low to high transition of the SDA line while SCL is high A ; Acknownledge Every byte put on the SDA line must be 8-bits long . Each byte has to be followed by an acknowledge bit. Data is transferred with the most significant bit (MSB ) first . The data on the SDA line must be stable during the HIGH period of the clock . The HIGH or LOW state of the data line can only change when the clock signal on the SCL line is LOW .
CONTROL
This IC controls channel switchs with 1-byte data ( DATA1) .
S
SLAVE ADDRESS A
DATA1
A
P
S : Start A : Acknowledge P : Stop
SLAVE ADDRESS
1 0 0 1 0 0 X 0
R/W bit Usually 0 ( W : Master transmitter transmits to slave receiver ) Possible to select 17PIN Hi:1,Lo:0
(at 28P4B)
MITSUBISHI
5 -9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52797SP/FP
AV SWITCH with I2C BUS CONTROL
Data byte format
M52797 FUNCTION TABLE S SLAVE ADDRESS SLAVE ADDRESS SLAVE ADDRESS
A
DATA(D7~D0)
A
P
A6 1
A5 0
A4 0
A3 1
A2 0
A1
A0 0 0/1
R/W 0
DATA1 CONT DATA CONT VIDEO SW CONT DATA V-SW D1 D0 0 0 1 1 AUDIO SW CONT MODE DATA D1 D0 0 0 1 1 AMP GAIN CONT. DATA AMP D3 V AMP1 0 0dB 1 6dB
D7
D6 AUDIO MODE
D5 I/O
D4 I/O
D3 V AMP
D2
D1
D0 SW CONT
OUT V OUT 0 1 0 1 T IN V 2 IN V 3 IN V 4 IN
AUDIO MODE CONT DATA D7 D6 0 0 1 1
MODE 0 1 0 1 MUTE R/R L/L NORMAL
0 1 0 1
MUTE OUT Lch OUT 1 MUTE MUTE MUTE MUTE
R/R OUT Rch OUT 1 Lch OUT 1 MUTE Rch T IN MUTE Rch 2 IN MUTE Rch 3 IN MUTE Rch 4 IN I/O CONT. DATA D4
L/L OUT Rch OUT 1 Lch OUT 1 Rch T IN Lch T IN Rch 2 IN Lch 2 IN Rch 3 IN Lch 3 IN Rch 4 IN Lch 4 IN
NORMAL OUT Rch OUT 1 Lch OUT 1 Lch T IN Lch T IN Lch 2 IN Lch 2 IN Lch 3 IN Lch 3 IN Lch 4 IN Lch 4 IN
Rch OUT 1 Rch T IN Rch 2 IN Rch 3 IN Rch 4 IN
OUT D4 OUT 0 HI 1 LO
DATA D5
OUT D5 OUT 0 HI 1 LO
MITSUBISHI
6 -9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52797SP/FP
AV SWITCH with I2C BUS CONTROL
ELECTRICAL CHARACTERISTICS
Parameter Supply voltage Circuit current VIDEO Symbol Vcc Vcc=9V,Vin=0Vp-p ,Rl= Icc Vcc=5V,Vin=0Vp-p ,Rl= Test condition
(Ta=25C,Vcc=9V,unless otherwise noted) Min. 4.7 Typ. 24 20 Max. 9.3 32 27 mA Unit V
f=100kHz,1Vp-p (0dB)(T V1OUT) Voltage gain Frequency characteristics Dynamic Range Input impedance Crosstalk AUDIO f=1kHz ,1Vp-p (Vcc9V)(RT R1OUT) Voltage gain
Frequency characteristics
G F
-0.5 5.5 -2.0 -2.0 4 2 -
0 6 0 0 -60
0.5 6.5 2.0 2.0 -54 dB Vp-p k dB dB
f=100kHz,1Vp-p (6dB)(T V1OUT) f=10MHz/100kHz,1Vp-p (0dB)(T V1OUT) f=10MHz/100kHz,1Vp-p (6dB)(T V1OUT)
D ZIV CT
Vcc=9V(0dB)(T V1OUT) Vcc=5V(0dB)(T V1OUT) Clamp in(T,V2,V3,V4)
f=100kHz Maximum with distortion<1.0%
f=1MHz,1Vp-p T V1OUT (at V2 mode)
-0.5 -0.5 -2.0 5.5 -20 22 -
0 0 0 0.01 6.0 0 30 -90
0.5 0.5 1.0 0.05 20 38 -84 dB dB % Vp-p mV k dB
G F
f=1kHz ,1Vp-p (Vcc5V)(RT R1OUT) f=100kHz/1kHz , 1Vp-p(RT R1OUT) f=1kHz,2Vp-p,at 400HzHPF+30kHzLPF (RT R1OUT) f=1kHz ,Maximum with distortion<0.5% (RT R1OUT) (MODE:RT,R2,R3,R4 R1OUT ) (RT,R2,R3,R4,LT,L2,L3,L4 ) 1kHz,1Vp-p RT R1OUT(at R2 mode)
Total harmonic distortion THD
Dynamic Range
D
Output DC offset voltage VOFF
Input impedance Crosstalk
Z1 CT
MITSUBISHI
7 -9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52797SP/FP
AV SWITCH with I2C BUS CONTROL
ELECTRICAL CHARACTERISTICS
Parameter Symbol I2C BUS CONTROL SIGNAL Max. input high voltage Min. input low voltage Low level output voltage(SDA) High level input current Low level input current SCL clock frequency
Time of bus must be free before a new transmission can start
(Ta=25C,Vcc=9V,unless otherwise noted) Test condition Min. Typ. Max. Unit
Hold time at start condition The low period of the clock The high period of the clock Setup time for start condition Hold time DATA Setup time DATA
Rise time of both SDA and SCL line Fall time of both SDA and SCL line
Setup time for stop condition
VIH VIL VOL IIH IIL fSCL tBUF tHD;STA tLOW tHIGH tSU;STA tHD;DAT tSU;DAT tR tF tSU;STO
3.0 0.0 SDA = 3mA SDA , SCL = 4.5 V SDA , SCL = 0.4 V 0.0 -10 -10 0.0 4.7 4.0 4.7 4.0 4.7 5.0 250 4.0
-
5.0 1.5 0.4 10 10 100 1000 300 S nS S kHz A V
I 2 C BUS CONTROL SIGNAL
SDA
tBUF tR tF tHD;STA
SCL
P S
tLOW tHD;STA tHD;DAT tHIGH tSU;DAT tSU;STA tSU;STO
Sr
P
MITSUBISHI
8-9 AUG.'98
PRELIMINARY
Notice. This is not a final specification. Some parametric limits are subject to change.
MITSUBISHI ICs (AV COMMON)
M52797SP/FP
AV SWITCH with I2C BUS CONTROL
Application Circuit Example
0.01u 100u
VCC
1 VCC 2 VCC
10u
NC 28
10u
Lch T IN 27
0.47u
3 Lch 2 IN
75 0.47u
TUNER IN 26
10u 75
4 VIDEO 2 IN
10u
Rch T IN 25 Lch 1 OUT 24 V 1 OUT 23 Rch 1 OUT 22
10u 75
5 Rch 2 IN
10u
6 Lch 3 IN
75 0.47u
75
7 VIDEO 3 IN
10u
8 Rch 3 IN
10u
BIAS 21 V 2 OUT 20
10K
9 Lch 4 IN
75 0.47u
10 VIDEO 4 IN
10u
D4 19
10K
11 Rch 4 IN
10K
D5 18 CHIP SELECT 17 slave address Cange(VCC/GND) GND 16 GND 15
5V
10K
220
12 SCL
220
5V
13 SDA 14 NC
(at 28P4B)
Note how to use this IC Input signal with sufficient low impedance to input terminal. The capacitance of output terminal as small as possible. Set the capacitance between Vcc and GND near the pins if possible. Assign an area as large as possible for grounding. Power-on Reset The M52797 has an intermal power-on reset function that sets each control r egister to "0" during IC power ON. The power-on reset VTH has 2.5V.
MITSUBISHI
9 -9 AUG.'98

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