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| SM5852DS NIPPON PRECISION CIRCUITS INC. Digital Audio Processor LSI OVERVIEW The SM5852DS is a digital signal processor IC that performs XBS (extra bass system), LIVE (pseudosound field) and ASC (train position) processing for use in digital audio reproduction equipment. It is designed for use with a 44.1 kHz sampling frequency. PINOUT LRCI BCKI DI 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 DB/DS MOD2 MOD1 OPT VDD LRCO BCKO DOUT SM5852DS FEATURES s s s s s CLK VSS s s s s s s s 2-channel processing XBS/LIVE functions XBS/LIVE processing bypass mode ASC function ON/OFF switching Input-level dependent dynamic gain characteristics Serial input/output interface 2s complement, MSB first, 16-bit 384fs system clock 23 x 23-bit multiplier/30-bit high-precision accumulator TTL-compatible input/output 3.2 to 5.5 V operating voltage range 16-pin SOP Molybdenum-gate CMOS RSTN TESTN MUTEN PACKAGE DIMENSIONS 16-pin SOP (Unit: mm) ORDERING INFOMATION 5.50.3 8.00.3 0.170.05 6.80.3 0 to 15 SM5852DS 16pin SOP 10.160.3 10.5 MAX 0.6350.15 1.270.15 0.40.15 NIPPON PRECISION CIRCUITS--1 2.00.2 0.10.1 8.00.3 Device Package SM5852DS BLOCK DIAGRAM LRCI BCKI DI Input data Interface DSP Block System Clock VDD VSS CLK RSTN TESTN Sequence Control Output data Interface LRCO BCKO DOUT MUTEN Mute Control DB/DS OPT MOD1 MOD2 Mode Control NIPPON PRECISION CIRCUITS--2 SM5852DS PIN DESCRIPTION Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Name LRCI BCKI DI CLK VSS RSTN TESTN MUTEN DOUT BCKO LRCO VDD OPT MOD1 MOD2 DB/DS I/O1 Ip Ip Ip I - Ip Ip Ip O O O - Ip Ip Ip Ip Input data sample rate (fs) clock input Bit clock input Serial data input Clock input Ground System reset initialization. Reset when LOW. Test mode input. Testing when LOW. Mute input. Muting when LOW. Serial data output Bit clock output Output data sample rate (fs) clock output 3.2 to 5.5 V supply ASC ON/OFF switch control. OFF when HIGH, and ON when LOW. XBS/LIVE low-pass gain select inputs. The XBS/LIVE function is bypassed when both MOD1 and MOD2 are HIGH. LIVE ON/OFF switch control. OFF when HIGH, and ON when LOW. The LIVE function is bypassed when both MOD1 and MOD2 are HIGH. Description 1. Ip = Input pin with pull-up resistor. Accordingly, they can be left open for HIGH-level input. NIPPON PRECISION CIRCUITS--3 SM5852DS SPECIFICATIONS Absolute Maximum Ratings VSS = 0 V Parameter Supply voltage Input voltage Storage temperature Power dissipation Soldering temperature Soldering time Symbol V DD V IN T stg PD Tsld tsld Condition Rating -0.3 to 7.0 V SS - 0.3 to V DD + 0.3 -55 to 125 250 255 10 Unit V V C mW C s Recommended Operating Conditions VSS = 0 V Parameter Supply voltage Operating temperature Symbol V DD Topr Condition Rating 3.2 to 5.5 -20 to 80 Unit V C DC Characteristics Standard voltage: VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = -20 to 80 C Rating Parameter Current consumption1 Input voltage for all inputs2 Symbol IDD V IH V IL Output voltage for all outputs3 Input leakage current for all inputs1 CLK input leakage current Input current for all inputs except CLK VOH VOL ILH ILL IIL IOH = -0.4 mA IOL = 1.6 mA V IN = V DD V IN = 0 V V IN = 0 V Condition min V DD = 5.0 V - 2.4 - 2.5 - - - - typ 16 - - - - - - - max 23 - 0.5 - 0.4 1.0 1.0 20 mA V V V V A A A Unit 1. fCLK = 384fs = 16.9344 MHz, no output load, input data conformance with NPC test pattern 2. LRCI, BCKI, DI,RSTN, TESTN, MUTEN, OPT, MOD1, MOD2, DB / DS 3. LRCO, BCKO, DOUT Low voltage: VDD = 3.2 to 4.5 V, VSS = 0 V, Ta = -20 to 70 C Rating Parameter Current consumption1 Input voltage for all inputs2 Symbol IDD V IH V IL Output voltage for all outputs3 Input leakage current for all inputs CLK input leakage current Input current for all inputs except CLK 1. 2. 3. VOH VOL ILH ILL IIL IOH = -0.2 mA IOL = 0.8 mA V IN = V DD V IN = 0 V V IN = 0 V Condition min V DD = 3.4 V - 2.4 - 2.5 - - - - typ 7 - - - - - - - max 10 - 0.5 - 0.4 1.0 1.0 12 mA V V V V A A A Unit fCLK = 384fs = 16.9344 MHz, no output load, input data conformance with NPC test pattern LRCI, BCKI, DI,RSTN, TESTN, MUTEN, OPT, MOD1, MOD2, DB / DS LRCO, BCKO, DOUT NIPPON PRECISION CIRCUITS--4 SM5852DS AC Characteristics Standard voltage: VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = -20 to 80 C Low voltage: VDD = 3.2 to 4.5 V, VSS = 0 V, Ta = -20 to 70 C CLK (384fs) Rating Parameter Clock pulsewidth Clock cycle time Symbol tCW tCY Condition min 24 55 typ - 59 max 500 1000 ns ns Unit tcy CLK VIH 1.5VDD tCW RSTN tCW VIL Rating Parameter Symbol Condition min At power-ON Reset LOW-level pulsewidth tRST At all other times 1 50 typ - - max - 1000 s ns Unit 3.2V VDD tRST 1sec tRST RSTN 1.5V RSTN should be set LOW at power-ON and after reacquiring synchronization. Note that if RSTN is LOW for longer than 1 s, a through-current flows in the internal dynamic circuits because the internal clock is stopped. The through-current has no rated value, so the reset pulse should be kept as short as possible at all times other than at power-ON. NIPPON PRECISION CIRCUITS--5 SM5852DS Serial input timing Rating Parameter BCKI pulsewidth BCKI cycle time DI setup time DI hold time LRCI setup time LRCI hold time Symbol tBCIW tBCIY tDIS tDIH tLIS tLIH Condition min 100 200 75 75 75 75 typ - - - - - - max - - - - - - ns ns ns ns ns ns Unit BCKI 1.5V tBCIW tBCIY DI tBCIW 1.5V tDIS LRCI tDIH 1.5V tLIS tLIH DB/DS, OPT Rating Parameter Minimum pulsewidth Symbol tW Condition min 2/fs typ - max - ns Unit When DB/DS or OPT change state, the input level must be constant for a minimum of 2/fs (2 x LRCI cycle time). Input levels of duration less than 2/fs may be ignored. NIPPON PRECISION CIRCUITS--6 SM5852DS Serial output timing Rating Parameter BCKO pulsewidth BCKO cycle time DOUT, LRCO output delay time Symbol tBCOW tBCOY tDHL tDLH Condition min 15 pF load 15 pF load 15 pF load 15 pF load 180 400 -20 -20 typ 1/96fs 1/48fs - - max - - 60 60 ns ns ns ns Unit BCKO 1.5V tBCOW tBCOW tBCOY 1.5V DOUT LRCO tDHL tDLH NIPPON PRECISION CIRCUITS--7 SM5852DS Filter Characteristics ASC filter frequency response (theoretical) +3 0 -3 -6 Attenuation (dB) -9 -12 -15 -18 -21 -24 -27 -30 1K 2K 5K 7K 10k 20K 50K 100K Frequency (Hz) NIPPON PRECISION CIRCUITS--8 SM5852DS XBS Gain Characteristics DB/DS = HIGH L ch. = R ch. = -35dB same phase data input 20 10 0 Attenuation (dB) -10 -20 MOD1=L,MOD2=H MOD1=L,MOD2=L MOD1=H,MOD2=L MOD1=H,MOD2=H -30 -40 -50 -60 10 20 50 100 200 500 1K 2K 5K 10K 20K Frequency (Hz) DB/DS = LOW L ch. = R ch. = -35dB same phase data input 20 10 0 Attenuation (dB) -10 -20 MOD1=L,MOD2=L MOD1=H,MOD2=H MOD1=H,MOD2=L MOD1=L,MOD2=H -30 -40 -50 -60 10 20 50 100 200 500 1K 2K 5K 10K 20K Frequency (Hz) NIPPON PRECISION CIRCUITS--9 SM5852DS XBS frequency response (DB/DS = HIGH) 0 -10 -20 Ooutput (dB) -30 -40 -50 -60 -70 -80 -90 -90 -80 MOD1=L,MOD2=H MOD1=L,MOD2=L MOD1=H,MOD2=H MOD1=H,MOD2=L -70 -60 -50 -40 -30 -20 -10 0 Input (dB) XBS + LIVE frequency response (DB/DS = LOW) 0 -10 -20 Ooutput (dB) -30 -40 -50 -60 -70 -80 -90 -90 -80 MOD1=H,MOD2=L MOD1=L,MOD2=L MOD1=H,MOD2=H MOD1=L,MOD2=H -70 -60 -50 -40 -30 -20 -10 0 Input (dB) NIPPON PRECISION CIRCUITS--10 SM5852DS FUNCTIONAL DESCRIPTION Signal Flow Lch. IN ASC LIVE XBS Soft Mute Lch. OUT Rch. IN ASC Soft Muting Soft Mute Rch. OUT ASC Function The ASC (train position) function uses a 7 kHz bandlimited filter to cut-off sound leakage from headphones. The ASC function is OFF when OPT is HIGH, and ON when OPT is LOW. Soft muting is active when MUTEN is LOW. When MUTEN is LOW, the attenuation changes smoothly from 0 to - dB in 1024/fs, or approximately 23.2 ms. When MUTEN goes HIGH, soft muting is released and the attenuation changes smoothly from - to 0 dB, again taking approximately 23.2 ms. Also, if a MUTEN transition occurs while the attenuation is changing, the attenuation then changes smoothly in the direction specified by the new level of MUTEN. LIVE Function The LIVE (pseudo-sound field) function emphasizes the extent of the sound field by adding an inverse phase component from the opposite channel of the input signal. When used with the XBS function, lowfrequency components of the spectrum are further emphasized. The LIVE function is OFF when DB/DS is HIGH, and ON when DB/DS is LOW. Note that the function is also OFF when both MOD1 and MOD2 are HIGH. DB/DS, OPT Switching Shock Noise The soft muting function is also activated to eliminate switching shock noise when DB/DS or OPT change state. When DB/DS or OPT change state, the attenuation changes to - dB, the internal circuit settings are activated and then soft muting is released. Therefore, a maximum time of approximately 46.4 ms is required to change the compression mode. Of course, if the attenuation is already - dB after soft muting using MUTEN, then no time is required to change compression mode. XBS Function The XBS (extra bass system) function emphasizes the low-frequency end of the spectrum by changing the gain for low-frequency components of the input signal. The XBS gain is set by the states of MOD1 and MOD2. Note that the gain changes when the XBS function is used together with the LIVE function. DB/DS LOW LOW LOW LOW HIGH HIGH HIGH HIGH MOD1 LOW LOW HIGH HIGH LOW LOW HIGH HIGH MOD2 LOW HIGH LOW HIGH LOW HIGH LOW HIGH Maximum gain +13 dB 0 dB +4 dB 0 dB +10 dB +13 dB +6 dB 0 dB Mode XBS + LIVE LIVE XBS + LIVE Off XBS XBS XBS Off Reset Initialization RSTN should be set LOW at power-ON and after reacquiring synchronization. Note that if RSTN is LOW for longer than 1 s, a through-current flows in the LSI's internal dynamic circuits because the internal clock is stopped. The through-current has no rated value, so the reset pulse should be kept as short as possible at all times other than at power-ON. When RSTN goes from LOW to HIGH, initialization hold is released and the initialization routine first resets the internal data over an interval of 4fs. During the initialization routine, the output data is forcibly muted so that there is no output signal. NIPPON PRECISION CIRCUITS--11 SM5852DS INPUT/OUTPUT TIMING Input Timing LRCI BCKI MSB Lch LSB MSB Rch LSB DI There must be a minimum of 16 BCKI clock cycles to read in a single word of data. Data on DI is input in sync with the falling edge of BCKI in 16-bit serial, MSB first, 2s complement format. Output Timing LRCO BCKO DOUT , , , MSB Lch LSB ,, ,, ,, MSB Rch LSB , , , Shaded areas represent intervals of invalid data. NIPPON PRECISION CIRCUITS--12 SM5852DS APPLICATON CIRCUIT X'tal(16.9344 MHz) XTI X1 R/L BCKI MOD1 SRCK Matsushita MN6617 SRDATA CLK DI OPT LRCI DB/DS MOD2 CKO XTO SM5852DS SM5840 RSTN TESTN MUTEN SEL IPSEL LRCO BCKO DOUT LRCI BCKI DIN Microcontroller NIPPON PRECISION CIRCUITS--13 SM5852DS NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2 chome Koto-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NC9624AE 1997.03 NIPPON PRECISION CIRCUITS INC. NIPPON PRECISION CIRCUITS--14 |
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