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December 1996
NDH8520C Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description
These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
N-Channel 2.8 A, 30 V,RDS(ON)=0.07 @ VGS=10 V RDS(ON)=0.1 @ VGS=4.5 V P-Channel -2.2 A,-30 V, RDS(ON)=0.11 @ VGS=-10 V RDS(ON)=0.18 @ VGS=-4.5 V. Proprietary SuperSOTTM-8 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability.
___________________________________________________________________________________
5
4 3 2
1
6
7 8
Absolute Maximum Ratings
Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed PD TJ,TSTG
T A= 25C unless otherwise noted
N-Channel 30 20
(Note 1)
P-Channel -30 20 -2.2 -10 0.8 -55 to 150
Units V V A
2.8 10
Power Dissipation for Single Operation Operating and Storage Temperature Range
(Note 1)
W C
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1) (Note 1)
156 40
C/W C/W
(c) 1997 Fairchild Semiconductor Corporation
NDH8520C Rev.B
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Type Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A VGS = 0 V, ID = -250 A Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V TJ = 55oC VDS = -24 V, VGS = 0 V TJ = 55 C IGSSF IGSSR VGS(th) Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 20 V, VDS = 0 V VGS = -20 V, VDS= 0 V VDS = VGS, ID = 250 A TJ = 125oC VDS = VGS, ID = -250 A TJ = 125oC RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 2.8 A TJ = 125oC VGS = 4.5 V, ID = 2.3 A VGS = -10 V, ID = -2.2 A TJ = 125oC VGS = -4.5 V, ID = -1.7 A ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V VGS = 4.5 V, VDS = 5 V VGS = -10 V, VDS = -5 V VGS = -4.5 V, VDS = -5 V gFS Forward Transconductance VDS = 10 V, ID = 2.8 A VDS = -10 V, ID = -2.2 A DYNAMIC CHARACTERISTICS Ciss Coss Crss Input Capacitance N-Channel VDS = 15 V, VGS = 0 V, f = 1.0 MHz P-Channel VDS = -15 V, VGS = 0 V, f = 1.0 MHz N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch 270 340 170 218 55 100 pF pF pF N-Ch P-Ch P-Ch N-Ch 10 3 -10 -4 5.8 3.8 S P-Ch N-Ch P-Ch All All
o
N-Ch P-Ch N-Ch
30 -30 1 10
V V A A A A nA nA
P-Ch
-1 -10 100 -100
ON CHARACTERISTICS (Note 2) Gate Threshold Voltage N-Ch 1 0.8 -1 -0.8 1.6 1.2 -1.5 -1.2 0.05 0.07 0.077 0.1 0.14 0.17 2.8 2 -3 -2.2 0.07 0.125 0.1 0.11 0.2 0.18 A V
Output Capacitance Reverse Transfer Capacitance
NDH8520C Rev.B
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Type Min Typ Max Units SWITCHING CHARACTERISTICS (Note 2) tD(on) tr tD(off) tf Qg Qgs Qgd Turn - On Delay Time Turn - On Rise Time N-Channel VDD = 10 V, ID = 1 A, VGEN = 10 V, RGEN = 6 P-Channel VDD = -10 V, ID = -1 A, VGEN = -10 V, RGEN = 6 N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch Total Gate Charge Gate-Source Charge N-Channel VDS = 15 V, ID = 2.8 A, VGS = 10 V P-Channel VDS = -15 V, ID = -2.2 A, VGS = -10 V N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage N-Ch P-Ch VGS = 0 V, IS = 0.67 A VGS = 0 V, IS = -0.67 A
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. (Note2) (Note2)
8 8 15 18 15 28 5 20 9.4 10.9 0.8 1.4 3 3.6
15 15 28 35 28 50 10 35 17 14.5
ns ns
Turn - Off Delay Time
ns
Turn - Off Fall Time
ns
nC nC
Gate-Drain Charge
nC
0.67 -0.67 0.7 -0.76 1.2 -1.2
A V
N-Ch P-Ch
PD(t) =
T J -T A R J A (t)
=
R J C CA +R (t)
T J -T A
= I 2 (t ) x RDS(ON)@ J T D
Typical RJA for single device operation using the board layout shown below on 4.5"x5" FR-4 PCB in a still air environment: 156oC/W when mounted on a 0.0025 in2 pad of 2oz copper.
Scale 1 : 1 on letter size paper. 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDH8520C Rev.B
Typical Electrical Characteristics: N-Channel
15
2.5
V GS =10V 7.0
6.0 5.0 4.5 4.0
R DS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
V G S = 3.5V
2
I D , DRAIN-SOURCE CURRENT (A)
12
4.0 4.5
9
1.5
5.0 6.0 7.0 10
6
3.5
1
3
3.0
0 0 0.5 1 1.5 2 V DS , DRAIN-SOURCE VOLTAGE (V) 2.5 3
0.5 0 3 6 9 I D , DRAIN CURRENT (A) 12 15
Figure 1. N-Channel On-Region Characteristics.
Figure 2. N-Channel On-Resistance Variation with Gate Voltage and Drain Current.
1.6
2
I D = 2.8A
DRAIN-SOURCE ON-RESISTANCE
V GS = 10 V
DRAIN-SOURCE ON-RESISTANCE
1.4
V GS = 4.5V
R DS(on), NORMALIZED
R DS(ON) NORMALIZED ,
T J = 125C
1.5
1.2
25C
1
1
-55C
0.5
0.8
0.6 -50
-25
0
J
25
50
75
100
125
150
0 0 3 6 9 I D , DRAIN CURRENT (A) 12 15
T , JUNCTION TEMPERATURE (C)
Figure 3. N-Channel On-Resistance Variation with Temperature.
Figure 4. N-Channel On-Resistance Variation with Drain Current and Temperature.
10 GATE-SOURCE THRESHOLD VOLTAGE
1.2
V DS = 10V
8 I , DRAIN CURRENT (A)
T = -55C J
25C 125C
V th, NORMALIZED
VDS = VGS
1.1
I D = 250A
6
1
4
0.9
D
2
0.8
0 0 1 V
GS
2 3 4 , GATE TO SOURCE VOLTAGE (V)
5
0.7 -50
-25
0 25 50 75 100 T , JUNCTION TEMPERATURE (C)
J
125
150
Figure 5. N-Channel Transfer Characteristics.
Figure 6. N-Channel Gate Threshold Variation with Temperature.
NDH8520C Rev.B
Typical Electrical Characteristics: N-Channel (continued)
1.15 DRAIN-SOURCE BREAKDOWN VOLTAGE 10 5
I
1.1
D
= 250A
I S, REVERSE DRAIN CURRENT (A) 1 0 .5 0 .1
VGS =0V TJ = 125C 25C
BV DSS , NORMALIZED
1.05
-55C
0 .0 1
1
0.95
0 .0 0 1
0.9 -50
-25
0 T
J
25 50 75 100 , JUNCTION TEMPERATURE (C)
125
150
0 .0 0 0 1 0 0 .2 V
SD
0 .4 0.6 0 .8 1 , BODY DIODE FORWARD VOLTAGE (V)
1 .2
Figure 7. N-Channel Breakdown Voltage Variation with Temperature.
Figure 8. N-Channel Body Diode Forward Voltage Variation with Current and Temperature.
800 600 , GATE-SOURCE VOLTAGE (V) 400 CAPACITANCE (pF)
10
I D = 2.8A
8
VDS = 10V
15V 20V
Ciss
200
Coss
6
4
100
50
V GS = 0 V
0 .2 V 0 .5 1 3 5 10 , DRAIN TO SOURCE VOLTAGE (V) 15 30
V 0 0 2 Q
g
30 0 .1
GS
f = 1 MHz
Crss
2
4
6
8
10
, GATE CHARGE (nC)
DS
Figure 9. N-Channel Capacitance Characteristics.
Figure 10. N-Channel Gate Charge Characteristics.
12
, TRANSCONDUCTANCE (SIEMENS)
V DS = 10V
9
TJ = -55C 25C 125C
6
3
g 0 0 3 6 9 12 I , DRAIN CURRENT (A)
D
FS
15
18
Figure 11. N-Channel Transconductance Variation with Drain Current and Temperature.
NDH8520C Rev.B
Typical Electrical Characteristics: P-Channel (continued)
-10
3
VGS = -10V
, DRAIN-SOURCE CURRENT (A)
-6.0 -5.0
DRAIN-SOURCE ON-RESISTANCE
-8
-4.5
R DS(on) NORMALIZED ,
2.5
VGS = -3.5V
-4.0
-6
-4.0
2
-4.5 -5.0 -5.5 -6.0 -10
-4
-3.5
1.5
-2
-3.0
1
I
D
0 0 -1
V
DS
0.5
-2
-3
-4
-5
0
-2 I
D
, DRAIN-SOURCE VOLTAGE (V)
-4 -6 , DRAIN CURRENT (A)
-8
-10
Figure 12. P-Channel On-Region Characteristics.
Figure 13. P-Channel On-Resistance Variation with Gate Voltage and Drain Current.
1.6
1.8 DRAIN-SOURCE ON-RESISTANCE
I D = -2.2A
V GS = -10V
1.5
DRAIN-SOURCE ON-RESISTANCE
1.4
R DS(ON), NORMALIZED
RDS(on) , NORMALIZED
V GS = -10V
TJ = 125C
1.2
1.2
25C
0.9
1
-55C
0.6
0.8
0.6 -50
0.3
-25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150
0
-2
-4
-6
-8
-10
I D , DRAIN CURRENT (A)
Figure 14. P-Channel On-Resistance Variation with Temperature.
Figure 15. P-Channel On-Resistance Variation with Drain Current and Temperature.
-10 GATE-SOURCE THRESHOLD VOLTAGE
1.2
V DS = -10V
-8 I D, DRAIN CURRENT (A)
T = -55C J 25C 125C
V GS(th), NORMALIZED
VDS = V
1.1
GS
I D = -250A
-6
1
-4
0.9
-2
0.8
0 -1 -2 V
GS
-3
-4
-5
-6
0.7 -50
-25
, GATE TO SOURCE VOLTAGE (V)
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
Figure 16. P-Channel Transfer Characteristics.
Figure 17. P-Channel Gate Threshold Variation with Temperature.
NDH8520C Rev.B
Typical Electrical Characteristics: P-Channel (continued)
10 5 -I , REVERSE DRAIN CURRENT (A) 1
1.08 DRAIN-SOURCE BREAKDOWN VOLTAGE
I D = -250A
1.06 1.04 1.02 1 0.98 0.96 0.94 -50
VGS = 0V
T J = 125C
BV DSS , NORMALIZED
0 .1
25C -55C
0 .0 1
0 .0 0 1
S
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
0 .0 0 0 1 0 0 .2 -V
SD
0 .4 0.6 0 .8 1 , BODY DIODE FORWARD VOLTAGE (V)
1 .2
Figure 18. P-Channel Breakdown Voltage Variation with Temperature.
Figure 19. P-Channel Body Diode Forward Voltage Variation with Current and Temperature.
1000 800 600 400 -V GS, GATE-SOURCE VOLTAGE (V)
10
I D = -2.2A
8
V
DS=
-10V -15V -20V
CAPACITANCE (pF)
Ciss Coss
6
200
4
100
f = 1 MHz V GS = 0 V
Crss
2
50 0 .1
0 0 .2 0 .5 1 2 5 10 -V , DRAIN TO SOURCE VOLTAGE (V) DS 20 30 0 2 4 Q
g
6 8 , GATE CHARGE (nC)
10
12
Figure 20. P-Channel Capacitance Characteristics.
Figure 21. P-Channel Gate Charge Characteristics.
gFS , TRANSCONDUCTANCE (SIEMENS)
10
V DS = - 10V
8
TJ = -55C
6
25C 125C
4
2
0
0
-3
-6
-9
-12
-15
I D, DRAIN CURRENT (A)
Figure 22. P-Channel Transconductance Variation with Drain Current and Temperature.
NDH8520C Rev.B
Typical Thermal Characteristics: N & P-Channel
20 10 5
R ( DS ) ON LIM
20
10
IT
1m
10 10 ms s
0u
s
-I , DRAIN CURRENT (A)
10 5 2 1 0.5
RD S(O LIM N) IT
1m 10
s
s
I D , DRAIN CURRENT (A)
2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.1
ms
0m
10
0m
1s 10 s
1s 10
s
V
SINGLE PULSE R J A = See Note 1 T A = 25C
0.2 0.5 1 2 5 10 V , DRAIN-SOURCE VOLTAGE (V)
DS
D
GS
= 10V
DC
0.1 0.05
V GS = -10V SINGLE PULSE R J A = See Note 1
A
DC
s
TA = 25C
0.5 1 2 5 10 - V DS , DRAIN-SOURCE VOLTAGE (V) 20 30 50
20
30
50
0.01 0.1
0.2
Figure 23. N-Channel Maximum Safe Operating Area.
Figure 24. P-Channel Maximum Safe Operating Area.
1
TRANSIENT THERMAL RESISTANCE
D = 0.5 0.2
r(t), NORMALIZED EFFECTIVE
R
0.1
0.1 0.05 0.02
(t) = r(t) * R JA JA R JA = See Notes 1
P(pk)
0.01
0.01
t1 TJ - T
t2
Single Pulse
= P * R JA (t) Duty Cycle, D = t1 / t2
A
0.001 0.0001
0.001
0.01
0.1
1 t , TIME (sec)
1
10
100
300
Figure 25. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note1. Transient thermal response will change depending on the circuit board design.
VDD V IN
D
t on
t off tr
90%
RL V OUT
t d(on)
t d(off)
90%
tf
VGS
VOUT
R GEN
10%
10% 90%
G
DUT
S
V IN
10%
50%
50%
PULSE WIDTH
Figure 26. N or P-Channel Switching Test Circuit.
Figure 27. N or P-Channel Switching Waveforms.
NDH8520C Rev.B
SuperSOTTM-8 Tape and Reel Data and Package Dimensions
SSOT-8 Packaging Configuration: Figure 1.0
Customized Label
Packaging Description:
SSOT-8 parts are shipped in tape. The carrier tape is made from a di ssipat ive (carbo n filled) po ly carbon ate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film , adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped w ith 3,000 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 unit s per 7" or 177cm diameter reel. This and some other options are further described in the Packagin g Information table. These full reels are in di vidu ally barcod e labeled and placed inside a standard intermediate box (ill ustrated in figure 1.0) made of recyclable corrugated brow n paper. One box contains two reels maximum. And t hese boxes are placed ins ide a barcode labeled shipp ing bo x whic h comes in di fferent sizes depend in g on t he nu mber of parts shippe d.
F63TNR Label Anti static Cover Tape
Static Dissi pat ive Emboss ed Carrier Tape
F852 831N F852 831N F852 831N F852 831N F852 831N
Pin 1
SSOT-8 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard
(no f l ow c ode )
D84Z TNR 500 7" Dia 184x187x47 1,000 0.0416 0.0980
TNR 3,000 13" D ia 343x64x343 6,000 0.0416 0.5615
SSOT-8 Unit Orientation
343mm x 342mm x 64mm Intermediate box for Standar d and L99Z Opti ons
F63TNR Label
F63TNR Label
F63TNR Labe l sa mpl e 184mm x 187mm x 47mm Pizza Box fo r D84Z Option F63TNR Label
LOT: CBVK741B019 FSID: FDR835N QTY: 3000 SPEC:
SSOT-8 Tape Leader and Trailer Configuration: Figur e 2.0
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
(F63TNR)3
Carrier Tape Cover Tape
Components Traile r Tape 300mm mi nimum or 38 empty pockets Lead er Tape 500mm mi nimum or 62 empty poc kets
August 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SSOT-8 Embossed Carrier Tape Configuration: Figur e 3.0
T E1 P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SSOT-8 (12mm)
A0
4.47 +/-0.10
B0
5.00 +/-0.10
W
12.0 +/-0.3
D0
1.55 +/-0.05
D1
1.50 +/-0.10
E1
1.75 +/-0.10
E2
10.25 mi n
F
5.50 +/-0.05
P1
8.0 +/-0.1
P0
4.0 +/-0.1
K0
1.37 +/-0.10
T
0.280 +/-0.150
Wc
9.5 +/-0.025
Tc
0.06 +/-0.02
Notes : A0, B0, and K0 dimensions are deter mined with r espec t to t he EIA/Jedec RS-481 rotationa l and lateral movement requi remen ts (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Si de or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SSOT-8 Reel Configuration: Figur e 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
12mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
5.906 150 7.00 178
Dim W1
0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0
Dim W2
0.724 18.4 0.724 18.4
Dim W3 (LSL-USL)
0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4
12mm
13" Dia
(c) 1998 Fairchild Semiconductor Corporation
July 1999, Rev. C
SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued
SuperSOTTM-8 (FS PKG Code 34, 35)
1:1
Scale 1:1 on letter size paper
Di mensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0416
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM
DISCLAIMER
ISOPLANARTM MICROWIRETM POPTM PowerTrenchTM QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8
TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
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This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

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