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19-0125; Rev. 1; 8/93
Dual-Slot PCMCIA Analog Power Controller
_______________General Description
The MAX780A provides the power switching and status signals necessary to control two Personal Computer Memory Card International Association (PCMCIA) Release 2.0 card slots. The MAX780A, used in conjunction with a PC Card Interface Digital Controller, forms a complete, minimum component count PCMCIA interface for palmtop and notebook computers. The MAX780A incorporates two 0V/+5V/+12V/highimpedance power outputs for flash VPP programming, level shifters for power MOSFET control of two separate +3.3V/+5V supplies, and two V PP power-ready status signals. The MAX780A may be directly connected to the control outputs from a PCMCIA digital controller, or may be configured to use internal edgetriggered registers for connection to the CPU data bus. The MAX780B has all the features of the MAX780A but omits the reference and V PP valid indicators. The MAX780C has all the features of the MAX780A but omits the registers for the digital inputs. The MAX780D omits the reference, the VPP valid indicators, and the digital input registers.
___________________________Features
o SSOP Circuit Fits in 0.09in2 o Smallest Complete Analog Controller for Two PCMCIA (Release 2.0/JEIDA 4.1) PC Card Sockets o Dual VCC Contols and VPP Outputs o Logic-Compatible with Industry-Standard PCMCIA Digital Controllers: Intel 82365SL_DF Fujitsu MB86301 Chips and Technology F8680 Cirrus Logic CL-PD6720 o 0V/+5V/+12V/High-Impedance VPP Outputs o Internal 1.6 VPP Power Switches o Dual Voltage 3.3V/5V VCC Operation o VPP Power-Ready Status Signals o 130A Quiescent Supply Current (3.5A in Shutdown) o Break-Before-Make Switching
MAX780
______________Ordering Information
PART TEMP. RANGE MAX780ACNG 0C to +70C 0C to +70C MAX780ACAG MAX780AC/D 0C to +70C MAX780AENG -40C to +85C MAX780AEAG -40C to +85C PIN-PACKAGE 24 Narrow Plastic DIP 24 SSOP Dice* 24 Narrow Plastic DIP 24 SSOP
Part Number
Reference & VPP Status Indicators
Registers for Direct Connection to CPU Data Bus
Dual VPP Switches & Level Shifters for VCC Switching
MAX780A MAX780B MAX780C MAX780D
Ordering Information continued on last page. * Contact factory for dice specifications.
__________Typical Operating Circuit
+3.3V +12V VPPIN +5V VCCIN ADRV3 +5V ADRV5 BDRV3 SHDN REF C1 C2 WR GND DIGITAL I/O PCMCIA DIGITAL CONTROLLER BDRV5 AVPP BVPP +5V VCC PCMCIA SLOT VPP #1
_______________________Applications
Notebook and Palmtop Computers Personal Organizers Digital Cameras Handiterminals Bar-Code Readers
MAX780A
VCC PCMCIA SLOT VPP #2
________________________________________________________________ Maxim Integrated Products
1
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Dual-Slot PCMCIA Analog Power Controller MAX780
ABSOLUTE MAXIMUM RATINGS
VCCIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V, -0.3V VPPIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +13.2V, -0.3V ADRV5, ADRV3, BDRV5, BDRV3 to GND. . .(VPPIN + 0.3V), -0.3V AVPP, BVPP to GND . . . . . . . . . . . . . . . . . . . . . . . (VPPIN + 0.3V), -0.3V All Other Pins to GND . . . . . . . . . . . . . . . . . . . . . (VCCIN + 0.3V), -0.3V Continuous Power Dissipation (TA = +70C) 20-Pin Plastic DIP (derate 11.11mW/C above +70C)......889mW 20-Pin SSOP (derate 8.00mW/C above +70C)...........640mW 24-Pin Narrow Plastic DIP (derate 13.33 mW/C above +70C).1067mW 24-Pin SSOP (derate 8.00mW/C above +70C) . . . . . . . 640mW Operating Temperature Ranges: MAX780_C__. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C MAX780_E__ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 4 0C to +85C Storage Temperature Range . . . . . . . . . . . . . . . . . . . -65C to +160C Lead Temperature (soldering, 10sec). . . . . . . . . . . . . . . . . . . . +300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCCIN = +5V, VPPIN = +12V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER POWER REQUIREMENTS VCCIN Input Voltage Range VPPIN Input Voltage Range VCCIN Supply Current VPPIN Supply Current VCCIN Standby Current VPPIN Standby Current DC CHARACTERISTICS CONDITIONS MIN 2.85 0 5V mode 12V or 0V mode VPPIN = 12.6V 12V mode 5V mode 130 60 185 10 3.5 0.1 TYP MAX 5.5 12.6 300 450 UNITS V V A A A A
SHDN = 0V, all logic inputs at GND or VCCIN SHDN = 0V, VPPIN = 4.75V VPPIN = 11.4V, 0mA < ILOAD < 60mA, 12V mode VCCIN = 4.5V, 0mA < ILOAD < 1mA, 5V mode VPPIN = 11.4V, 0mA < ILOAD < 1mA, 0V mode High-impedance mode ILOAD = 1mA
10 1
1.6 30 140 1 0.1
2.45 50 300 50 0.4 nA V
AVPP, BVPP Switch Resistance
ADRV3, ADRV5, BDRV3, BDRV5 Leakage Current ADRV3, ADRV5, BDRV3, BDRV5 Output Voltage Low
VOLTAGE REFERENCE (MAX780A and MAX780C only) REF Voltage REF Temperature Coefficient REF Line Regulation REF Load Regulation AGPI, BGPI Power-Ready Threshold AGPI, BGPI Power-Ready Hysteresis 2 ILOAD = 0A MAX780_C MAX780_E 1.22 1.21 1.25 1.25 20 0.5 2 10.72 10.68 VPPIN VPPIN 11.05 11.05 130 0 11.40 11.40 1.28 1.29 V ppm/C mV/V V/A V mV
VCCIN = 2.85V to 5.5V ILOAD = 0A to 100A MAX780_C MAX780_E 12V mode
_______________________________________________________________________________________
Dual-Slot PCMCIA Analog Power Controller
ELECTRICAL CHARACTERISTICS (continued)
(VCCIN = +5V, VPPIN = +12V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER LOGIC SECTION Logic Input Leakage Current Logic Input High Logic Input Low AGPI, BGPI Logic Output High AGPI, BGPI Logic Output Low ILOAD = 1mA ILOAD = 1mA VCCIN -0.4 VCCIN -0.2 0.06 0.4 2.4 0.8 1 A V V V V CONDITIONS MIN TYP MAX UNITS
MAX780
TIMING CHARACTERISTICS - MAX780A and MAX780B only
(VCCIN = +3.3V or +5.0V, VPPIN = +12.0V, see Figure 4, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER WR Pulse Width _VPP_, _VCC_ Setup Time _VPP_, _VCC_ Hold Time _VCC_ to _DRV_ Propagation Delay Note 1: Guaranteed by design, not production tested. SYMBOL tLA tAS tAH (Note 1) CONDITIONS MIN 125 100 0 50 TYP MAX UNITS ns ns ns ns
__________________________________________Typical Operating Characteristics
AVPP SWITCHING AVCC SWITCHING
AVPP1 5V/div +5V 5V/div
AVCC1 5V/div
AGPI
AVCC 1V/div +3.3V
+12.0V AVPP 200mV/div 0V 5s/div C1 = C2 = 0V, AVPP0 = +5V, CIN = 10F, CA = 0.1F 2ms/div C1 = +5V, C2 = 0V, AVCC0 = +5V, M1 = M2 = 3055EL, RLOAD = 130, CC = 1F
_______________________________________________________________________________________
3
Dual-Slot PCMCIA Analog Power Controller MAX780
____________________________Typical Operating Characteristics (continued)
AVPP SWITCH RESISTANCE (12V MODE)
2.6 +125C 2.2 +85C 1.8 VCCIN = +5.0V, C1 = C2 = AVPP = 0V, AVPP = +5.0V -55C 1.0 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 VPPIN (V) 110 VPPIN = +12.0V, C1 = C2 = 0V, AVPP0 = VCCIN AVPP1 = 0V +125C 70
AVPP SWITCH RESISTANCE (5V MODE)
SWITCH RESISTANCE ()
+25C
SWITCH RESISTANCE ()
90
50 +25C 30 -55C
1.4
10 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCCIN (V)
REFERENCE LOAD REGULATION
1.248 1.247 REF VOLTAGE (V) 1.246 +25C 1.245 1.244 1.243 1.242 0 40 80 120 160 200 LOAD CURRENT (A) SHDN = +5.0V, VCCIN = +5.0V, VPPIN = +12.0V -55C 1.243 +125C 1.248
REFERENCE VOLTAGE vs. TEMPERATURE
REFERENCE VOLTAGE (V)
1.247
1.246
1.245 SHDN = +5.0V, VCCIN = +5.0V, VPPIN = +12.0V -55 -35 -15 5 25 45 65 85 105 125
1.244
TEMPERATURE (C)
4
________________________________________________________________________________________________
Dual-Slot PCMCIA Analog Power Controller
________________________________________________________Pin Description
PIN NAME MAX780A/B/C MAX780D Pin-strap input that selects edge-triggered register or direct digital inputs. Tying C2 to VCCIN makes the logic inputs edge triggered; inputs to pins 4-11 are clocked in on the rising edge of WR. Tying C2 to GND allows control signals to be directly applied to the logic inputs on pins 4-11. Connect to GND for MAX780C. Pin-strap input that selects one of two logic decode modes for the digital inputs. See Tables 1-3. Write pulse input. When C2 is tied to VCCIN, a rising edge on WR clocks in the VCC and VPP enables. When C2 is tied to GND, inputs to WR have no effect. Connect to GND for MAX780C. Logic inputs that control the voltage on AVPP. Logic inputs that control the voltage on BVPP. Logic inputs that control the state of the MOSFET gate drivers ADRV3 and ADRV5. Logic inputs that control the state of the MOSFET gate drivers BDRV3 and BDRV5. Open-drain gate driver outputs that control the MOSFETs that switch the VCC pin of slot B to 0V, 3.0V/3.3V, or 5V. Open-drain gate driver outputs that control the MOSFETs that switch the VCC pin of slot A to 0V, 3.0V/3.3V, or 5V. Logic-level power-ready output that stays low as long as BVPP is greater than 11.05V (MAX780A and MAX780C only). Make no connection to this pin for MAX780B. Logic-level power-ready output that stays low as long as AVPP is greater than 11.05V (MAX780A and MAX780C only). Make no connection to this pin for MAX780B. Logic input that shuts the MAX780 down to a low supply-current state when brought low. Asserting SHDN forces ADRV3, BDRV3, ADRV5, BDRV5, REF, AGPI, and BGPI low. All VPP inputs and outputs are functional for either state of SHDN. Program AVPP and BVPP to 0V for lowest power consumption. No connect. Not internally connected. 1.25V reference voltage output (MAX780A and MAX780C only). Make no connection to this pin for MAX780B.) Switched output that provides 0V, 5V, or 12V to the VPP pins of slot B. Switched output that provides 0V, 5V, or 12V to the VPP pins of slot A. +5V power input +12V power input. VPPIN can have 0V or 5V applied as long as VCCIN = 5V. Ground 5 FUNCTION
MAX780
1
C2
2
1
C1 WR AVPP1, AVPP0 BVPP1, BVPP0 AVCC1, AVCC0 BVCC1, BVCC0 BDRV5, BDRV3 ADRV5, ADRV3 BGPI AGPI
3
4, 5 6, 7 8, 9 10, 11 12, 13
2, 3 4, 5 6, 7 8, 9 10, 11
14, 15
12, 13
16
17
18
14
SHDN
15 19 20 21 22 23 24 16 17 18 19 20
N.C. REF BVPP AVPP VCCIN VPPIN GND
_______________________________________________________________________________________
Dual-Slot PCMCIA Analog Power Controller MAX780
Table 1. AVPP Control Logic
C1 0 0 0 0 1 1 1 1 AVPP1 0 0 1 1 0 0 1 1 AVPP0 0 1 0 1 0 1 0 1 AVPP 0V VCCIN VPPIN High-Z 0V 0V VCCIN VPPIN
________________Detailed Description VPP Switching All four versions (A, B, C, and D) of the MAX780 allow simple switching of PCMCIA card VPP to 0V, 5V, and 12V. On-chip power MOSFETs connect AVPP and BVPP to either GND, VCCIN, or VPPIN. The AVPP0 and AVPP1 control logic inputs determine the state of AVPP. Likewise, BVPP0 and BVPP1 control BVPP. To prevent VPP overshoot due to parasitic inductance in the +12V supply, the VPPIN bypass capacitor (CIN) should be 10 times greater than the capacitance from AVPP (CA) or BVPP (CB) to GND. Hence, when CA and CB are 0.1F, CIN should be 1.0F. The AGPI and BGPI status outputs signal when the VPP lines are valid. AGPI goes low when AVPP exceeds 11.05V; BGPI goes low when BVPP exceeds 11.05V. The status outputs and the reference are only active when SHDN is high. Pulling SHDN low puts the MAX780 into a low supplycurrent mode and disables the reference and the AGPI and BGPI status outputs. The V CC level shifters ADRV5, ADRV3, BDRV5, BDRV3 are all forced low when SHDN is low. VPP switching is not affected by the state of SHDN. Program AVPP and BVPP to 0V for lowest power consumption when SHDN is low. Wait at least 200s after bringing the MAX780 out of shutdown before checking AGPI or BGPI since the reference needs time to stabilize. VCC Switching The MAX780 contains level shifters that simplify driving external power MOSFETs to switch PCMCIA card VCC to 3.3V and 5V. While a PCMCIA card is being inserted into the socket, the VCC pins on the card edge connector should be powered down to 0V so that "hot insertion" does not damage the PCMCIA card. The simplest way to accomplish this is to pull out a mechanical switch before the PCMCIA card is inserted. The mechanical switch can be pushed in only when the card has been fitted snugly into its socket. The MAX780 Detailed Operating Circuit shows this method. In the Detailed Operating Circuit, (with the mechanical interlock switch closed) the PCMCIA card VCC cannot be pulled more than a diode drop below 3.3V. The Nchannel power MOSFET that connects VCC to 3.3V has its drain tied to VCC and its source tied to 3.3V, so that its body diode prevents the card's VCC from falling to 0V. If it were rotated so that the source connected to VCC, then applying 5V to VCC would short the 5V supply to the 3.3V supply via the MOSFET's body diode.
Table 2. BVPP Control Logic
C1 0 0 0 0 1 1 1 1 BVPP1 0 0 1 1 0 0 1 1 BVPP0 0 1 0 1 0 1 0 1 BVPP 0V VCCIN VPPIN High-Z 0V 0V VCCIN VPPIN
Table 3. ADRV3 and ADRV5 Control Logic
C1 0 0 0 0 1 1 1 1 AVCC1 0 0 1 1 0 0 1 1 AVCC0 0 1 0 1 0 1 0 1 ADRV3 0V Hi-Z 0V 0V 0V 0V 0V Hi-Z ADRV5 0V 0V Hi-Z 0V 0V 0V Hi-Z 0V
Table 4. BDRV3 and BDRV5 Control Logic
C1 0 0 0 0 1 1 1 1 BVCC1 0 0 1 1 0 0 1 1 BVCC0 0 1 0 1 0 1 0 1 BDRV3 0V Hi-Z 0V 0V 0V 0V 0V Hi-Z BDRV5 0V 0V Hi-Z 0V 0V 0V Hi-Z 0V
6
_______________________________________________________________________________________
Dual-Slot PCMCIA Analog Power Controller
If a mechanical interlock switch cannot be used, an extra MOSFET must be added, as shown in Figure 1. Placing two N-channel MOSFETs in series with their body diodes facing in opposite directions allows VCC to be shut down to 0V without using a mechanical switch. In these circumstances, a separate gate-drive supply is needed to turn on the external FETs. Ideally it should have a low quiescent current and be capable of being turned off when read access to the PCMCIA port is not required. Doubling or tripling charge pumps can easily be built using a convenient clock signal from elsewhere in the system. Buffering the clock signal with a suitable gate provides on/off control, as shown in Figure 5. When driven at 100kHz or more by a CMOS gate powered from 5V, the doubler circuit outputs 8.6V when loaded with 25k (equivalent to four 100k pull-up resistors). Under similar conditions, but when running from 3.3V, the tripler circuit produces 7.9V.
MAX780
Switching Speed
The drive to the external MOSFETs ensures that the 3.3V supply is never connected to the 5V supply. This is done by turning these transistors off quickly (using active pull-down circuitry), and on more slowly (using external pull-up resistors). The turn-on delay depends on the value of the pull-up resistors, and on the gate capacitance of the switching transistors. To save power, use high-value resistors of up to 10M. However, note that high-value resistors will increase the time it takes to turn on the switched supplies
+5V VCCIN 100k ADRV5 AVCC +12V 1F +12V
__________Applications Information
The MAX780 can be used with PCMCIA controllers other than the Intel 82365SL DF. Figure 2 shows the logic connections to the Cirrus Logic CL-PD6720 PCMCIA Host Adapter. The MAX780 does not need a PCMCIA controller to function. Tie C2 to VCCIN to allow direct VCC and VPP control from the system bus. Figure 3 shows the connection to the system bus. Figure 4 shows the timing requirements.
MAX780_
100k ADRV3 +12V 100k BDRV5 BVCC +12V 100k BDRV3 1F
*
Reading from a PCMCIA Port without Using the VPP Supply
In the Typical Operating Circuit, VCC is switched to the PCMCIA ports using the 12V VPP supply, which provides the gate drive needed to turn on the external N-channel MOSFETs. In some cases, the high-power VPP supply is only available when information has to be written to the PCMCIA port, not when data is being read. The VPP supply may have a quiescent current of several milliamps, so it consumes more power than is necessary simply to provide gate drive for some FETs.
*
+3.3V
* EXTRA MOSFET NOTE: BODY DIODES OF MOSFETS SHOWN FOR CLARITY.
Figure 1. Using an Extra MOSFET to Replace the Mechanical Interlock
_______________________________________________________________________________________
7
Dual-Slot PCMCIA Analog Power Controller MAX780
AVPP1 AVPP0 AVCC1 AVCC0 BVPP1 MAX780_ BVPP0 C1 C2 GND BVCC1 BVCC0 AGPI BGPI
A_VPP_PGM A_VPP_VCC A_-VCC_3 A_-VCC_5 B_VPP_PGM B_VPP_VCC B_-VCC_3 B_-VCC_5 VPP_VALID tLA CIRRUS LOGIC CL-PD6720 WR tAS tAH _VPP_, _VCC_
Figure 2. Logic Connections to CL-PD6720
Figure 4. C2 = VCCIN Mode Timing
+5V DATA BUS D0 D1 D2 D3 D4 D5 D6 D7 WR ADDRESS DECODE ADDRESS BUS
VCCIN
C2 AVCC0 AVCC1 AVPP0 AVPP1 BVCC0 MAX780_ BVCC1 BVPP0 BVPP1 WR GND
CLOCK ON/OFF +5V
10nF GATE-DRIVE SUPPLY OUTPUT 0.1F
CLOCK ON/OFF
10nF 10nF
GATE-DRIVE SUPPLY OUTPUT 0.1F
0.1F 3.3V ALL DIODES 1N914
Figure 3. Direct Connection to System Bus
Figure 5. Alternative Gate-Drive Charge-Pump Supplies
8
_______________________________________________________________________________________
Dual-Slot PCMCIA Analog Power Controller
____________________________________________Pin Configurations (continued)
TOP VIEW
C2 1 C1 2 WR 3 AVPP1 4 AVPP0 5 BVPP1 6 BVPP0 7 AVCC1 8 AVCC0 9 BVCC1 10 BVCC0 11 BDRV5 12
24 23
MAX780
GND
VPPIN 22 VCCIN 21 AVPP
20
C2 1 C1 2 WR 3 AVPP1 4 AVPP0 5 BVPP1 6 BVPP0 7 AVCC1 8 AVCC0 9 BVCC1 10 BVCC0 11 BDRV5 12
24 23 22
GND
VPPIN VCCIN 21 AVPP BVPP N.C. SHDN N.C. N.C. ADRV3 ADRV5 BDRV3
BVPP REF SHDN
20
MAX780A
19 18 17
MAX780B
19 18 17 16 15 14 13
AGPI 16 BGPI
15 14 13
ADRV3 ADRV5 BDRV3
DIP/SSOP
DIP/SSOP
GND 1 C1 GND AVPP1 AVPP0
2 3 4 5
24 23 22
GND
VPPIN VCCIN 21 AVPP BVPP REF SHDN AGPI BGPI ADRV3 ADRV5 BDRV3
20
C1 1 AVPP1 2 AVPP0 3 BVPP1 4 BVPP0 5 AVCC1 6 AVCC0 7 BVCC1 8 BVCC0 9 BDRV5 10
20 19 18
GND
VPPIN VCCIN 17 AVPP
BVPP1 6 BVPP0 7 AVCC1 8 AVCC0 9 BVCC1 10 BVCC0 11 BDRV5 12
MAX780C
19 18 17 16 15 14 13
MAX780D
16 15 14 13 12 11
BVPP N.C. SHDN ADRV3 ADRV5 BDRV3
DIP/SSOP
DIP/SSOP
_______________________________________________________________________________________
9
Dual-Slot PCMCIA Analog Power Controller MAX780
__________________________________________________Detailed Operating Circuit
+12V
+5V
+3.3V
CIN
0.1F
100k
100k M1 M2 MECHANICAL INTERLOCK VCC CC VPP1 VPP2
VPPIN
VCCIN ADRV5
REF C1
ADRV3 100k BDRV5 100k
PCMCIA CONNECTOR A
C2 GND WR BDRV3 AVPP CA CD
VCC VPP1 VPP2
PCMCIA CONNECTOR B
MAX780A
BVPP CB AVCC0 AVCC1 AVPP0 AVPP1 BVCC0 BVCC1 BVPP0 BVPP1 AGPI A:VCC_EN0 A:VCC_EN1 A:VPP_EN0 A:VPP_EN1
INTEL 82365SL DF*
B:VCC_EN0 B:VCC_EN1 B:VPP_EN0 B:VPP_EN1 A:GPI B:GPI CS
SHDN
BGPI
SHUTDOWN SIGNAL FROM CPU *MODE = 0, INTERNAL ADDRESS DECODING
10
______________________________________________________________________________________
Dual-Slot PCMCIA Analog Power Controller
__Ordering Information (continued)
PART MAX780BCNG MAX780BCAG MAX780BC/D MAX780BENG MAX780BEAG MAX780CCNG MAX780CCAG MAX780CC/D MAX780CENG MAX780CEAG MAX780DCPP MAX780DCAP MAX780DC/D MAX780DEPP MAX780DEAP TEMP. RANGE 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C PIN-PACKAGE 24 Narrow Plastic DIP 24 SSOP Dice* 24 Narrow Plastic DIP 24 SSOP 24 Narrow Plastic DIP 24 SSOP Dice* 24 Narrow Plastic DIP 24 SSOP 20 Plastic DIP 20 SSOP Dice* 20 Plastic DIP 20 SSOP
___________________Chip Topography
C2 C1 WR GND V PPIN V CCIN
MAX780
AVPP0 AVPP1
AVPP
BVPP0 BVPP1
BVPP
0.111" (2.819mm)
REF SHDN AVCC0 AVCC1 BGPI BVCC1 BDRV3 ADRV3 BVCC0 BDRV5 ADRV5 0.085" (2.159mm) AGPI
* Contact factory for dice specifications.
_______________________________________________________Package Information
DIM INCHES MAX MIN 0.200 - - 0.015 0.150 0.125 0.080 0.055 0.022 0.016 0.065 0.050 0.012 0.008 1.265 1.235 0.080 0.050 0.325 0.300 0.280 0.240 0.100 BSC 0.300 BSC 0.400 - 0.150 0.115 15 0 MILLIMETERS MIN MAX - 5.08 0.38 - 3.18 3.81 1.40 2.03 0.41 0.56 1.27 1.65 0.20 0.30 31.37 32.13 1.27 2.03 7.62 8.26 6.10 7.11 2.54 BSC 7.62 BSC - 10.16 2.92 3.81 0 15
21-337A
D1
E E1 A A2 D A3
A A1 A2 A3 B B1 C D D1 E E1 e eA eB L
A1 L e B B1
C eA eB
24-PIN PLASTIC DUAL-IN-LINE (NARROW) PACKAGE
______________________________________________________________________________________
11
Dual-Slot PCMCIA Analog Power Controller MAX780
__________________________________________Package Information (continued)
DIM A A1 B C D E e H L INCHES MAX MIN 0.078 0.068 0.008 0.002 0.015 0.010 0.009 0.005 0.328 0.278 0.212 0.205 0.0256 BSC 0.311 0.301 0.037 0.022 8 0 MILLIMETERS MIN MAX 1.73 1.99 0.05 0.21 0.25 0.38 0.13 0.22 7.07 8.33 5.20 5.38 0.65 BSC 7.65 7.90 0.55 0.95 0 8
21-0002A
E
H
D A
0.127mm 0.004in.
e
B
A1
C
L
24-PIN PLASTIC SHRINK SMALL-OUTLINE PACKAGE
DIM INCHES MAX MIN 0.200 - - 0.015 0.150 0.125 0.080 0.055 0.022 0.016 0.065 0.050 0.012 0.008 1.045 1.015 0.070 0.040 0.325 0.300 0.280 0.240 0.100 BSC 0.300 BSC 0.400 - 0.150 0.115 15 0 MILLIMETERS MIN MAX - 5.08 0.38 - 3.18 3.81 1.40 2.03 0.41 0.56 1.27 1.65 0.20 0.30 25.78 26.54 1.02 1.78 7.62 8.26 6.10 7.11 2.54 BSC 7.62 BSC - 10.16 2.92 3.81 0 15
21-333A
D1
E E1 A A2 D A3
A1 L e B B1
A A1 A2 A3 B B1 C D D1 E E1 e eA eB L
C eA eB
20-PIN PLASTIC DUAL-IN-LINE PACKAGE
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1993 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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