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MAX1820ZEUB Rev. B
RELIABILITY REPORT FOR MAX1820ZEUB PLASTIC ENCAPSULATED DEVICES
March 21, 2003
MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086
Written by
Reviewed by
Jim Pedicord Quality Assurance Reliability Lab Manager
Bryan J. Preeshl Quality Assurance Executive Director
Conclusion The MAX1820 successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim's continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim's quality and reliability standards. Table of Contents I. ........Device Description II. ........Manufacturing Information III. .......Packaging Information IV. .......Die Information V. ........Quality Assurance Information VI. .......Reliability Evaluation ......Attachments
I. Device Description A. General The MAX1820 low-dropout, pulse-width-modulated (PWM) DC-DC buck regulator is optimized to provide power to the power amplifier (PA) in WCDMA cell phones; however, it may be applied in many other applications where high efficiency is a priority. The supply voltage range is from 2.6V to 5.5V, and the guaranteed output current is 600mA; 1MHz PWM switching allows for small external components, while skip mode reduces quiescent current to 180A with light loads. The MAX1820 is dynamically controlled to provide varying output voltages from 0.4V to 3.4V. The circuit is designed such that the output voltage settles in <30s for a full-scale change in voltage and current. The MAX1820 includes a low on-resistance internal MOSFET switch and synchronous rectifier to maximize efficiency and minimize external component count; 100% duty-cycle operation allows for low dropout of only 150mV at 600mA load, including the external inductor resistance. The device is offered in 10-pin MAX and tiny 3 x 4 chipscale (UCSPTM) packages
B. Absolute Maximum Ratings Item BATT, OUT (FB), SHDN, SYNC, SKIP, REF to GND PGND to GND LX, COMP to GND Output Short-Circuit Duration Operating Temperature Range Junction Temperature Storage Temperature Ranges Lead Temperature (soldering, 10s) Continuous Power Dissipation (TA = +70C) 10-Pin MAX Derates above +70C 10-Pin MAX Rating -0.3V to +6.0V -0.3V to +0.3V -0.3V to (VBATT + 0.3V) Infinite -40C to +85C +150C -65C to +150C +300C 444mW 5.6mW/C
II. Manufacturing Information A. Description/Function: B. Process: C. Number of Device Transistors: D. Fabrication Location: E. Assembly Location: F. Date of Initial Production: WCDMA Cellular Phone 600Ma Buck Regulator S8 - Standard 8 micron silicon gate CMOS 2722 California, USA Thailand, Philippines or Malaysia April, 2001
III. Packaging Information A. Package Type: B. Lead Frame: C. Lead Finish: D. Die Attach: E. Bondwire: F. Mold Material: G. Assembly Diagram: H. Flammability Rating: 10-Lead MAX Copper Solder Plate Silver-filled Epoxy Gold (1.3 mil dia.) Epoxy with silica filler Buildsheet # 05-2301-0048 Class UL94-V0
I. Classification of Moisture Sensitivity per JEDEC standard JESD22-A112: Level 1
IV. Die Information A. Dimensions: B. Passivation: C. Interconnect: D. Backside Metallization: E. Minimum Metal Width: F. Minimum Metal Spacing: G. Bondpad Dimensions: H. Isolation Dielectric: I. Die Separation Method: 81 X 81 mils Si3N4/SiO2 (Silicon nitride/ Silicon dioxide) TiW/ AlCu/ TiWN None .8 microns (as drawn) .8 microns (as drawn) 2.7 mil. Sq. SiO2 Wafer Saw
V. Quality Assurance Information A. Quality Assurance Contacts: Jim Pedicord (Reliability Lab Manager) Bryan Preeshl ( Executive Director of QA) Kenneth Huening (Vice President) B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects.
C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 135C biased (static) life test are shown in Table 1. Using these results, the Failure Rate () is calculated as follows: = 1 = MTTF 1.83 (Chi square value for MTTF upper limit) 192 x 4389 x 551 x 2 Temperature Acceleration factor assuming an activation energy of 0.8eV = 1.97 x 10-9 = 1.97 F.I.T. (60% confidence level @ 25C)
This low failure rate represents data collected from Maxim's reliability qualification and monitor programs. Maxim also performs weekly Burn-In on samples from production to assure reliability of its processes. The reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates to 3 failures in an 80 piece sample. Maxim performs failure analysis on rejects from lots exceeding this level. The Burn-In Schematic (Spec.# 06-5591) shows the static circuit used for this test. Maxim also performs 1000 hour life test monitors quarterly for each process. This data is published in the Product Reliability Report (RR-1M) located on the Maxim website at http://www.maxim-ic.com . B. Moisture Resistance Tests Maxim evaluates pressure pot stress from every assembly process during qualification of each new design. Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85C/85%RH or HAST tests are performed quarterly per device/package family. C. E.S.D. and Latch-Up Testing The PY72 die type has been found to have all pins able to withstand a transient pulse of 400V, per MilStd-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device withstands a current of 250mA.
Table 1 Reliability Evaluation Test Results MAX1820ZEUB
TEST ITEM TEST CONDITION FAILURE IDENTIFICATION SAMPLE SIZE NUMBER OF FAILURES
Static Life Test (Note 1) Ta = 135C Biased Time = 192 hrs. Moisture Testing (Note 2) Pressure Pot Ta = 121C P = 15 psi. RH= 100% Time = 168hrs. Ta = 85C RH = 85% Biased Time = 1000hrs.
DC Parameters & functionality
551
0
DC Parameters & functionality
77
0
85/85
DC Parameters & functionality
77
0
Mechanical Stress (Note 2) Temperature Cycle -65C/150C 1000 Cycles Method 1010 DC Parameters 77 0
Note 1: Life Test Data may represent plastic D.I.P. qualification lots. Note 2: Generic process/package data
Attachment #1 TABLE II. Pin combination to be tested. 1/ 2/
Terminal A (Each pin individually connected to terminal A with the other floating) 1. 2. All pins except VPS1 3/ All input and output pins
Terminal B (The common combination of all like-named pins connected to terminal B) All VPS1 pins All other input-output pins
1/ Table II is restated in narrative form in 3.4 below. 2/ No connects are not to be tested. 3/ Repeat pin combination I for each named Power supply and for ground (e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc). 3.4 a. b. Pin combinations to be tested. Each pin individually connected to terminal A with respect to the device ground pin(s) connected to terminal B. All pins except the one being tested and the ground pin(s) shall be open. Each pin individually connected to terminal A with respect to each different set of a combination of all named power supply pins (e.g., V , or V or VSS3 or V , or VCC2 ) connected to SS1 SS2 CC1 terminal B. All pins except the one being tested and the power supply pin or set of pins shall be open. Each input and each output individually connected to terminal A with respect to a combination of all the other input and output pins connected to terminal B. All pins except the input or output pin being tested and the combination of all the other input and output pins shall be open.
c.
TERMINAL C
R1 S1 R2
TERMINAL A REGULATED HIGH VOLTAGE SUPPLY
S2 C1
DUT SOCKET
SHORT CURRENT PROBE (NOTE 6)
TERMINAL B
R = 1.5k C = 100pf
Mil Std 883D Method 3015.7 Notice 8
TERMINAL D

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