 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| CCD Delay Line Series MN3814, MN3814S NTSC CCD Video Signal Delay Elements Overview The MN3814 and MN3814S are 4 fSC CMOS CCD signal delay elements whose wide bandwidth and low noise make them ideal for video signal processing applications. They contain such components as a shift register clock driver, 906-stage CCD analog shift register, and resampling output amplifier. They sample the input using the supplied clock signal with a frequency of 14.32 MHz, four times the NTSC color signal subcarrier frequency, and after adding in the attached filter delay, produce independent delays of 1 H (the horizontal scan period). Pin Assignment MN3814 VBB 1 8 VDD1 XI 2 7 VSS VBIAS 3 6 VDD2 Features High-precision 1 H delay for video signal CMOS process for low power consumption Low EMI levels from clock during driving Low clock leakage, which allows use of simpler filters VO 4 5 VIN (TOP VIEW) DIP008-P-300 Applications 1 H delays of NTSC video signals, especially for: Comb filters Signal-to-noise ratio improvement Dropout compensation MN3814S VBB N.C. N.C. X1 VBIAS VO N.C. N.C. N.C. 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 N.C. N.C. VDD1 VSS VDD2 VIN N.C. N.C. N.C. (TOP VIEW) SOP018-P-0300 1 MN3814, MN3814S Block Diagram CCD Delay Line Series (14) 6 V DD2 (16) 8 Bias circuit (5) 3 VBIAS VDD1 VIN 5 (13) 906-stage CCD analog shift register oS o1 o2 oR oSH Resampling output amplifier (6) 4 VO Clock driver Substrate bias generator Timing adjustment Waveform adjustment 7 (15) (4) 2 XI 1 (1) The numbers in parentheses are the pin numbers for the MN3814S. 2 VBB VSS CCD Delay Line Series Pin Descriptions MN3814 Pin No. 1 2 3 4 5 6 7 8 MN3814S Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Symbol VBB N.C. N.C. XI VBIAS VO N.C. N.C. N.C. N.C. N.C. N.C. VIN VDD2 VSS VDD1 N.C. N.C. Pin Name Substrate connection No connection No connection 14.32 MHz clock input Output amplifier control Signal output No connection No connection No connection No connection No connection No connection Signal input 9 volt power supply Ground 5 volt power supply No connection No connection Symbol VBB XI VBIAS VO VIN VDD2 VSS VDD1 Pin Name Substrate connection 14.32 MHz clock input Output amplifier control Signal output Signal input 9 volt power supply Ground 5 volt power supply MN3814, MN3814S 3 MN3814, MN3814S Electrical Characteristics CCD Delay Line Series VDD1=5.0V, VDD2=9.0V, Vck=0.3VP-P (sine wave), Vin=0.5VP-P, fck=14.31818MHz, Ta=25C Parameter Power supply current (1) Power supply current (2) Signal bandwidth Insertion gain Total harmonic distortion Signal-to-noise ratio Clock leakage Delay time VO pin output impedance Symbol IDD1 IDD2 BW IG THD S/N NC D ZO Measurement Conditions Average current for 5 volt power supply Average current for 9 volt power supply -3 dB for 200 kHz value fsig=200kHz fsig=200kHz Signal output (Vp-p)/noise output (rms) Clock fundamental component output min typ 26 10 max 50 25 Unit mA mA MHz 4.0 4 50 5.5 7 1 56 -30 63.33 250 500 -15 10 3 dB % dB dB s 4 CCD Delay Line Series Package Dimensions (Unit:mm) MN3814 DIP008-P-0300 MN3814, MN3814S 9.60.4 8 5 1 4 3.30.2 2.54 0.50.1 1.30.1 6.40.2 3.450.30 4.8max. 0.7min. 0 to 15 SEATING PLANE 7.620.20 0.25 -0 +0.20 .05 MN3814 SOP018-P-0300 12.600.20 18 10 1.100.20 5.500.20 7.700.30 0.15 -0.05 +0.10 1 9 1.90max. 1.500.20 0 to 10 0.30min. (1.22) 1.27 0.400.10 SEATING PLANE 0.10 +0.18 -0.10 5 |
Price & Availability of MN3814
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |