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PD - 9.1262D
IRF7603
HEXFET(R) Power MOSFET
l l l l l l l
Generation V Technology Ultra Low On-Resistance N-Channel MOSFET Very Small SOIC Package Low Profile (<1.1mm) Available in Tape & Reel Fast Switching
S S S G
1 2
8 7
A A D D D D
VDSS = 30V
3 4
6
5
RDS(on) = 0.035
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The new Micro8 package, with half the footprint area of the standard SO-8, provides the smallest footprint available in an SOIC outline. This makes the Micro8 an ideal device for applications where printed circuit board space is at a premium. The low profile (<1.1mm) of the Micro8 will allow it to fit easily into extremely thin application environments such as portable electronics and PCMCIA cards.
T o p V ie w
Micro8
Absolute Maximum Ratings
Parameter
ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C VGS dv/dt TJ,TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
5.6 4.5 30 1.8 14 20 5.0 -55 to + 150
Units
A W
mW/C
V V/ns C
Thermal Resistance
Parameter
RJA Maximum Junction-to-Ambient
Typ.
---
Max.
70
Units
C/W
All Micro8 Data Sheets reflect improved Thermal Resistance, Power and Current -Handling Ratings- effective only for product marked with Date Code 505 or later . 8/25/97
IRF7603
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Min. 30 --- --- --- 1.0 4.3 --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.029 --- --- --- --- --- --- --- --- 18 2.4 5.6 5.7 28 18 12 520 200 80
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.035 VGS = 10V, ID = 3.7A 0.060 VGS = 4.5V, ID = 1.9A --- V VDS = VGS , ID = 250A --- S VDS = 10V, ID = 1.9A 1.0 VDS = 24V, VGS = 0V A 25 VDS = 24V, VGS = 0V, TJ = 125C -100 VGS = -20V nA 100 VGS = 20V 27 ID = 3.7A 3.6 nC VDS = 24V 8.4 VGS = 10V, See Fig. 6 and 9 --- VDD = 15V --- ID = 3.7A ns --- RG = 6.2 --- RD = 4.0, See Fig. 10 --- VGS = 0V --- pF VDS = 25V --- = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD t rr Q rr
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge
Min. Typ. Max. Units --- --- --- --- --- --- --- --- 53 87 1.8 A 30 1.2 80 130 V ns nC
Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 3.7A, VGS = 0V TJ = 25C, IF = 3.7A di/dt = 100A/s
D
G S
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%.
I SD 3.7A, di/dt 130A/s, VDD V(BR)DSS,
TJ 150C
Surface mounted on FR-4 board, t 10sec.
IRF7603
100
VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTT OM 3.0V TOP
100
I D , Dra in-to -S o u rce Cu rre n t (A )
10
I D , Dra in-to -S o u rce Cu rre n t (A)
VGS 15V 10V 7.0V 5.5V 4.5V 4.0V 3.5V BOTT OM 3.0V TOP
10
3.0 V
1
1
3 .0V
0.1 0.1 1
20 s P U LSE W IDTH TJ = 25 C A
10
0.1 0.1 1
20 s P U LSE W IDTH TJ = 15 0C A
10
V D S , D rain-to-S ource V oltage (V )
V D S, D rain-to-S ource Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.0
T J = 2 5 C
10
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce (N o rm a li ze d )
I D = 3.7A
I D , D r ain- to-S ourc e C urre nt (A )
1.5
T J = 1 5 0 C
1.0
1
0.5
0.1 3.0 3.5 4.0
VD S = 1 0 V 2 0 s PU L SE W ID TH
4.5 5.0 5.5
A
0.0 -60 -40 -20 0 20 40 60 80
V G S = 10 V
100 120 140 160
A
V G S , Ga te-to-S o urce V oltage (V )
T J , Junction T emperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRF7603
1000 20
800
C , C a p a c ita n c e (p F )
C iss
600
C o ss
V G S , G a te -to -S o u rc e V o lta g e (V )
V GS C is s C rs s C os s
= = = =
0V , f = 1MH z C gs + C g d , Cds SH OR TED Cgd C ds + C gd
I D = 3.7 A V DS = 24V V DS = 15V
16
12
400
8
C rss
200
4
0 1 10 100
A
0 0 4 8 12
FO R TEST C IRC U IT SEE FIG UR E 9
16 20 24 28
A
V D S , Drain-to-Source V oltage (V)
Q G , T otal G ate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
I S D , R e v e rse D ra in C u rre n t (A )
O PER ATIO N IN T HIS AR EA LIMITE D BY R DS (on)
10
I D , D ra in C u rre n t (A )
10
TJ = 1 50 C
100 s
1m s
TJ = 25 C
1
1
10 m s
0.1 0.4 0.8 1.2 1.6
VG S = 0 V
2.0
A
2.4
0.1 0.1
T A = 25 C T J = 15 0C S in gle Pu lse
1 10
A
100
V S D , Source-to-D rain V oltage (V )
V D S , D rain-to-S ource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRF7603
QG
VDS VGS RG
RD
10V
QGS VG QGD
D.U.T.
+
- VDD
10V
Charge
Pulse Width 1 s Duty Factor 0.1 %
Fig 9a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
Fig 10a. Switching Time Test Circuit
VDS
50K 12V .2F .3F
90%
D.U.T. VGS
3mA
+ V - DS
10% VGS
td(on)
IG ID
tr
t d(off)
tf
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
100
Fig 10b. Switching Time Waveforms
D = 0.50
Thermal Response (Z thJA )
0.20 10 0.10 0.05 0.02 1 0.01
P DM t1 t2 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJA + TA 0.01 0.1 1 10 100
0.1 0.00001
0.0001
0.001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
IRF7603
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* V GS = 5V for Logic Level Devices Fig 12. For N-Channel HEXFETS
IRF7603
Package Outline
Micro8 Outline Dimensions are shown in millimeters (inches)
L E A D A S S IG N M E N T S D -B3 DDDD 8765 3 E -A1234 SSSG S1 G 1 S2 G2 8765 H 0 .2 5 (.0 1 0 ) M A M S IN G L E 123 4 DUAL 1234 D1 D1 D2 D2 87 65 D IM A A1 B C D e e1 E H e 6X e1 A -C B 8X 0. 08 (. 00 3 ) M A1 C AS B S 0 . 10 (. 00 4 ) L 8X C 8X 3 .2 0 ( .1 2 6 ) 4. 2 4 5 .2 8 ( .1 6 7 ) ( .2 08 ) R E C O M M E N D E D F O O T P R IN T 1 . 04 ( .0 4 1 ) 8X 0 .3 8 8X ( .0 1 5 ) L IN C H E S M IN . 0 36 . 0 04 . 0 10 .0 0 5 .1 1 6 MAX .0 4 4 .0 0 8 .0 1 4 .0 0 7 .1 2 0 M IL LI M E T E R S M IN 0 .9 1 0 .1 0 0 .2 5 0 .1 3 2 .9 5 MAX 1 . 11 0 . 20 0 . 36 0 .1 8 3 .0 5
. 0 25 6 B A S IC . 0 12 8 B A S IC . 1 16 .1 8 8 . 0 16 0 .1 2 0 .1 9 8 .0 2 6 6
0 .6 5 B A S IC 0 .3 3 B A S IC 2. 9 5 4 .7 8 0 .4 1 0 3 .0 5 5. 03 0 .6 6 6
N OT ES: 1 D IM E N SIO NIN G A ND TO LER AN C IN G P ER AN SI Y14.5M -1982. 2 C ON T RO LLIN G D IM EN SION : IN C H. 3 D IM E N SIO NS DO NO T IN CL UD E M O LD F LAS H.
0 . 65 6 X ( .0 2 56 )
Part Marking Information
Micro8
E X AM P L E : T H IS IS A N IR F 7 5 0 1
A D A T E C O D E (Y W W ) Y = L A S T D IG IT O F YE A R W W = W EE K
451 7 5 01
PA RT NUM BER
TOP
IRF7603
Tape & Reel Information
Micro8 Dimensions are shown in millimeters (inches)
T E R M IN A L N U M B E R 1
12 .3 ( .4 8 4 ) 11 .7 ( .4 6 1 )
8. 1 ( . 31 8 ) 7. 9 ( . 31 2 )
F E E D D IR EC T IO N
N O TE S : 1 . O U TL IN E CO N FO R M S TO E IA -48 1 & E IA -5 4 1. 2 . C O N TRO L LIN G D IM E NS IO N : M IL LIM E TE R .
3 3 0. 00 (1 2 .9 92 ) MAX.
1 4 .4 0 ( . 56 6 ) 1 2 .4 0 ( . 48 8 ) NO TE S : 1. C O N T R O LL IN G D I M E N S IO N : M I LL IM E T ER . 2. O U T LIN E C O N F O R M S T O E IA -48 1 & E IA -54 1 .
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 8/97

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