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| Multimedia ICs SYNC separator IC with AFC BA7071F The BA7071F contains a video synchronization separation circuit, a vertical video synchronization separation circuit, a horizontal oscillation circuit, and a phase comparator. It separates and outputs the horizontal and vertical synchronization signals (HD and VD), and the composite synchronization signal (Sync-out) from input video or composite synchronization signals. The phase difference between HD and VD is guaranteed for both the rising and falling edges of VD. *Applications camcorders TVs, VCRs and *FeaturesAFC circuit. 1) Built in 2) HD and VD phase difference guaranteed. 3) Wide supply voltage range (3V to 7V). 4) Horizontal free-run frequency does not require adjustment. 5) Low external parts count. 6) SOP 8-pin package. *Absolute maximum ratings (Ta = 25C) Parameter Power supply voltage Power dissipation Operating temperature Storage temperature Symbol VCC Pd Topr Tstg Limits 8.0 350 - 20 ~ + 75 - 55 ~ + 125 Unit V mW C C Reduced by 3.5mW for each increase in Ta of 1C over 25C. *Recommended operating conditions (Ta = 25C) Parameter Power supply voltage Symbol VCC Min. 2.85 Typ. -- Max. 7.5 Unit V 1 Multimedia ICs BA7071F *Block diagram VIN 1 SYNC SEPA 8 Sync - OUT HD - OUT 2 Vsepa 7 VD - OUT GND 3 6 VCC PD - OUT 4 PD COMP VCO 5 HOSC - R *Pin descriptions Pin No. 1 2 3 4 5 6 7 8 Pin name VIN HD - OUT GND PD - OUT HOSC - R VCC VD - OUT Sync - OUT Video input HD output GND Phase comparator output Horizontal oscillator resistor Power supply (VCC) VD output Synchronization signal output Function 2 Multimedia ICs BA7071F *Input / output circuits VIN VCC HOSC - R VCC HD - OUT VCC 1pin 5pin 2pin VD - OUT VCC PD - OUT VCC Sync - OUT VCC 7pin 4pin 8pin *Electrical characteristics (unless otherwise noted Ta = 25C and VCC = 5.0V) Parameter Quiescent current Minimum SYNC separation level Pulse voltage low Pulse voltage high (Horizontal) free-running frequency Capture range Lock-in phase HD, VD phase deviation 1 HD, VD phase deviation 2 HD pulse width VD pulse width VIN, VD phase difference Symbol Min. Typ. Max. Unit IQ 3.0 5.8 8.6 mA pin 8 open Conditions Vsyn-min -- Vp-L Vp-H fH.O fCAP THPH -- 4.7 0.08 0.15 0.1 5.0 0.3 -- VP-P pin 1 terminated with 75 resistor V V pins 2, 7 pins 2, 7 13.5 15.7 17.9 2.3 0.6 2.7 1.6 -- 2.6 kHz No input signal kHz s s s s s s pin 2 pin 7 pin 7 pin 2 pin 7 pin 1 pin - 7 pin - 1 pin - 2 pin - 2 (FLD1) (FLD1) -- THVD1 19.0 24.0 29.0 THVD2 19.0 24.0 29.0 THD TVD TINVD 9.0 249 10.0 11.0 254 259 41.0 48.0 55.0 3 Multimedia ICs BA7071F *Measurement circuit (application example) VIDEO IN 1F C1 HD OUT 2 Vsepa 7 VCC 20k R4 + 1 SYNC SEPA SYNC OUT 8 VD OUT VCC 3 6 + C4 0.47F C5 0.022F 4 VCC PD COMP VCO 5 0.47 + R3 VCC = 3V, 10k VCC = 5V, 18k + 0.47 C3 2200pF 220k R2 R1 100k When SYNC SEPA output only is used. HD and VD unused. VCC 1F C1 20k 1 SYNC SEPA 8 R4 VIDEO IN + SYNC OUT 2 Vsepa 7 VCC 3 6 + C4 0.47F C5 0.022F 4 PD COMP VCO 5 R1 100k Fig. 1 (1) Connect a 100k resistor between pin 5 and ground. Leave pins 2, 4 and 7 open. (2) SYNC OUT (pin 8) has positive output. (3) The SYNC OUT (pin 8) output rise delay times in relation to the VIDEO IN (pin 1) input signal Sync fall are as follws: 830 ns (reference value) ,when VCC = 5V 880 ns (reference value) ,when VCC = 3V (4) The SYNC OUT (pin 8) output fall delay times in relation to the VIDEO IN (pin 1) input signal Sync rise are as follws: 150 ns (reference value) ,when VCC = 5V 220 ns (reference value) ,when VCC = 3V 4 Multimedia ICs BA7071F *Circuit operation separation circuit (1) Synchronization Detects the charging current to a externally-connected capacitor, and performs synchronization separation. (2) Horizontal oscillation circuit When a video signal is input, it is synchronized with Hsync by the PLL. The horizontal free-running frequency is determined by external resistor R1. fH * O = 1.57E6 [kHz] R1 (3) Vertical synchronization separation circuit When a video signal is input, synchronization signal separation is done over the vertical synchronization pulse interval. (4) VIN, HD, and VD timing charts Vertical synchronization pulse interval 1 / 2H NTSC signal Odd field (IN) VIN, VD phase difference NTSC signal Even field (IN) VD (OUT) HD, VD phase difference 1 HD Odd field (OUT) HD Even field (OUT) HD, VD phase difference 2 1. The rise and fall positions for VD are basically the same for both odd and even fields. 2. HD shifts by 1 / 2H during the odd and even field interval. 3. Only the odd field is given for the specification. Fig. 2 *Attached components a tolerance of 2%, and a Resistor R1 should have temperature coefficient of 100ppm or lower. 5 Multimedia ICs MINIMUM SYNC - SEPA LEVEL : Vsyn - Min. (VPP) BA7071F *Electrical characteristic curves 10 VCC = 5.0V QUIESCENT CURRENT : IQ (mA) 8 6 250 HORIZONTAL FREQUENCY : fH.O (kHz) VCC = 5.0V 200 16.2 VCC = 5.0V 16.0 150 15.8 4 100 15.6 2 50 15.4 0 - 25 0 25 50 75 0 - 25 0 25 50 75 15.2 - 25 0 25 50 75 TEMPERATURE : Ta (C) TEMPERATURE : Ta (C) TEMPERATURE : Ta (C) Fig. 3 Quiescent current vs. temperature Fig. 4 Minimum synchronization separation level vs. temperature Fig. 5 Horizontal free-running frequency vs. temperature 10.4 NTSC VCC = 5.0V HD PULSE WIDTH : THD (s) VD PULSE WIDTH : TVD (s) 10.2 280 HD * VD PULSE TIMING 1 : THDV1 (s) NTSC VCC = 5.0V 270 30 NTSC VCC = 5.0V 28 10.0 260 26 9.8 250 24 9.6 240 22 9.4 - 25 0 25 50 75 230 - 25 0 25 50 75 20 0 - 25 0 25 50 75 TEMPERATURE : Ta (C) TEMPERATURE : T (C) TEMPERATURE : Ta (C) Fig. 6 HD pulse width vs. temperature Fig. 7 VD pulse width vs. temperature Fig. 8 HD, VD phase difference 1 vs. temperature 30 HD * VD PULSE TIMING 2 : THDV2 (s) NTSC VCC = 5.0V 28 26 24 22 20 0 - 25 0 25 50 75 TEMPERATURE : Ta (C) Fig. 9 HD, VD phase difference 2 vs. temperature 6 Multimedia ICs BA7071F *External dimensions (Units: mm) 5.0 0.2 8 6.2 0.3 4.4 0.2 5 1.5 0.1 1 4 0.11 1.27 0.4 0.1 0.3Min. 0.15 SOP8 0.15 0.1 7 |
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