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INTEGRATED CIRCUITS
DATA SHEET
TDA9176 Luminance Transient Improvement (LTI) IC
Preliminary specification Supersedes data of 1995 Jun 13 File under Integrated Circuits, IC02 1996 Jan 30
Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
FEATURES * Luminance transient improvement * Line width control * Can be used in 50 and 100 Hz environments (1FH and 2FH) * Compensating chrominance delay * YUV interface * Black insertion or clamping are selectable * Amplitude selection for optimum operation with 450 mV (p-p) and 1 Vbl-wh luminance signals. QUICK REFERENCE DATA SYMBOL VCC ICC ViY( p-p) ViY(bl-wh) GY ViU(p-p) ViV(p-p) GU. V PARAMETER supply voltage supply current Y input voltage (peak-to-peak value) Y input voltage (black-to-white) Y path gain U input voltage (peak-to-peak value) V input voltage (peak-to-peak value) U and V path gain at 1FH at 2FH low amplitude mode high amplitude mode CONDITIONS - - - - - - - - MIN. 7.2 TYP. 8.0 24 30 0.45 1.0 1 1.33 1.05 1 GENERAL DESCRIPTION
TDA9176
The TDA9176 is a Luminance Transient Improvement (LTI) IC which is suitable for operation in both 50 and 100 Hz environments. The device can be used in conjunction with both LCD and CRT displays. The TDA9176 also contains chrominance delay lines to compensate for the luminance delay. The device can be used as a low-power, cost effective alternative to (but also in combination with) Scan Velocity Modulation (SVM). The device operates at a supply voltage of 8 V. The device is contained in a 16 pin dual in-line package.
MAX. 8.8 - - 0.63 1.4 1.90 1.50 -
UNIT V mA mA V V V V
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA9176 DIP16 DESCRIPTION plastic dual in-line package; 16 leads (300 mil); long body VERSION SOT38-1
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
BLOCK DIAGRAM
TDA9176
handbook, full pagewidth
SC 8 SANDCASTLE DETECTOR
VCC 15 LTI CONTROL
RT 3
LW 2 13
TDA9176
LTI SHAPER
YOUT
4 YIN
BLACK INSERTION CLAMP
DELAY
CLAMPS
MINMAX
BLI/CL AMPSEL
7 9 DELAY DELAY PTAT CURRENT SOURCE 12 UOUT 16 Rext 1
MBE775
10 BAND GAP
Vref
14 GND
6 VIN
11
5
VOUT UIN
fSEL
Fig.1 Block diagram.
1996 Jan 30
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
PINNING SYMBOL fSEL LW RT YIN UIN VIN BLI/CL SC AMPSEL Vref PIN 1 2 3 4 5 6 7 8 9 10 DESCRIPTION 1FH or 2FH mode selection vertical line width control input rise time control input luminance signal input U input (colour difference signal) V input (colour difference signal) black level insertion/clamp mode selection synchronization input signal high/low amplitude luminance signal mode selection internally generated reference voltage for line width control and rise time control V output (colour difference signal) U output (colour difference signal) luminance signal output ground (0 V) supply voltage (+8 V) external resistor for PTAT current source Fig.2 Pin configuration.
handbook, halfpage
TDA9176
fSEL LW RT YIN UIN VIN BLI/CL SC
1 2 3 4
16 Rext 15 VCC 14 GND 13 YOUT
TDA9176
5 6 7 8
MBE776
12 UOUT 11 VOUT 10 Vref 9 AMPSEL
VOUT UOUT YOUT GND VCC Rext
11 12 13 14 15 16
1996 Jan 30
4
Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
FUNCTIONAL DESCRIPTION The TDA9176 is a Luminance Transient Improvement (LTI) IC which is suitable for operation in both 50 and 100 Hz environments. The IC also contains chrominance delay lines to compensate for the luminance delay. A diagram of the LTI processor is illustrated in Fig.3. The LTI processor contains a delay line which drives a minimum/maximum (MINMAX) detector and a control circuit. When the control circuit discovers a transient, the LTI shaper switches from the minimum to the maximum signal (or vice-versa, depending on the sign of the transient). By mixing the original signal with the switched signal, a variable transient improvement is obtained. The 50% crossing point of the transient is not affected by the LTI circuit. If the rise time improvement is active, the duty cycle of the output signal can be varied with the line width control input. This function delays the rising edge and advances the falling edge (or vice-versa). This can be used for example aperture correction. Figures 4 and 5 illustrate some waveforms of the LTI processor. For correct operation the LTI circuit requires a number of fast clamps. To overcome problems where noise is superimposed on the input signal the device contains an input clamp that can either clamp to the black level of the input signal, or, insert a black level. When a black level is inserted, the internal clamps do not respond to the noise on the input signal (see Fig.1). When the input signal already has an inserted black level (e.g. when it is driven from the TDA9170 picture booster) it is recommended to
TDA9176
set the device to the clamping mode. If no inserted black level is available on the input signal it is recommended to select the black insert mode of the input clamp. The chrominance delay lines compensate for the delay of the luminance signal in the LTI circuit. This is to safeguard a correct colour fit. Two and three level sandcastles can be used as a timing signal, only the clamp pulse of the sandcastle input is used in the device. There are three selection inputs to select the modes of operation. These selections are as follows: 1. 1FH or 2FH, for the 50 or 100 Hz applications. 2. Amplitude selection, for optimum operation of the circuit with 450 mV (p-p) or 1 Vbl-wh luminance signals. 3. Black insertion or clamping of the luminance signal. The selection inputs must be directly connected to either ground or the supply rail. The modes are selected as follows: Frequency selection: GND = 1FH mode, VCC = 2FH mode Amplitude selection: GND = 450 mV (p-p), VCC = 1 Vbl-wh mode Black insertion/clamp: GND = clamp mode, VCC = black insert mode. If the selection pins are left floating, internal 1 M resistors connected to the pins set the device to, 1FH mode, black insert mode and 1 Vbl-wh mode.
handbook, full pagewidth
RT 3 LTI CONTROL
LW 2 13
TDA9176
LTI SHAPER
YOUT
4 YIN DELAY CLAMPS MINMAX
MBE777
Fig.3 Block diagram of the LTI circuit.
1996 Jan 30
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
TDA9176
MBE779
handbook, full pagewidth
rise time = nominal
line width = don't care
rise time = minimal
line width = nominal
0.0
2.0 s
Fig.4 LTI waveforms for 2T pulse and step (1FH mode, rise time varied).
1996 Jan 30
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
TDA9176
MBE780
handbook, full pagewidth
rise time = nominal
line width = don't care
rise time = minimal
line width = nominal
rise time = minimal
line width = maximum black expansion
rise time = minimal
line width = maximum white expansion 0.0 1.0 s
Fig.5 LTI waveforms for 2T pulse and step (2FH mode, line width varied).
1996 Jan 30
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCC ICC Ptot Tstg Tamb Ves PARAMETER supply voltage supply current total power dissipation storage temperature operating ambient temperature electrostatic handling note 1 note 2 Notes CONDITIONS - - - -55 -10 -3000 -300 MIN. - - - - - - - TYP.
TDA9176
MAX. 9.0 35 0.315 +150 +70 +3000 +300 V
UNIT mA W C C V V
1. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k resistor (all pins). 2. Machine model: equivalent to discharging a 200 pF capacitor through a 0 resistor (all pins). THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE 69 UNIT K/W
QUALITY SPECIFICATION In accordance with SNW-FQ-611 part E. The numbers of the quality specification can be found in the "Quality reference Handbook". The handbook can be ordered using the code 9397 750 00192.
1996 Jan 30
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
CHARACTERISTICS VCC = 8 V; Tamb = 25 C; unless otherwise specified. SYMBOL Supplies VCC ICC Pdis supply voltage supply current power dissipation 1FH mode 2FH mode 1FH mode 2FH mode Y channel; note 1 Vi(Y p-p) ViY(bl-wh) Ii(Y) VBLos Vo(DC) G(Y) td Vtr VLW input voltage (peak-to-peak value) input voltage (black-to-white) input current black offset voltage DC output voltage level during clamping gain delay time rise time control voltage line width control voltage black insert mode low amplitude mode high amplitude mode all modes 1FH mode 2FH mode minimum rise time nominal rise time normal width LOW amplitude mode HIGH amplitude mode - - - - - - - - - 3.5 0 - 0.45 1.0 0 - 3.7 2.2 1 165 100 - - 2.0 - - 20 14 33 7.2 - - - - 8.0 24 30 192 240 PARAMETER CONDITIONS MIN. TYP.
TDA9176
MAX.
UNIT
8.8 - - - -
V mA mA mW mW
0.63 1.4 - 10 - - - - - 4.0 0.5 - 0.5 4.0 - - -
V V A mV V V ns ns V V V V V ns ns %
maximum black expansion 0 maximum white expansion 3.5 tr(min) (min) minimum rise time minimum duty factor 1FH mode; note 2 2FH mode; note 2 fi = 2 MHz; line width minimum; maximum black expansion; note 3 fi = 2 MHz; line width maximum; maximum white expansion; note 3 1FH mode; nominal rise time; note 4 2FH mode; nominal rise time; note 4 - - -
(max)
maximum duty factor
-
67
-
%
BY
bandwidth
7 14
- -
- -
MHz MHz
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
TDA9176
SYMBOL U and V channels ViUV( p-p) IiUV VoUV(DC) GUV td(UV) BUV CLth Vripple Vref(DC) Isource Notes
PARAMETER
CONDITIONS - - - - - - - 5 - - - note 5 -
MIN.
TYP.
MAX.
UNIT
input voltage (peak-to-peak value) input current DC output voltage level during clamping gain delay time bandwidth
V channel U channel both channels both channels both channels 1FH mode 2FH mode both channels
1.05 1.33 0 3.0 1 165 100 - Vtop - 0.6 -
1.50 1.90 - - - - - - - 0.4 - 1
V V A V
ns ns MHz
Sandcastle input clamping threshold allowed ripple on clamping pulse V V
Reference voltage DC reference voltage level source current 4.0 - V mA
1. All data given is for a 3.0 k external resistor connected to the PTAT current source (pin 16). 2. The test input is a step whose rising edge is the rising half of a sine wave. For the 1FH mode the input rise time is 250 ns (i.e. half of a 2 MHz sine wave). For the 2FH mode the input rise time is 125 ns (i.e. half of a 4 MHz sine wave). The output rise time is measured between the 10% and 90% points of the output signal. 3. The figures given on duty cycle variation refer to the following conditions: the device should be in 1FH mode (pin 1 at ground level) and the rise time should be at minimum (pin 3 connected to Vref, pin 10). 4. In the transparent mode, i.e. at normal rise time, the bandwidth of the luminance path for which the group delay time constant is 7 MHz in the 1FH mode and 14 MHz in the 2FH mode. However, as the circuit uses all-pass filters, ringing on the output signal may occur if the bandwidth of the input signal is larger than 7 MHz in the 1FH mode or 14 MHz in the 2FH mode. As the LTI processor adds harmonics to the luminance signal, the bandwidth of the output signal is much larger than 14 MHz. 5. The maximum DC load on the reference voltage pin (pin 10) should not exceed 1 mA.
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
TEST AND APPLICATION INFORMATION
TDA9176
handbook, full pagewidth
YOUT UOUT VOUT 100 nF 8V 100 nF 0V 3.0 k 16 15 14 13 12 11 10 100 nF 100 F 100 nF 100 nF
9
TDA9176
1 2 3 4 5 6 7 8
MBE778
100 nF YIN
100 nF UIN VIN
100 nF SC
Fig.6 Application diagram for 50 Hz application with 1 Vbl-wh input signal and luminance clamping.
1996 Jan 30
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
INPUT PIN CONFIGURATION
handbook, full pagewidth
TDA9176
1 M fSEL 1 1 k
100
16
Rext
15 14 LW 2 1 k 2V
VCC GND
100 RT 3 1 k 2V 1.5 mA
13
YOUT
YIN
4
100
4V
100 0.5 mA 5 100 4V
12
UOUT
UIN
100 VIN 6 100 4V
11
VOUT
0.5 mA
10 BLI/CL 7 1 k 1 M
TDA9176
30 k
100
Vref
SC
8
100
1 k 1 M
9
AMPSEL
MBE781
Fig.7 Input pin configuration.
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
PACKAGE OUTLINE DIP16: plastic dual in-line package; 16 leads (300 mil); long body
TDA9176
SOT38-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 16 9 MH wM (e 1)
pin 1 index E
1
8
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.7 0.19 A1 min. 0.51 0.020 A2 max. 3.7 0.15 b 1.40 1.14 0.055 0.045 b1 0.53 0.38 0.021 0.015 c 0.32 0.23 0.013 0.009 D (1) 21.8 21.4 0.86 0.84 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.9 3.4 0.15 0.13 ME 8.25 7.80 0.32 0.31 MH 9.5 8.3 0.37 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT38-1 REFERENCES IEC 050G09 JEDEC MO-001AE EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-10-02 95-01-19
1996 Jan 30
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA9176
with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
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Philips Semiconductors
Preliminary specification
Luminance Transient Improvement (LTI) IC
NOTES
TDA9176
1996 Jan 30
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Philips Semiconductors - a worldwide company
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Internet: http://www.semiconductors.philips.com/ps/ For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-2724825 SCDS47 (c) Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1100/02/pp16 Document order number: Date of release: 1996 Jan 30 9397 750 00598

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