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INTEGRATED CIRCUITS DATA SHEET TDA8761A 9-bit analog-to-digital converter for digital video Product specification Supersedes data of 1997 Aug 21 File under Integrated Circuits, IC02 1998 Nov 03 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video FEATURES * 9-bit resolution * Sampling rate up to 40 MHz * DC sampling allowed * One clock cycle conversion only * High signal-to-noise ratio over a large analog input frequency range (8.2 effective bits at 10 MHz full-scale input at fclk = 30 MHz) * No missing codes guaranteed * In Range (IR) CMOS output * Levels TTL and CMOS compatible digital inputs * 3 to 5 V CMOS digital outputs * Low-level AC clock input signal allowed * External reference voltage regulator * Power dissipation only 158 mW (typical) * Low analog input capacitance, no buffer amplifier required * No sample-and-hold circuit required. QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO INL AINL DNL ADNL fclk(max) Ptot Note 1. fi = 10 MHz and fclk = 30 MHz; fi = 8 MHz and fclk = 20 MHz. PARAMETER analog supply voltage digital supply voltage output stages supply voltage analog supply current digital supply current output stages supply current integral non-linearity AC integral non-linearity differential non-linearity AC differential non-linearity maximum clock frequency total power dissipation fclk = 30 MHz; ramp input fclk = 30 MHz; ramp input full-scale input sine wave; note 1 50% full-scale input sine wave; note 1 fclk = 30 MHz; ramp input full-scale input sine wave; note 1 50% full-scale input sine wave; note 1 CONDITIONS MIN. 4.75 4.75 3.0 - - - - - - - - - 40 - APPLICATIONS Analog-to-digital conversion for: * Video data digitizing * Digital Video Broadcasting (DVB) * Cable TV. GENERAL DESCRIPTION TDA8761A The TDA8761A is a 9-bit Analog-to-Digital Converter (ADC) for professional video and digital video set box applications. It converts the analog input signal into 9-bit binary-coded digital words at a maximum sampling rate of 40 MHz. Its linearity performance ensures the required conversion accuracy in the event of 256-QAM demodulator concept and for all symbol frequencies. All digital inputs and outputs are TTL and CMOS compatible, although a low-level sine wave clock input signal is allowed. TYP. 5.0 5.0 3.3 18 13 1 0.8 0.75 0.5 0.3 0.5 0.3 - 158 MAX. 5.25 5.25 5.25 24 18 2 1.6 0.9 0.75 0.7 0.75 0.5 - 173 UNIT V V V mA mA mA LSB LSB LSB LSB LSB LSB MHz mW 1998 Nov 03 2 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video ORDERING INFORMATION TYPE NUMBER TDA8761AM BLOCK DIAGRAM PACKAGE NAME SSOP28 DESCRIPTION plastic shrink small outline package; 28 leads; body width 5.3 mm TDA8761A VERSION SOT341-1 handbook, full pagewidth V CCA 3 CLK 1 VCCD2 11 OE 10 CLOCK DRIVER VRT 2 TC TDA8761A 9 25 D8 24 D7 23 D6 RLAD analog voltage input VI 8 ANALOG -TO - DIGITAL CONVERTER LATCHES CMOS OUTPUTS 22 D5 21 D4 20 D3 19 D2 18 D1 17 D0 VCCO LSB data outputs MSB VRM 7 VRB 6 13 28 VCCD1 IN RANGE LATCH CMOS OUTPUT 26 IR output 4 AGND analog ground 12 DGND2 27 DGND1 14 OGND output ground MBG910 digital grounds Fig.1 Block diagram. 1998 Nov 03 3 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video PINNING SYMBOL CLK TC VCCA AGND n.c. VRB VRM VI VRT OE VCCD2 DGND2 VCCO OGND n.c. n.c. D0 D1 D2 D3 D4 D5 D6 D7 D8 IR DGND1 VCCD1 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 clock input two's complement input (active LOW) analog supply voltage (5 V) analog ground not connected reference voltage BOTTOM input reference voltage MIDDLE analog input voltage reference voltage TOP input output enable input (CMOS level input, active LOW) digital supply voltage 2 (5 V) digital ground 2 supply voltage for output stages (3 to 5 V) output ground not connected not connected data output; bit 0 (LSB) data output; bit 1 data output; bit 2 data output; bit 3 data output; bit 4 data output; bit 5 data output; bit 6 data output; bit 7 data output; bit 8 (MSB) in range data output digital ground 1 digital supply voltage 1 (5 V) TC VCCA AGND n.c. VRB VRM VI VRT 2 3 4 5 6 7 handbook, halfpage TDA8761A DESCRIPTION CLK 1 28 VCCD1 27 DGND1 26 IR 25 D8 24 D7 23 D6 22 D5 TDA8761A 8 9 21 D4 20 D3 19 D2 18 D1 17 D0 16 n.c. 15 n.c. MBG909 OE 10 VCCD2 11 DGND2 12 V CCO 13 OGND 14 Fig.2 Pin configuration. 1998 Nov 03 4 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCCA VCCD VCCO VCC PARAMETER analog supply voltage digital supply voltage output stages supply voltage supply voltage differences between VCCA and VCCD VCCD and VCCO VCCA and VCCO VI Vi(p-p) IO Tstg Tamb Tj Note input voltage AC input voltage for switching (peak-to-peak value) output current storage temperature operating ambient temperature junction temperature referenced to AGND referenced to DGND -1.0 -1.0 -1.0 -0.3 - - -55 0 - +1.0 +4.0 +4.0 +7.0 VCCD 10 +150 +70 +150 CONDITIONS note 1 note 1 note 1 MIN. -0.3 -0.3 -0.3 MAX. +7.0 +7.0 +7.0 TDA8761A UNIT V V V V V V V V mA C C C 1. The supply voltages VCCA, VCCD and VCCO may have any value between -0.3 and +7.0 V provided that the supply voltage differences VCC are respected. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 110 UNIT K/W 1998 Nov 03 5 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video TDA8761A CHARACTERISTICS VCCA = V3 to V4 = 4.75 to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 to 5.25 V; VCCO = V13 to V14 = 3.0 to 5.25 V; AGND and DGND shorted together; Tamb = 0 to 70 C; typical values measured at VCCA = VCCD = 5 V and VCCO = 3.3 V; Vi(p-p) = 1.8 V; CL = 15 pF and Tamb = 25 C; unless otherwise specified. SYMBOL Supplies VCCA VCCD VCCO VCC analog supply voltage digital supply voltage output stages supply voltage supply voltage differences between VCCA and VCCD VCCA and VCCO VCCD and VCCO ICCA ICCD ICCO Inputs CLOCK INPUT CLK (REFERENCED TO DGND); note 1 VIL VIH IIL IIH Zi Ci VIL VIH IIL IIH IIL IIH Zi Ci LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current input impedance input capacitance Vclk = 0.8 V Vclk = 2 V fclk = 30 MHz 0 2 -1 - - - 0 2 VIL = 0.8 V VIH = 2.0 V VI = VRB = 1.3 V VI = VRT = 3.43 V fi = 10 MHz -1 - - - - - - - 0 2 2 2 - - - - 17 35 8 5 0.8 VCCD +1 10 - - 0.8 VCCD - 1 - - - - V V A A k pF analog supply current digital supply current output stages supply current -0.2 -0.2 -0.2 - - fclk = 30 MHz; ramp input - - - - 18 13 1 +0.2 +2.25 +2.25 24 18 2 V V V mA mA mA 4.75 4.75 3.0 5.0 5.0 3.3 5.25 5.25 5.25 V V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT INPUTS OE AND TC (REFERENCED TO DGND); see Table 2 LOW-level input voltage HIGH-level input voltage LOW-level input current HIGH-level input current V V A A A A k pF VI (ANALOG INPUT VOLTAGE REFERENCED TO AGND) LOW-level input current HIGH-level input current input impedance input capacitance 1998 Nov 03 6 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video SYMBOL PARAMETER CONDITIONS MIN. TYP. TDA8761A MAX. UNIT Reference voltages for the resistor ladder; see Table 1 VRB VRT Vdiff Iref RLAD TCRLAD VosB VosT Vi(p-p) Outputs DIGITAL OUTPUTS D8 TO D0 AND IR (REFERENCED TO OGND) VOL VOH IOZ LOW-level output voltage HIGH-level output voltage output current in 3-state mode IOL = 1 mA IOH = -1 mA 0.5 V < VO < VCCO 0 -20 - - 0.5 VCCO +20 V V A VCCO - 0.5 - reference voltage BOTTOM reference voltage TOP differential reference voltage VRT - VRB reference current resistor ladder temperature coefficient of the resistor ladder offset voltage BOTTOM offset voltage TOP analog input voltage (peak-to-peak value) note 2 note 2 note 3 VRT - VRB = 2.13 V 1.2 3.2 2 - - - - - - 1.7 1.3 3.43 2.13 8.7 245 1860 456 160 160 1.81 2.45 3.0 - - - - - - 2.55 V V mA ppm m/K mV mV V VCCA - 0.8 V Switching characteristics CLOCK INPUT CLK; see Fig.4; note 1 fclk(max) tCPH tCPL maximum clock frequency clock pulse width HIGH clock pulse width LOW 40 10 10 - - - - - - MHz ns ns Analog signal processing LINEARITY INL AINL integral non-linearity AC integral non-linearity fclk = 30 MHz; ramp input - full-scale input sine wave; note 4 50% full-scale input sine wave; note 4 DNL ADNL differential non-linearity AC differential non-linearity full-scale input sine wave; note 4 50% full-scale input sine wave; note 4 OFER offset error middle code; VRB = 1.3 V; VRT = 3.43 V VRB = 1.3 V; VRT = 3.43 V; note 5 - - 0.4 0.75 0.5 0.3 0.5 0.3 1 1 0.9 0.75 0.7 0.75 0.5 - LSB LSB LSB LSB LSB LSB LSB fclk = 30 MHz; ramp input - - - - GER gain error (from device to device) - 0.1 - % 1998 Nov 03 7 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video SYMBOL PARAMETER CONDITIONS - MIN. TYP. - - - TDA8761A MAX. UNIT BANDWIDTH (fclk = 30 MHZ) B analog bandwidth full-scale sine wave; note 6 15 20 350 MHz MHz MHz 75% full-scale sine wave; - note 6 small signal at mid-scale; - VI = 10 LSB at code 256; note 6 tSTLH tSTHL analog input settling time LOW-to-HIGH analog input settling time HIGH-to-LOW full-scale square wave; Fig.6; note 7 full-scale square wave; Fig.6; note 7 - - 1.5 1.5 3.0 3.0 ns ns HARMONICS (fclk = 30 MHZ); see Figs 7 and 8 THD total harmonic distortion fi = 10 MHz without harmonics; fclk = 30 MHz; fi = 10 MHz fclk = 30 MHz fi = 4.43 MHz fi = 10 MHz TWO-TONE; note 9 TTIR two-tone intermodulation rejection fclk = 30 MHz - -56 - dB - - 8.8 8.2 - - bits bits - 53 -56 55 - - dB SIGNAL-TO-NOISE RATIO; see Figs 7 and 8; note 8 SNR signal-to-noise ratio (full scale) dB EFFECTIVE BITS; see Figs 7 and 8; note 8 ENOB effective bits BIT ERROR RATE BER bit error rate fclk = 30 MHz; fi = 10 MHz; VI = 16 LSB at code 256 - 10-13 - times/ sample DIFFERENTIAL GAIN; note 10 Gdiff differential gain fclk = 30 MHz; PAL modulated ramp - 0.5 - % DIFFERENTIAL PHASE; note 10 diff differential phase fclk = 30 MHz; PAL modulated ramp - 0.3 - C 1998 Nov 03 8 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video SYMBOL PARAMETER CONDITIONS MIN. TYP. TDA8761A MAX. UNIT Timing (fclk = 30 MHz; CL = 15 pF); see Fig.4; note 11 tds th td CL tdZH tdZL tdHZ tdLZ Notes 1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock must not be less than 0.5 ns. 2. Analog input voltages producing code 0 up to and including code 511: a) VosB (voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00 and the reference voltage BOTTOM (VRB) at Tamb = 25 C. b) VosT (voltage offset TOP) is the difference between VRT (reference voltage TOP) and the analog input which produces data outputs equal to code 511 at Tamb = 25 C. 3. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities of the converter reference resistor ladder (corresponding to output codes 0 and 511 respectively) are connected to pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.3. V RT - V RB a) The current flowing into the resistor ladder is I L = ----------------------------------------- and the full-scale input range at the converter, R OB + R L + R OT RL to cover code 0 to code 511, is V I = R L x I L = ----------------------------------------- x ( V RT - V RB ) = 0. 852 x ( V RT - V RB ) R OB + R L + R OT b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio RL ----------------------------------------- will be kept reasonably constant from device to device. Consequently variation of the output R OB + R L + R OT codes at a given input voltage depends mainly on the difference VRT - VRB and its variation with temperature and supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching between each of them is then optimized. 4. fi = 10 MHz and fclk = 30 MHz; fi = 8 MHz and fclk = 20 MHz. 5. ( V 511 - V 0 ) - V i(p-p) GER = --------------------------------------------------- x 100 V i(p-p) sampling delay time output hold time output delay time digital output load VCCO = 4.75 V VCCO = 3.15 V 3-state output delay times; see Fig.5 enable HIGH enable LOW disable HIGH disable LOW - - - - 5.5 12 19 12 8.5 15 24 15 ns ns ns ns - 4 - - - 3 - 10 12 - - - 13 15 15 ns ns ns ns pF 6. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater than 2 LSBs, neither any significant attenuation are observed in the reconstructed signal. 7. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square wave signal) in order to sample the signal and obtain correct output data. 1998 Nov 03 9 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video TDA8761A 8. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency (NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = ENOB x 6.02 + 1.76 dB. 9. Intermodulation measured relative to either tone with analog input frequencies of 10.0 and 10.10 MHz. The two input signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter. 10. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a digital-to-analog converter. 11. Output data acquisition: the output data is available after the maximum delay time of td. handbook, halfpage VRT 9 ROT RL RLAD IL code 0 ROB code 511 VRM 7 VRB 6 MGD233 Fig.3 Explanation of note 3. 1998 Nov 03 10 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video Table 1 STEP U/F 0 1 . . 510 511 O/F Table 2 TDA8761A Output coding and input voltage (typical values; referenced to AGND, VRB = 1.3 V, VRT = 3.43 V) BINARY OUTPUT BITS VI(p-p) <1.46 1.46 . . . . 3.27 >3.27 IR D8 0 1 1 . . 1 1 0 0 0 0 . . 1 1 1 D7 0 0 0 . . 1 1 1 D6 0 0 0 . . 1 1 1 D5 0 0 0 . . 1 1 1 D4 0 0 0 . . 1 1 1 D3 0 0 0 . . 1 1 1 D2 0 0 0 . . 1 1 1 D1 0 0 0 . . 1 1 1 D0 0 0 1 . . 0 0 0 D8 D7 D6 D5 D4 D3 D2 D1 D0 1 1 1 . . 0 0 0 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 0 . . 1 1 1 0 0 1 . . 0 1 1 TWO'S COMPLEMENT OUTPUT BITS Mode selection OE 1 0 0 D8 to D0 high impedance active; two's complement active; binary high impedance active active IR TC X 0 1 handbook, full pagewidth t CPL t CPH VCCD CLK 50% 0V sample N sample N + 1 sample N + 2 Vl t ds DATA D0 to D8 DATA N-2 DATA N-1 td th VCCO DATA N DATA N+1 MBG908 50% 0V Fig.4 Timing diagram. 1998 Nov 03 11 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video TDA8761A ndbook, full pagewidth V CCD OE 50 % t dHZ HIGH 90 % output data t dLZ HIGH output data LOW 10 % 50 % t dZL LOW t dZH 50 % TEST V CCD 3.3 k TDA8761A 15 pF OE S1 t dLZ t dZL t dHZ t dZH S1 VCCD VCCD DGND DGND MBG907 fOE = 100 kHz. Fig.5 Timing diagram and test conditions of 3-state output delay time. t STLH handbook, full pagewidth t STHL code 511 VI code 0 2 ns 2 ns 50 % 50 % CLK 50 % 50 % MGC359 0.5 ns 0.5 ns Fig.6 Analog input settling-time diagram. 1998 Nov 03 12 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video TDA8761A 0 handbook, full pagewidth MBG912 amplitude (dB) 20 40 60 80 100 120 0 1.25 2.50 3.76 5.01 6.26 7.51 8.77 f (MHz) 10.0 Effective bits: 8.70; THD = -68.68 dB. Harmonic levels (dB): 2nd = -78.40; 3rd = -72.08; 4th = -75.85 dB; 5th = -76.26; 6th = -80.23. Fig.7 Typical Fast Fourier Transform (fclk = 30 MHz; fi = 4.43 MHz). 0 handbook, full pagewidth MBG911 amplitude (dB) 20 40 60 80 100 120 0 1.87 3.75 5.62 7.50 9.37 11.2 13.1 f (MHz) 15.0 Effective bits: 8.25; THD = -56.72 dB. Harmonic levels (dB): 2nd = -62.21; 3rd = -58.58; 4th = -80.29; 5th = -71.71; 6th = -72.04. Fig.8 Typical Fast Fourier Transform (fclk = 30 MHz; fi = 10 MHz). 1998 Nov 03 13 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video TDA8761A handbook, full pagewidth 1 FCE166 LSB 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 0 100 200 300 400 Code 500 Fig.9 Typical AC INL (fclk = 30 MHz; fi = 10 MHz). handbook, full pagewidth 1 FCE165 LSB 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 0 100 200 300 400 Code 500 Fig.10 Typical AC DNL (fclk = 30 MHz; fi = 10 MHz). 1998 Nov 03 14 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video INTERNAL PIN CONFIGURATIONS TDA8761A handbook, halfpage VCCO handbook, halfpage V CCA D8 to D0 IR VI OGND MGD231 AGND MGC040 - 1 Fig.11 CMOS data and in range outputs. Fig.12 Analog inputs. handbook, halfpage handbook, halfpage V CCO VCCA VRT VRM OE (TC) VRB R LAD OGND MBE557 AGND MGD232 Fig.13 OE (TC) input. Fig.14 VRB, VRM and VRT inputs. 1998 Nov 03 15 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video TDA8761A handbook, halfpage VCCD CLK 1.5 V DGND MBE559 - 1 Fig.15 CLK input. 1998 Nov 03 16 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video APPLICATION INFORMATION TDA8761A handbook, halfpage CLK 1 28 V CCD1 TC VCCA 2 27 DGND1 3 26 IR AGND 4 25 D8 n.c. (1) 5 24 D7 V RB 100 nF AGND VI 100 nF (1) (1) 6 23 D6 D5 V RM 7 22 TDA8761A 8 21 D4 AGND 100 nF V RT 9 20 D3 OE AGND V CCD2 10 19 D2 11 18 D1 DGND2 V CCO 12 17 D0 (2) 13 16 n.c. (2) OGND 14 15 MBG906 n.c. The analog and digital supplies should be separated and decoupled. The external voltage regulator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value. Eventually, the reference ladder voltages can be derived from a well regulated VCCA supply through a resistor bridge and a decoupled capacitor. (1) VRB, VRM and VRT are decoupled to AGND. (2) Pins 15 and 16 may be connected to DGND in order to prevent noise influence. Fig.16 Application diagram. 1998 Nov 03 17 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video PACKAGE OUTLINE SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm TDA8761A SOT341-1 D E A X c y HE vMA Z 28 15 Q A2 pin 1 index A1 (A 3) Lp L 1 e bp 14 wM detail X A 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT341-1 REFERENCES IEC JEDEC MO-150AH EIAJ EUROPEAN PROJECTION A max. 2.0 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 10.4 10.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.1 0.7 8 0o o ISSUE DATE 93-09-08 95-02-04 1998 Nov 03 18 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. TDA8761A If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. 1998 Nov 03 19 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values TDA8761A This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1998 Nov 03 20 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video NOTES TDA8761A 1998 Nov 03 21 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video NOTES TDA8761A 1998 Nov 03 22 Philips Semiconductors Product specification 9-bit analog-to-digital converter for digital video NOTES TDA8761A 1998 Nov 03 23 Philips Semiconductors - a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 Internet: http://www.semiconductors.philips.com For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998 SCA60 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545104/750/03/pp24 Date of release: 1998 Nov 03 Document order number: 9397 750 04668 |
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