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19-1601; Rev 0; 1/00
622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET
________________General Description
The MAX3665 low-power transimpedance preamplifier for 622Mbps SDH/SONET applications consumes only 70mW at VCC = 3.3V. Operating from a single +3.3V or +5.0V supply, it converts a small photodiode current to a measurable differential voltage. A DC cancellation circuit provides a true differential output swing over a wide range of input current levels, thus reducing pulse-width distortion. The differential outputs are back-terminated with 50 per side. The overall transimpedance gain is nominally 8k. For input signal levels beyond approximately 50Ap-p, the amplifier will limit the output swing to 250mV. The MAX3665's low 55nA input noise provides a typical sensitivity of -33.2dBm in 1300nm, 622Mbps receivers. The MAX3665 is designed to be used in conjunction with the MAX3676 clock recovery and data retiming IC with limiting amplifier. Together they form a complete 3.3V or 5.0V 622Mbps SDH/SONET receiver. In die form, the MAX3665 is designed to fit on a header with a PIN diode. It includes a filter connection that provides positive bias for the photodiode through a 1.5k resistor to V CC. The device is available in an 8-pin MAX package.
KIT ATION EVALU ABLE AVAIL
____________________________Features
o +3.3V or +5.0V Single-Supply Operation o 55nARMS Input-Referred Noise o 70mW Power Consumption at VCC = 3.3V o 8k Gain o 450A Peak Input Current o 260ps max Deterministic Jitter o Differential Output Drives 100 Load o 470MHz Bandwidth
MAX3665
_______________Ordering Information
PART MAX3665EUA MAX3665E/D TEMP. RANGE -40C to +85C (see Note) PIN-PACKAGE 8 MAX Dice
Note: Dice are designed to operate over a -40C to +140C junction temperature (Tj) range, but are tested and guaranteed at TA = +25C.
________________________Applications
SDH/SONET Receivers PIN Photodiode Preamplifiers and Receivers Regenerators for SDH/SONET
Pin Configuration appears at end of data sheet.
__________________________________________________Typical Application Circuit
3.3V 0.01F
RFILT 1.5k FILT CFILT
VCC
MAX3665 3.3V
OUT+ IN
50
0.1F CLOCK AND DATA RECOVERY CLK
50 OUT-
0.1F
LIMITING AMP
DATA
MAX3676 GND
________________________________________________________________ Maxim Integrated Products
1
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622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET MAX3665
ABSOLUTE MAXIMUM RATINGS
VCC ........................................................................-0.5V to +6.5V Continuous Current at IN ....................................................5mA Voltage at OUT+, OUT- ...................(VCC - 1.5V) to (VCC + 0.5V) Voltage at FILT ...........................................-0.5V to (VCC + 0.5V) Continuous Power Dissipation (TA = +85C) 8-Pin MAX (derate 4.5mW/C above +85C) ...........295mW Operating Junction Temperature (die) ..............-55C to +150C Processing Temperature (die) .........................................+400C Storage Temperature Range .............................-55C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +3.3V 10% or +5.0V 10%, 100 load between OUT+ and OUT-, TA = -40C to +85C. Typical values are at VCC = +3.3V, TA = +25C, unless otherwise noted.) PARAMETER Input Bias Voltage Gain Nonlinearity Supply Current Small-Signal Transimpedance Output Common-Mode Voltage Differential Output Offset Output Impedance (per side) Maximum Output Voltage Filter Resistor VOUT ZOUT VOUT(MAX) RFILT IIN = 450Ap-p IIN = 300A 48 ICC z21 SYMBOL VIN CONDITIONS IIN = 0 to 300A IIN = 0 to 10Ap-p IIN = 0 Differential output 7 21 8 VCC - 0.15 5 50 260 1.5 52 450 MIN TYP 0.8 MAX 0.95 5 30 UNITS V % mA k V mV mVp-p k
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.3V 10% or +5.0V 10%, 100 load between OUT+ and OUT-, source capacitance = 0.5pF, TA = -40C to +85C. Typical values are at VCC = +3.3V, TA = +25C, unless otherwise noted.) (Notes 1 and 2) PARAMETER Small-Signal Bandwidth Low-Frequency Cutoff Deterministic Jitter RMS Noise Referred to Input Power-Supply Rejection Ratio JD in PSRR f < 1MHz, differential referred to output, VCC = 30mVp-p (Note 3) 36 SYMBOL BW-3dB CONDITIONS Relative to gain at 10MHz -3dB with IIN = 5A 213 - 1 PRBS with 100 CIDs MIN 404 TYP 470 20 100 55 47 40 260 72 MAX UNITS MHz kHz ps nA dB
Note 1: AC characteristics are guaranteed by design. Note 2: Measured with a 3-pole filter at the output. CIN = 0.5pF, IIN = 0, CFILT = 1000pF. Note 3: PSRR = -20log (VOUT / VCC).
2
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622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET
__________________________________________Typical Operating Characteristics
(VCC = +3.3V, includes off-chip filter, see Figure 3b, TA = +25C, unless otherwise noted.)
MAX3665
INPUT-REFERRED NOISE vs. TEMPERATURE
MAX3665 TOC01
SMALL-SIGNAL GAIN vs. FREQUENCY
MAX3665 toc02
PULSE-WIDTH DISTORTION vs. TEMPERATURE (INPUT = 100Ap-p)
45 40 35 PWD (ps) 30 25 20 15 10 5 0 VCC = 3.3V VCC = 5.0V
MAX3665 toc03
100 90
RMS NOISE CURRENT (nA)
79 78 77 76 GAIN (dB) 75 74 73 72 71 70 69
50
CIN = 1.5pF
80 70 60 50 40 30 20 10 0 -40 -20 0 20 40 60 80 CIN = 0.5pF CIN IS SOURCE CAPACITANCE PRESENTED TO DIE. IINCLUDES PACKAGE PARASITIC, PIN DIODE, AND PARASITIC INTERCONNECT CAPACITANCE. CIN = 1pF
100
10k
100k
1M
10M
100M
1G
-40
-20
0
20
40
60
80
100
JUNCTION TEMPERATURE (C)
FREQUENCY (Hz)
AMBIENT TEMPERATURE (C)
INPUT-REFERRED NOISE vs. DC INPUT CURRENT
MAX3665 toc04
SMALL-SIGNAL TRANSIMPEDANCE vs. TEMPERATURE
VCC = 5.0V VCC = 3.3V
MAX3665 toc05
PULSE-WIDTH DISTORTION vs. TEMPERATURE (INPUT = 450Ap-p)
45 40 35 PWD (ps) 30 25 20 15 10 VCC = 3.3V
MAX3665 toc06
250 SOURCE CAPACITANCE = 0.5pF
RMS NOISE CURRNENT (nA)
8100 8000 TRANSIMPEDANCE () 7900 7800 7700 7600 7500
50
200
150
100
50
5 0 -40 -20 0 20 40 60 80 100 -40
VCC = 5.0V
0 0.1 1 100 DC INPUT CURRENT (A) 10 1000
7400 AMBIENT TEMPERATURE (C)
-20
0
20
40
60
80
100
AMBIENT TEMPERATURE (C)
BANDWIDTH vs. TEMPERATURE
VCC = 3.3V or 5.0V 550 BANDWIDTH (MHz) 525 500 475 450 425 400 -40 -20 0 20 40 60 80 100 AMBIENT TEMPERATURE (C)
MAX2665 toc07
DATA-DEPENDENT JITTER vs. INPUT SIGNAL AMPLITUDE
MAX3665-08
OUTPUT COMMON-MODE VOLTAGE (REFERENCED TO VCC) vs. TEMPERATURE
-0.11 COMMON-MODE VOLTAGE (V) -0.12 -0.13 -0.14 -0.15 -0.16 -0.17 -0.18 -0.19 -0.20 VCC = 5.0V VCC = 3.3V
MAX3665 toc09
575
160 140 PEAK-TO-PEAK JITTER (ps) 120 100 80 60 40 20 0 0 VCC = 3.3V VCC = 5.0V
-0.10
50 100 150 200 250 300 350 400 450 PEAK-TO-PEAK AMPLITUDE (A)
-40
-20
0
20
40
60
80
100
AMBIENT TEMPERATURE (C)
_______________________________________________________________________________________
3
622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET MAX3665
_____________________________Typical Operating Characteristics (continued)
(VCC = +3.3V, includes off-chip filter, see Figure 3b, TA = +25C, unless otherwise noted.)
DIFFERENTIAL OUTPUT AMPLITUDE vs. TEMPERATURE (INPUT = 450Ap-p)
MAX3665 toc10
EYE DIAGRAM (INPUT = 10Ap-p)
MAX3665-11
PEAK-TO-PEAK AMPLITUDE (mV)
350
VCC = 5.0V VCC = 3.3V
250
200 INPUT: 213 - 1 PRBS CONTAINS 100 ZEROS -40 -20 0 20 40 60 80 100 200ps/div AMBIENT TEMPERATURE (C) INPUT: 213 - 1 PRBS CONTAINS 100 ZEROS 200ps/div
150
_____________________Pin Description
PIN NAME VCC IN N.C. FILT GND OUT+ FUNCTION +3.3V or +5.0V Supply Voltage
D1 D2
15mV/div
50mV/div
300
VCC 1.5k FILT
1
2 3 4 5, 8 6
Signal Input (from photodiode) No Connection. Not internally connected. On-Chip Resistor for Filtering Photodiode Supply Voltage Ground Noninverting Voltage Output. Current flowing into IN causes VOUT+ to increase. Inverting Voltage Output. Current flowing into IN causes VOUT- to decrease.
VCC IN Q1 PARAPHASE AMP R2 50 RF VCC
VCC
R1 50 OUT+ Q2 VCC R5 OUTQ3
7
OUT-
R7
________________Detailed Description
The MAX3665 is a transimpedance amplifier designed for 622Mbps SDH/SONET applications. It comprises a transimpedance amplifier, a paraphase amplifier with CML differential outputs, and a DC cancellation loop. Figure 1 shows a functional diagram of the MAX3665.
R6
Q5
REFERENCE AMP R4 R3
Transimpedance Amplifier
The signal current at IN flows into the summing node of a high-gain amplifier. Shunt feedback through RF converts this current to a voltage. Diodes D1 and D2 clamp the output voltage for large input currents.
Q4
DC CANCELLATION AMP
MAX3665
GND
Figure 1. Functional Diagram 4 _______________________________________________________________________________________
MAX3665-12
400
EYE DIAGRAM (INPUT = 450Ap-p)
622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET
Paraphase Amplifier
The paraphase amplifier converts single-ended inputs to differential outputs, and introduces a voltage gain. This signal drives a differential pair of transistors, Q2 and Q3, which form the output stage. Resistors R1 and R2 provide back-termination at the output, absorbing reflections between the MAX3665 and its load. The differential outputs are designed to drive a 100 load between OUT+ and OUT-. They can also drive higher output impedances, resulting in increased gain and output voltage swing. 375MHz and 622MHz. Lower bandwidth causes pattern-dependent jitter and a lower signal-to-noise ratio, while higher bandwidth increases thermal noise. The MAX3665 typical bandwidth is 470MHz, making it ideal for 622Mbps applications. The preamplifier's transimpedance must be high enough to ensure that expected input signals generate output levels exceeding the sensitivity of the limiting amplifier (quantizer) in the following stage. The MAX3676 clock recovery and limiting amplifier IC has an input sensitivity of 3.6mVp-p, which means that 3.6mVp-p is the minimum signal amplitude required to produce a fully limited output. Therefore, when used with the MAX3665, which has an 8k transimpedance, the minimum detectable photodetector current is 450nAp-p. It is common to relate peak-to-peak input signals to average optical power. The relationship between optical input power and output current for a photodetector is called the responsivity (), with units amperes per watt (A/W). The photodetector peak-to-peak current is related to the peak-to-peak optical power as follows: Ip-p = (Pp-p)() Based on the assumption that SDH/SONET signals maintain a 50% mark density, the following equations relate peak-to-peak optical power to average optical power and extinction ratio (Figure 2): Average Optical Power = PAVG = (P0 + P1) / 2 Extinction Ratio = re = P1 / P0 Peak-to-Peak Signal Amplitude = Pp-p = P1 - P0
MAX3665
DC Cancellation Loop
The DC cancellation loop removes the DC component of the input signal by using low-frequency feedback. This feature centers the signal within the MAX3665's dynamic range, reducing pulse-width distortion on large input signals. The output of the transimpedance amplifier is sensed through resistors R3 and R4 and then filtered, amplified, and fed back to the base of transistor Q4. The transistor draws the DC component of the input signal away from the transimpedance amplifier's summing node. Connect a 400pF or larger capacitor (CFILT) between FILT and case ground for TO header, die-mounted operation. Increasing CFILT improves PSRR. The DC cancellation loop can sink up to 300A of current at the input. The MAX3665 minimizes pulse-width distortion for data sequences that exhibit a 50% mark density. A mark density other than 50% causes the device to generate pulse-width distortion. DC cancellation current is drawn from the input and adds noise. For low-level signals with little or no DC component, this is not a problem. Preamplifier noise will increase for signals with a significant DC component.
___________Applications Information
The MAX3665 is a low-noise, wide-bandwidth transimpedance amplifier that is ideal for 622Mbps SDH/ SONET receivers. Its features allow easy design into a fiber optic module, in three simple steps.
POWER
P1
Step 1: Selecting a Preamplifier for a 622Mbps Receiver
Fiber optic systems place requirements on the bandwidth, gain, and noise of the transimpedance preamplifier. The MAX3665 optimizes these characteristics for SDH/SONET receiver applications that operate at 622Mbps. In general, the bandwidth of a fiber optic preamplifier should be 0.6 to 1 times the data rate. Therefore, in a 622Mbps system, the bandwidth should be between
PAVG
P0
TIME
Figure 2. Optical Power Definitions 5
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622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET
Therefore, PAVG = Pp-p (1 / 2)[(re + 1) / (re - 1)] Sensitivity is a key specification of the receiver module. The ITU/Bellcore specifications for SDH/SONET receivers require a link sensitivity of -27dBm with a bit error rate (BER) of 10-10. There is an additional 1dB power penalty to accommodate various system losses; therefore, the sensitivity of a 622Mbps receiver must be better than -28dBm. Although several parameters affect sensitivity (such as the quantizer sensitivity and preamplifier gain, as previously discussed), most fiber optic receivers are designed so that noise is the dominant factor. Noise from the highgain transimpedance amplifier, in particular, determines the sensitivity. The noise generated by the MAX3665 can be modeled with a Gaussian distribution. In this case, a BER of 10 -10 corresponds to a peak-to-peak signal amplitude to RMS noise ratio (SNR) of 12.7. The MAX3665's typical input-referred noise, in, (bandwidthlimited to 470MHz) is 55nARMS. Therefore, the minimum input for a BER of 10-10 is (12.7 * 55nA) = 699nAp-p. Rearranging the previous equations in these terms results in the following relationship: Optical Sensitivity (dBm) = 10log[(in / )(SNR)(1/2)(re + 1) / (re - 1)(1000)] At room temperature, with re = 10, SNR = 12.7, in = 55nA, and = 0.9A/W, the MAX3665 sensitivity is -33.2dBm. For worst-case conditions, noise increases to 72nA and sensitivity decreases to -32.1dBm. The MAX3665 provides 5.1dB margin over the SDH/SONET specifications, even at +85C. The MAX3665's overload current (IMAX) is greater than 450Ap-p. The pulse-width distortion and input current are closely related. If the clock recovery circuit can accept more pulse-width distortion, a higher input current might be acceptable. For worst-case responsivity and extinction ratio, = 1A/W and re = , the input overload is: Overload (dBm) = -10log (IMAX)(1 / 2)(1000) For IMAX = 450A, the MAX3665 overload is -6.5dBm.
MAX3665
nents, while the complex filter provides a sharper rolloff. Parasitics on the PC board will affect the filter characteristics. Refer to the MAX3665 EV kit data sheet for a layout example of the filter shown in Figure 3b. Supply voltage noise at the cathode of the photodiode produces a current I = CPHOTO (V/t), which reduces the receiver sensitivity. C PHOTO is the photodiode capacitance. The FILT resistor of the MAX3665, combined with an external capacitor (see Typical Operating Circuit) can be used to reduce this noise. The external capacitor (C FILT ) is placed in parallel with the photodiode. Current generated by supply noise is divided between CFILT and CPHOTO. The input noise current due to supply noise is (assuming the filter capacitor is much larger than the photodiode capacitance): INOISE =
(VNOISE )(CPHOTO ) (RFILT )(CFILT )
a)
SIMPLE, 1-POLE, 530MHz FILTER
MAX3665 50 1.2pF 50 C1 5pF
RL 100
b)
3-POLE, 515MHz FILTER
MAX3665 50 1.2pF 50 4pF
22nH
5pF
RL 100
Step 2: Designing Filters
The MAX3665's noise performance is a strong function of the circuit's bandwidth, which changes over temperature and varies from lot to lot. The receiver sensitivity can be improved by adding filters to limit this bandwidth. Filter designs can range from a one-pole filter using a single capacitor, to more complex filters using inductors. Figure 3 illustrates two examples: the simple filter provides moderate roll-off with minimal compo-
22nH REFER TO THE MAX3665 EV KIT DATA SHEET FOR THE FILTER LAYOUT EXAMPLE.
Figure 3. Filter Design Examples
6
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622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET
If the amount of tolerable noise is known, then the filter capacitor can be easily selected: CFILT =
(VNOISE )(CPHOTO ) (RFILT )(INOISE )
For example, with maximum noise voltage = 100mVp-p, CPHOTO = 0.5pF, RFILT = 1.5k, and INOISE selected to be 6nA (1/10 of MAX3665 input-referred noise): CFILT = 0.1 0.5 10-12 / 1500 6 10-4 = 5.6nF Figure 4 shows the suggested layout for a TO-46 header
( )(
)
(
)(
)
Take great care to reduce input capacitance. With the MAX version of the MAX3665, the package capacitance is about 0.3pF, and the PC board between the MAX3665 input and the photodiode can add parasitic capacitance. Keep the input line short, and remove power and ground planes beneath it. Packaging the MAX3665 into a header with the photodiode provides the best possible performance. It reduces parasitic capacitance to a minimum, resulting in the lowest noise and the best bandwidth.
MAX3665
Wire Bonding
For high current density and reliable operation, the MAX3665 uses gold metallization. Make connections to the die with gold wire only, and use ball-bonding techniques (wedge-bonding is not recommended). Die-pad size is 4 mils square. Die thickness is 12 mils.
Step 3: Designing a Low-Capacitance Input
Noise performance and bandwidth are adversely affected by stray capacitance on the input node. Select a low-capacitance photodiode and use good high-frequency design and layout techniques to minimize capacitance on this pin. The MAX3665 is optimized for 0.5pF of capacitance on the input--approximately the capacitance of a photodetector diode sharing a common header with the MAX3665 in die form. Photodiode capacitance changes significantly with bias voltage. With a +3.3V supply voltage, the reverse voltage on the PIN diode is only 2.5V. If a higher voltage supply is available, apply it to the diode to significantly reduce capacitance.
VCC and Ground
Use good high-frequency design and layout techniques. The use of a multilayer circuit board with separate ground and VCC planes is recommended. Take care to bypass VCC and to connect the GND pin to the ground plane with the shortest possible traces.
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7
622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET MAX3665
VCC FILTER CAP
OUT+
FILT IN VCC
OUT-
GND
GND
OUT+
OUT-
Figure 4. Suggested Layout for TO-46 Header
8
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622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET
___________________Pin Configuration
TOP VIEW
VCC 1 IN 2 N.C. 3 FILT 4 8 GND OUTOUT+ GND
___________________Chip Topography
FILT IN VCC
MAX3665
MAX3665
7 6 5
MAX
GND GND 0.05" (1.27mm)
IN
OUT+ 0.03" (0.76mm)
OUT-
TRANSISTOR COUNT: 443 SUBSTRATE CONNECTED TO GND
_______________________________________________________________________________________
9
622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET MAX3665
________________________________________________________Package Information
8LUMAXD.EPS
10
______________________________________________________________________________________
622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET MAX3665
NOTES
______________________________________________________________________________________
11
622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET MAX3665
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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