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CXA1702AR 4-channel REC/PB Amplifier for 8 mm VCR Description The CXA1702AR is a bipolar IC designed as recording/playback amplifiers for Hi8-compatible VCRs. Features Recording/playback system * Hi8-compatible wideband recording/playback amplifier. * Enables electric variable resistor (EVR) control. 64 pin LQFP (Plastic) * * Recording system * Feedback damping provided in the recording amplifier and its EVR control function facilitate printed circuit board design. * Five-input (Y, chroma, AFM, ATF, PCM) mix amplifier and EVR control function for Y/low-band recording level. * Ramp circuit for the recording amplifier output bias current. Application 8 mm VCR Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = 25C) * Supply voltage VCC 7 * Playback system * Feedback dumping provided in the playback amplifier facilitates printed circuit board design. * Middle-frequency tuner on chip; EVR permits independent adjustment of its center frequency fo, Q and boost amount by EVR. * RF AGC and dropout detection circuit. * Operating temperature Topr -10 to +75 * Storage temperature Tstg -65 to +150 * Allowable power dissipation PD 1010 mW (when mounted on board) Operating Condition Supply voltage V C C VCC +0.5 4.75 -0.25 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. --1-- E93Z32-TE CXA1702AR Block Diagram and Pin Configuration PBDUMP1A XHRFSWP RFSWP PCMOUT GND1A PB1AIN RAMP REC1B REC2B MTQ MTFO 32 REC1AOUT REC1ACNT VCC1CH REC1BCNT REC1BOUT PB1BIN GND1B PBDUMP1B PBDUMP2A GND2A PB2AIN REC2AOUT REC2ACNT VCC2CH REC2BCNT REC2BOUT 31 HEAD 30 15dB 29 28 27 26 VCC 25 24 23 22 21 20 19 18 33 MTOUT 17 REC1A REC2A VCC2 16 15 14 13 DOCDET 12dB MT (-6dB) PCMSW1 1A 1B PCMSW3 (6dB) 1CH 2CH MUTE RP_PB DOP DOCDET RFAGCIN RFAGCTC RFAGCOUT REFV T2 YLEV_MTG T1 LOWLEVEL YIN XDECK CIN GND2 AFMIN 34 40dB REC 1A RAMP GEN PCMSW2 2A 2B 35 REC VIDEOSW1 1A 36 GND 1CH 2CH MUTE V/I 1B 37 RAMP GEN REC 2A 2B VIDEOSW3 (0dB) AGCDET GND RF AGC BUFF 38 V/I REC 1B 40dB 15dB HEAD VIDEOSW2 39 40 41 HEAD 40dB 15dB VPSW1 VIDEO PCM VPSW2 42 43 REC 2A REC RAMP GEN VPSW3 PCM VIDEO PCM 44 V/I 45 46 REC REC 2B V/I VPSW4 1 1 VIDEO PCM 2 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 RECPCM PCMREC RECVTR PCMIN GND2B PBDUMP2B VPPCMIN VPVTRIN PB2BIN --2-- AFREC GND VREG IR1 IR VG2 ATFIN 1 40dB 15dB HEAD 1 LOW GCA 2 3 RAMP GEN 1 YGCA LOW GCA 1 1 4 5 6 VIDEO 7 8 9 10 11 12 CXA1702AR Pin Description Pin No. 1 Symbol AFM IN Pin voltage DC -- AC 125mVp-p input 20p (VCC, VCC2, VCC1CH, VCC2CH=4.75V, Ta=25C) Equivalent circuit Description Input pin for recording AFM signal. Input signal bias should be in the range from 1 V to 3.5 V. Connect to Vcc when the pin is not in use. GND pin Input pin for recording chroma signal. 3 140 2.45V 50k 25 70 1 140 2.45V 50k 2 3 GND2 CIN 0V 2.45V -- 500mVp-p input 4 5 XDECK 2.4V -- (when pin is open) H: 4.3 V or more L: 0.6 V or less input YIN 2.45V 500mVp-p input 20 100k DECK and NORM switching pin H : NORM (4ch) L : DECK (2ch) Open : } 4 140 100k 20 2.9V 1.8V Input pin for recording Y signal. 40 5 140 2.45V 50k 6 LOW LEVEL 1.8V to 4.75V input -- 270 6 140 90 21k 3.15V 90 EVR adjusting pin for low-band recording signal (chroma, AFM, video path ATF, PCM path ATF) level. Increasing the input voltage lowers the signal level. Test pin. Set the pin open. EVR adjusting pin for recording Y signal level and middle tune boost amount. Adjusts the former during recording and the latter during playback. Increasing the input voltage lowers recording Y signal level and boost amount. 7 8 T1 -- YLEV_MTG 1.8V to 4.75V input -- -- 270 -- 270 8 140 23k 14k 90 90 3.2V 100 100 2.8V 1.75V YLEVEL MTG --3-- CXA1702AR Pin No. 9 Symbol T2 Pin voltage DC -- AC -- Equivalent circuit Description Test pin. Connect decoupling capacitance between this pin and GND. EVR adjusting pin to decide the adjustment range of middle tune fo. Input the following: Hi8 : 4.45 V Nor: 3.6 V 3.25V 10 REFV Hi8:4.45V Nor:3.6V input 10 140 270 60k 15k 40 40 11 RFAGC OUT 1.9V 400mVp-p output Output pin for playback Y signal. 40 11 2k 600 410 12 RFAGCTC 2.5V to 4.75V input (during EVR adjustment) -- 140 12 RFAGC time constant pin. 4700p 12 RFAGCTC 470k VCC 50 50 25 25 13 RFAGC IN -- 220mVp-p input 13p 13 140 50k 50 3.25V 14 DOCDET 2.55V (when pin is open) -- 26.5k 14 140 4.15V 42.5k 50 RFAGC gain may be adjusted by EVR. Increasing the input voltage increases gain. Input pin for playback Y signal. Playback Y signal is separated from playback video signal output to Pin 17 (MTOUT), then input to Pin 13 (RFAGCIN). Set input signal bias in the range from 1 V to 3.5 V. Connect to Vcc when this pin is not in use. Pin for deciding dropout detection level. Connect decoupling capacitance between this pin and GND. For adjustment, input voltage proportional to Pin 52 (VREG) output voltage. Increasing the input voltage increases the detection level. --4-- CXA1702AR Pin No. 15 Symbol DOP Pin voltage DC H: 3.15V L: 0V output AC -- Equivalent circuit Description Output pin for dropout detection signal. Goes High at the time of dropout. 15 150 3.15V 2.4k 1.3m 16 RP_PB H: 2.3V or more L: 0.6V or less input -- 35 50k 16 140 5.4k 2.15V Input pin for REC/PB switching signal. H : PB L : REC 17 MTOUT 2.4V 220mVp-p (playback Y signal) output 4k 400 40 Output pin for playback video signal. 17 330 18 Vcc2 19 PCMOUT 4.75V 1.95V -- 220mVp-p output 25 Power supply pin. Output pin for playback PCM signal. 19 3.5k 360 240 20 MTF0 1.8V to 4.75V input -- 270 20 140 30k 11k EVR adjusting pin for middle tune fo. Increasing the input voltage increases fo. 40 40 2.85V 1.7V --5-- CXA1702AR Pin No. Symbol Pin voltage DC AC -- Equivalent circuit Description Input pin for 1/2RFSWP signal. 21 XHRFSWP H: 2.3V or more L: 0.6V or less input 35 21 140 2.15V 22 23 24 25 26 RFSWP H: 2.3V or more L: 0.6V or less input REC2B H: 2.3V or more L: 0.6V or less input REC2A H: 2.3V or more L: 0.6V or less input REC1B H: 2.3V or more L: 0.6V or less input VCC 4.75V -- Same as for Pin 21 Input pin for RFSWP signal. -- Same as for Pin 21 Goes L during recording and turns on 2Bch recording amplifier output bias current. Goes L during recording and turns on 2Ach recording amplifier output bias current. Goes L during recording and turns on 1Bch recording amplifier output bias current. Power supply pin for main blocks excluding recording and head amplifiers. Goes L during recording and turns on 1Ach recording amplifier output bias current. Goes H during after-recording and turns on recording amplifier output bias current. EVR adjusting pin for middle tune Q. Increasing the input voltage increases Q. -- Same as for Pin 21 -- Same as for Pin 21 -- -- 27 REC1A 28 RAMP 29 MTQ H: 2.3V or more L: 0.6V or less input H: 2.3V or more L: 0.6V or less input 1.8V to 4.75V input -- Same as for Pin 21 -- Same as for Pin 21 -- 270 29 140 37.5k 12.5k 40 40 2.9V 1.8V --6-- CXA1702AR Pin No. Symbol Pin voltage DC 2.6V AC -- Equivalent circuit Description Dumping adjusting pin for 1Ach head amplifier. Increasing the external resistance reduces the peaking amount. 30 40 PBDUMP1A 30 PBDUMP1A 120 30 270 130 31 32 GND1A PB1AIN 0V 0.7V -- 200Vp-p input -- 1.2m GND pin for 1Ach recording and head amplifiers. Playback signal 1Ach input pin. 1.5V 32 33 REC1A OUT (19mA output) (21mAp-p output) 33 Recording signal 1Ach output pin. Open collector. 19m 34 REC1A CNT 1.8V to 4.75V input -- 270 34 140 52K 19K 40 3.15V EVR adjusting pin for 1Ach recording amplifier dumping. Increasing the input voltage increases the peaking amount. 40 35 Vcc1CH 4.75V -- -- 36 REC1B CNT REC1B OUT PB1BIN 37 38 1.8V to 4.75V input (19mA output) 0.7V -- Same as for Pin 34. Power supply pin for 1Ach and 1Bch recording and head amplifiers. EVR adjusting pin for 1Bch recording amplifier dumping. Recording signal 1Bch output pin. Open collector. Playback signal 1Bch input pin. (21mAp-p Same as for Pin 33. output) 200Vp-p Same as for Pin 32. input --7-- CXA1702AR Pin No. 39 Symbol GND1B Pin voltage DC 0V AC -- Equivalent circuit -- Description GND pin for 1Bch recording and head amplifiers. Dumping adjusting pin for 1Bch head amplifier. Dumping adjusting pin for 2Ach head amplifier. GND pin for 2Ach recording and head amplifiers. Playback signal 2Ach input pin. 40 PBDUMP1B 2.6V -- Same as for Pin 30. 41 PBDUMP2A 2.6V -- Same as for Pin 30. 42 GND2A 0V -- -- 43 PB2AIN 0.7V 200Vp-p Same as for Pin 32. input (21mAp-p Same as for Pin 33. output) -- Same as for Pin 34. 44 REC2AOUT (19mA output) 45 REC2ACNT 1.8V to 4.75V input 46 VCC2CH 4.75V Recording signal 2Ach output pin. Open collector. EVR adjusting pin for 2Ach recording amplifier dumping. Power supply pin for 2Ach and 2Bch recording and head amplifiers. EVR adjusting pin for 2Bch recording amplifier dumping. Recording signal 2Bch output pin. Open collector. Playback signal 2Bch input pin. -- -- 47 REC2BCNT 1.8V to 4.75V input 48 REC2BOUT (19mA output) 49 PB2BIN 0.7V Same as for Pin 34. (21mAp-p Same as for Pin 33. output) 200Vp-p Same as for Pin 32. input -- -- 50 GND2B 0V GND pin for 2Bch recording and head amplifiers. Dumping adjusting pin for 2Bch head amplifier. 51 PBDUMP2B 2.6V -- Same as for Pin 30. --8-- CXA1702AR Pin No. 52 Symbol VREG Pin voltage DC 4.15V AC -- Equivalent circuit Description Output pin for 4.15 V regulator. Connect decoupling capacitance between this pin and GND. Up to 0.5 mA current can be led outside IC. 52 53 VPPCMIN 2.45V 200mVp-p (recording PCM signal) input 20 53 140 50K 2.45V 40 VPSW input pin for recording PCM path. Input Pin 54 (RECPCM) signal after cutting DC component with external capacitance. 54 RECPCM 2.4V 200mVp-p (recording PCM signal) output 8K 25 Output pin for recording PCM path. Outputs signal obtained by mixing recording PCM signal and recording ATF signal. 54 220 180 55 VPVTRIN 2.45V 200mVp-p Same as for Pin 53. (recording Y signal) input 200mVp-p (recording Y signal) output 56 RECVTR 2.4V 40 56 8K VPSW input pin for recording video path. Input Pin 56 (RECVTR) signal after cutting DC component with external capacitance. Output pin for recording video path. Outputs signal obtained by mixing recording Y signal, recording chroma signal, recording AFM signal and recording ATF signal. 220 300 57 GND 0V -- -- GND pin for main blocks excluding recording and head amplifiers. --9-- CXA1702AR Pin No 58 Symbol IR1 Pin voltage DC 1.95V (when resistor is connected) AC -- Equivalent circuit Description Pin for external reference current source. Connect external resistor 15k between this pin and GND. Be careful not to cause cross talk. 58 15K 130 58 1K 58 IR1 15K IR1 59 IR 1.9V (when resistor is connected) -- 100 59 1K Pin for external reference current source. Connect external resistor 18 k between this pin and GND. Be careful not to cause cross talk. 59 IR 18K 59 60 VG2 2.45V -- 270 60 4K Pin for internal reference voltage source. Connect decoupling capacitance between this pin and GND. Not for outside IC use. 600 61 PCMIN 2.45V 300mVp-p input 61 140 50K 2.45V 70 Input pin for recording PCM signal. 62 PCMREC H: 2.3V or more L: 0.4V or less input -- 35 62 140 2.15V 35K 70K PCM recording switching pin. H: PCM recording also, RFAGC gain is held when Pin 16 (RP_PB):H and Pin 62 (PCMREC): H Input pin for recording ATF signal. After-recording mode switching pin. H: after-recording 63 64 ATFIN 2.45V AFREC H: 2.3V or more L: 0.6V or less input 125mVp-p Same as for Pin 61. input -- Same as for Pin 21. --10-- Electrical Characteristics (VCC, VCC2, VCC1CH, VCC2CH = 4.75 V, Ta = 25 C, See the Electrical Characteristics Measurement Circuit and the Control Logic Truth Table. Start taking measurement after making adjustment described in Notes on Measurement.) Ratings Measurement method Min. Typ. Max. Unit NO Item Symbol Measurement condition Measurement Input condition Control pin or Input pin Level Frequency logic ammeter name -- -- A1 IVCC 45 -- 64 83 1 Recording circuit current IREC mA 2 -- -- J IVCC -- Playback circuit current IPB 44 63 82 mA 3 -- -- T IVCC 52 56 56 56 56 56 56 56 56 A A 100KHz A 56 56 54 Pin 6 (LOWLEVEL)=4.75V Pin 6 (LOWLEVEL)=1.8V Pin 8 (YLEV_MTG)=1.8V 14 MHz level/300 kHz level Pin 8 (YLEV_MTG)=4.75V S A A A A A A A A -- 300KHz 300KHz 14MHz, 300KHz 7MHz 300KHz 300KHz 750KHz 1.7MHz 1.7MHz 100KHz -- 5 5 5 5 3 3 3 1 1 63 63 125mVP-P 125mVP-P 125mVP-P 125mVP-P 500mVP-P 500mVP-P 500mVP-P 500mVP-P 500mVP-P 200mVP-P 500mVP-P -- -- After-recording circuit current IAFREC 68 3.95 -- -4.0 -1.5 -- -- -14.5 96 4.15 -16.3 -1.7 -0.5 -55 -31.9 -12.4 125 4.35 -14.0 -- 0.5 -- -26.5 -- mA V dB dB dB dB dB dB 4 VREG Current consumption inside IC during recording (including recording amplifier output bias current) Current consumption inside IC during playback Current consumption inside IC during after-recording (including recording amplifier output bias current) Pin voltage measurement GYmin --11-- When Pin maximum When Pin maximum When Pin maximum When Pin maximum GYmax VFY DY GLVmin GLVmax VREG pin voltage Recording system 5 Recording Y signal GCA minimum gain Recording Y signal GCA maximum 6 gain Recording Y signal GCA frequency 7 response Recording Y signal GCA secondary 8 distortion Low-band signal GCA (video, chroma 9 path) minimum gain Low-band signal GCA (video, chroma 10 path) maximum gain Recording chroma path secondary 11 distortion DC 6 (LOWLEVEL)=1.8 V gain at 6 (LOWLEVEL)=1.8 V gain at 6 (LOWLEVEL)=1.8 V gain at 6 (LOWLEVEL)=1.8 V gain at -- -14.5 -- -14.5 Pin 6 (LOWLEVEL)=4.75V -- -50 -12.3 -55 -12.3 -31.8 -- -- -- -- -26.5 dB dB dB dB CXA1702AR dB 12 Recording AFM path gain GAFM 13 Recording AFM path secondary distortion DAFM 14 Recording ATF (video path) gain GVATF 15 Low-band signal GCA (PCM, ATF path) minimum gain GLPmin Ratings Measurement method Min. Pin 6 (LOWLEVEL)=1.8V -14.5 -4.5 14 MHz level/300 kHz level -0.7 -- -55 0.1 -3.7 -2.9 0.9 -- -12.6 -- dB dB dB dB Typ. Max. Unit NO Item Symbol Measurement condition Measurement Input condition Control pin or Input pin Level Frequency logic ammeter name 63 125mVp-p 100KHz A 54 54 54 54 IB1A IB2A IB1B IB2B 33 44 37 48 A A A A1 -- -- -- A3 A4 A1 55 200mVp-p 1MHz A3 A4 A2 A2 300mVp-p 300mVp-p 300mVp-p 7MHz 300KHz 14MHz, 300KHz 61 61 61 16 GLPmax GP VFP Low-band signal GCA (PCM, ATF path) maximum gain 17 Recording PCM path gain Recording PCM path frequency 18 response Recording PCM path secondary 19 distortion DP 1A 14.55 IB1A 20 2A Recording amplifier output bias current IB2A 18.8 23.05 mA 1B IB1B 2B IB2B 1A IR1A 2A Recording amplifier 21 output current IR2A 18.1 20.7 23.3 mAp-p 1B IR1B --12-- 55 200mVp-p 10MHz 1MHz A1 A2 A3 A4 2500sec Input 2B IR2B DC current measurement 34 pin (REC1ACNT), 45 pin (REC2ACNT), 36 pin (REC1BCNT), 47 pin (REC2BCNT)=3.55V 34 pin (REC1ACNT), 45 pin (REC2ACNT), 36 pin (REC1BCNT), 47 pin (REC2BCNT)=3.55V Output level (Vp-p)/51() Recording amplifier 22 frequency response VFR1A VFR2A VFR1B VFR2B 10 MHz level/1 MHz level -- -0.5 -- dB H Ramp rising edge 23 inclination 1 See Measurement method. A Ton1 -- L 32 -- A/s Output 24 Ramp falling edge inclination Toff -- Inclination: Ton1 Inclination: Toff 1A 2A 1B 2B 1A 2A 1B 2B 1A 2A 1B 2B 27 24 25 23 27 24 25 23 33 44 37 48 33 44 37 48 33 44 37 48 32 -- A/s CXA1702AR Ratings Measurement method Min. Input L 2500sec H Typ. Max. Unit NO Item Symbol Measurement condition Measurement Input condition Control pin or Input pin Level Frequency logic ammeter name R 33 44 37 48 Inclination: Ton2 Output -- 17 -- A/s S T U 1A 2A 28 See Measurement method. 25 Ramp rising edge inclination 2 Ton2 1B 2B Playback system Head amplifier MTOUT 26 gain 200Vp-p 300KHz Pin 8 (YLEV_MTG)=4.75V 17 58.0 61.5 65.0 dB 27 200Vp-p 300KHz 19 Head amplifier PCMOUT gain 224mVp-p 56mVp-p 896mVp-p 7MHz 7MHz 7MHz 7MHz 7MHz J 11 J 11 1.2Vp-p 50mVp-p 11 11 11 1A 2A 1B 2B 1A 2A 1B 2B 32 43 38 49 32 43 38 49 13 13 13 J K L M M J K L J J J 13 13 57.7 61.2 64.7 dB --13-- 28 RFAGC standard output 29 RFAGC cover range High 30 RFAGC cover range Low GV1A GV2A GV1B GV2B GP1A GP2A GP1B GP2B VAGC1 VAGC2 VAGC3 325 300 -- -- -- 395 365 405 -7.7 20.1 465 -- 475 -- -- mVp-p mVp-p mVp-p dB dB 31 RFAGC minimum gain GAGCmin 32 RFAGC maximum gain GAGCmax Measure output level, applying time constant to Pin 12 (RFAGCTC). Pin 10 (REFV)=4.45V Pin 12 (RFAGCTC)=2.7V, Pin 10 (REFV)=4.45V Pin 12 (RFAGCTC)=4.75V, Pin 10 (REFV)=4.45V CXA1702AR Ratings Measurement method Min. Apply time constant to Pin 12 (RFAGCTC). -15.5 -12.5 -6.5 0.01 3.15 -3.5 0.2 3.4 -9.5 ab NO Typ. -9.5 dB dB V V Max. Unit Item Symbol Measurement condition Measurement Input condition Control pin or Input pin Level Frequency logic ammeter name 33 Dropout detection ON level Input 10KHz 7MHz 224mVp-p KDO-ON 34 Dropout detection OFF level 13 J 15 VDOP-H Output VDOP-L KDO-ON=20log(a/224) KDO-OFF=20log(b/224) KDO-OFF See Measurement method. 0 2.9 35 Dropout pulse Low level VDOP-L 36 Dropout pulse High level Apply time constant to Pin 12 (RFAGCTC). Input 5KHz 7MHz/224mVp-p VDOP-H 37 Dropout ON detection time 13 J 15 50sec Output TDOP-ON TDOP-OFF TDOP-ON See Measurement method. -- 1.1 -- s 38 Dropout OFF detection time TDOP-OFF -- 2.0 -- s --14-- CXA1702AR CXA1702AR Control Logic Truth Table Name of control logic condition Input condition and operation Control logic input condition Operation of each section under respective input condition Recording 33 REC1AOUT 37 REC1BOUT 44 REC2AOUT 48 REC2BOUT Playback 11 RFAGCOUT Operation Mode 21 XHRFSWP PBAmp1A PBAmp1B PBAmp2A PBAmp2B 62 PCMREC 54 RECPCM 19 PCMOUT 56 RECVTR 22 RFSWP 64 AFREC 27 REC1A 25 REC1B 24 REC2A 23 REC2B 16 RP_PB 28 RAMP A A1 A2 A3 A4 B C D E F G H I J K L M N O P Q R S T U V W X Y L L L L L L L L L L L L L H H H H H H H H H H H H H H H H H H H H-------- L --V L H H H------ H H L H------ H L H H------ H H H L ------ -- -- -- -- L L L L -- -- -- -- V V V V P P P P P P P P P P P P P x x x x x x x x P P P P P P P P V V V V V P V V V P V V V x x x x x x x x P V V V P V V V V V V V V V V P V V P V V x x x x x x x x V V P V V P V V V V V V V V P V V V V P V x x x x x x x x V P V V V V P V V V V V V V V V P V V V P x x x x x x x x V V V P V V V P S V S S S P S S S P S S S x x x x x x x x P S S S P S S S S S S V S S S P S S P S S x x x x x x x x S S P S S P S S S S V S S S P S S S S P S x x x x x x x x S P S S S S P S Sx S S S V S S S P S S S P x x x x x x x x S S S P S S S P x x x x x x x x x x x x O O O O O O O O x O O O x O O O x x x x x x x x x x x x x O O O O O O O O x x x x x x x x x x x x x O O O O O O O O x x x x x x x x x x x x x O O O O O O O O x x x x x x x x x x x x x 2A 1B 2B 1A 1B 1A 2B 2A 17 MTOUT x x x x x x x x x x x x x 1A 2A 1B 2B 1A 1B 2A 2B VPSW1 VPSW2 VPSW3 4 XDECK VPSW4 x x x x x x x x x x x x x O O O O O O O O O O O O O O O O DOCDET x x x x x x x x x x x x x O O O O O O O O O O O O O O O O Video REC (power save) Video REC 1A 2A 1B 2B PCM REC 1A 2A 1B 2B 1A 1B 2A 2B 1A 2A 1B 2B LHHH--LH--HHV HHLH--HL--HHV HLHH--L L--HHV HHHL--HH--HHV LHHH-- HLHH-- HHLH-- HHHL-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- H H -- H O,L V H L -- H O,L V L L -- H O,L V L H -- H O,L V HL LL HH LH HL HH LH LL L L L L L L L L H H H H H H H H L L L L L L L L H H H H H H H H H H H H O,L O,L O,L O,L H H H H O,L O,L O,L O,L x x x x x x x x x x x x x x x x REC DECK PCM REC PB PB DECK PB 1A 1B 2A 2B 1A 2A 1B 2B after1A recording 1B 2A 2B HLH HHL HLL HHH HHH HHL HLL HLH O O O Mu Mu O x O Mu Mu x O O Mu Mu O O x Mu Mu O O O Mu Mu x O O Mu Mu O x O Mu Mu O O x Mu Mu PCM afterrecording DECK PCM afterrecording PCM During DECK PCM after-recording 4 XDECK=O...... Inclination of the rising edge of the recording amplifier output bias current 32A/s (typ.) 4 XDECK=L...... Inclination of the rising edge of the recording amplifier output bias current 17A/s (typ.) 1. Description of input conditions H ... Control logic input voltage 2.3 V or more L ... Control logic input voltage 0.6 V or less --... Independent of H and L Only for 4 XDECK H ... Control logic input voltage 4.3 V or more (Vcc = 4.75 V) L ... Control logic input voltage 0.6 V or less (Vcc = 4.75 V) O ... Open Only for 62 PCMREC H ... Control logic input voltage 2.3 V or more L ... Control logic input voltage 0.4 V or less 2. Description of operation mode O ...Operating S... Recording amplifier standby. x ...Not operating Output bias current is not V ...Video signal is output. flowing. P ...PCM signal is output. 1A ...1Ach playback signal is output. 1B...1Bch playback signal is output. 2A ...2Ach playback signal is output. 2B...2Bch playback signal is output. Mu...Playback signal is muted during PCM after-recording and, at the same time, RFAGC gain is held. --15-- CXA1702AR Rising/Falling Edge Inclination of Recording Amplifier Output Bias Current (typ.) (See the Control Logic Truth Table.) Mode Operation Pin 4 (XDECK) Rising-edge inclination Falling-edge inclination REC -- -- 32A/s 32A/s PCM after-recording PCM after-recording DECK PCM after-recording H O L 17A/s 32A/s 17A/s 32A/s 32A/s 32A/s Notes on Measurement Start taking measurement after making the following adjustment: Adjust the voltage input to Pin 8 (YLEV_MTG) so that the output level of Pin 56 (RECVTR) reaches 200 mVp-p under the same control logic condition (A) and input condition as those of measurement No. 5. The voltage adjusted here is called Vylev. The voltage input to Pin 8 (YLEV_MTG) is changed in measurement No. 5, 6, and 26. In the other measurement items, set the voltage back to Pin 8 (YLEV_MTG) = Vylev. --16-- Electrical Characteristics Measurement Circuit Control logic pin REC2A RAMP REC1A REC1B REC2B RFSWP XHRFSWP MTF0 PB1AIN GND GND GND 10 0.1 10 10 0.1 GND MTQ EVR adjusting pin PCMOUT MTOUT 49 GND Signal output pin (measurement point) Signal input pin (signal source impedance 50) * Head amplifier input 16 RP_PB RP_PB 15 DOP DOP 0.01 REC2A REC2B 0.01 10 1 MTQ RAMP 0.022 390 PBDUMP1A REC1A VCC XHRFSWP GND1A REC1B 0.01 5.6 PB1AIN RFSWP MTF0 PCMOUT VCC2 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 REC1AOUT 33 PCMSW3 (6dB) 1CH 2CH MUTE 12dB GND MT (-6dB) 13 51 RFAGCIN 0.01 RFAGCIN GND 470K 10 0.1 RFAGCTC 4700P RFAGCOUT GND DOCDET 12 1CH 2CH MUTE VIDEOSW3 (0dB) GND AGCDET RFAGCOUT RF AGC 10 BUFF REFV REFV 9 0.01 11 GND 0.01 RFAGCTC DOCDET 0.1 14 IB1A A 1B PCMSW2 2A 2B 51 REC1AOUT HEAD 15dB PCMSW1 1A MTOUT (PB1AIN, PB1BIN, PB2AIN, PB2BIN): The input level is specified by a value attenuated to 1/50. * Other inputs: The input level is specified by a value obtained at the signal input pin. REC1ACNT 34 REC1ACNT 40dB REC 1A VIDEOSW1 1A 1B 2A 2B VIDEOSW2 10 GND 35 RAMP GEN 0.1 Vcc1CH REC REC1BCNT IB1B A 37 36 REC1BCNT 51 RAMP GEN REC1BOUT REC1BOUT REC PB1BIN 38 49 5.6 V/I 1 0.01 PB1BIN REC 1B GND GND1B 39 40dB HEAD 15dB 40 GND GND 41 8 GND 42 GND2A VIDEO 6 PCM 5 VIDEO PCM 4 HEAD 40dB PCM T1 7 VPSW1 1 43 0.01 LOWLEVEL 51 GND REC2AOUT VPSW3 44 GND 45 10 1 YGCA VPSW4 PCM 1 LOW GCA 2 VIDEO 1 1 LOW GCA 3 GND 0.1 46 RAMP GEN 1 1 51 CIN 0.01 2 GND GND 47 1 48 51 AFMIN GND IR1 IR 390 0.01 GND2B RECPCM VPVTRIN 0.01 VPPCMIN RECVTR PCMPEC 15k PBDUMP2B 10 18k 0.1 10 5.6 0.01 PB2BIN 51 51 49 1 RECPCM RECVTR GND VPPCMIN VPVTRIN GND GND 51 GND GND GND GND GND PCMIN GND ATFIN PCMPEC GND AFREC PB2BIN CXA1702AR GND 51 4.75V 0.022 0.1 0.01 PCMIN 0.01 ATFIN AFREC IVCC A VREG GND VG2 --17-- T2 0.01 YLEV_MTG VIDEO 0.01 YLEV_MTG VPSW2 LOWLEVEL YIN 0.01 YIN XDECK XDECK CIN GND2 AFMIN 53 54 55 56 57 58 59 60 61 62 63 64 0.022 390 PBDUMP1B GND GND 100 V/I Resistance accuracy 1% 0.022 390 PBDUMP2A 15dB PB2AIN 49 5.6 0.01 PB2AIN REC 2A RAMP GEN IB2A A 51 REC2AOUT REC V/I REC2ACNT REC2ACNT VCC2CH REC 100 V/I REC2BCNT REC 2B REC2BCNT IB2B A 40dB HEAD 15dB REC2BOUT 51 REC2BOUT 49 50 51 52 Application Circuit RP VCC 10 0.1 RP GND 0.1 10 10 0.1 10 0.01 0.01 10 Y/C SEP Y REC 1A REC 1B REC 2A C VCC REC2B GND1A MTQ RAMP REC1A REC1B REC2A RFSWP 390 0.022 PBDUMP1A MTF0 0.01 PB1AIN XHRFSWP 32 31 30 28 27 24 23 20 19 17 29 26 25 22 21 PCMOUT 18 33 VCC2 MTOUT 16 1ACH HEAD REC1AOUT 1B PCMSW2 2A DOP 12dB V/I MT (-6dB) DOCDET RFAGCIN 1CH 2CH MUTE VIDEOSW1 1A GND DOCDET 0.1 2B HEAD 15dB PCMSW1 1A RP_PB REC 2B RF SWP 34 15 40dB 0.01 REC1ACNT PCMSW3 (6dB) 1CH 2CH MUTE 1/2RF SWP CONTROL LOGIC RP PB RAMP PCMREC AFREC 470k 4700P PB PCM PB RF XDECK REC 1A 35 10 0.1 Vcc1CH REC 100 36 0.01 2A 2B VIDEOSW2 RFAGCTC GND V/I RFAGCOUT RF AGC AGCDET REC1BCNT 37 REC1BOUT RAMP GEN REC 38 1BCH HEAD 0.01 PB1BIN REC 1B 39 10 BUFF REFV 0.01 GND1B 11 12 VIDEOSW3 (0dB) 13 1B 14 RAMP GEN 40dB HEAD 15dB PB Y RF PB C RF SIGNAL OUT 40 9 0.022 390 T2 0.01 DOP 41 8 42 7 43 VPSW2 PCM VIDEO 6 2ACH HEAD 44 REC V/I PCM VPSW3 VIDEO 5 4 0.01 1 YGCA VPSW4 PCM 1 2 LOW GCA VIDEO 1 LOW GCA 1 1 1 REC2ACNT 45 46 3 47 0.01 REC 2B 2 1 48 2BCH HEAD IR1 IR VG2 VREG GND PCMIN 0.01 PB2BIN GND2B RECVTR RECPCM VPPCMIN VPVTRIN 15k 18k PCMPEC 10 0.1 10 0.022 390 PBDUMP2B 0.1 0.01 0.01 0.01 0.01 ATFIN AFREC --18-- YLEV_MTG VPSW1 PCM VIDEO T1 0.01 LOWLEVEL 0.01 YIN 0.01 XDECK CIN 0.01 V/I GND2 AFMIN 51 52 54 55 53 56 57 58 59 60 61 62 63 64 PBDUMP1B 0.022 390 PBDUMP2A REF V MTQ MTF0 YLEVEL/MTG LOWLEVEL EVR CONTROL REC DUMP 1A REC DUMP 1B REC DUMP 2A REC DUMP 2B GND2A HEAD 40dB 15dB 0.01 PB2AIN REC 2A RAMP GEN REC2AOUT 10 RAMP GEN 0.1 VCC2CH REC 100 REC2BCNT HEAD 40dB REC Y RF REC C RF REC AFM REC ATF REC PCM 15dB REC2BOUT SIGNAL IN 49 50 Resistance accuracy 1% CXA1702AR Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party and other right due to same. CXA1702AR Description of Operation --19-- CXA1702AR Gain --20-- CXA1702AR Notes on Operation 1. This IC is characterized by high-voltage gain (about 61 dB in the playback system). Be careful of the following when using the IC: 1) Use reinforced power supply and ground lines. Decouple the power supply pin with a coil and a capacitor. Connect the decoupling capacitor as close to the pin as possible. 2) Use of a regulator power supply is recommended. 3) Connecting a capacitive load to the output may cause oscillation. 4) Take particular care not to make capacitive coupling between the head amplifier input and the playback output. Also be careful not to make capacitive coupling between the recording input and the recording amplifier output. 5) Use of decoupling capacitors is recommended between the following DC voltage input pins and GND. When the control voltage source is at high impedance, aggravation of cross talk or oscillation is feared to occur. Pin 6 (LOWLEVEL), Pin 8 (YLEV_MTG), Pin 10 (REFV), Pin 12 (RFAGCTC) [not when time constant is connected], Pin 14 (DOCDET), Pin 20 (MTF0), Pin 29 (MTQ), Pin 34 (REC1ACNT), Pin 36 (REC1BCNT), Pin 45 (REC2ACT), Pin 47 (REC2BCNT) 6) When a decoupling capacitor is necessary for other pins (not power supply pin), it is recommended to connect each decoupling capacitor as close to the pin as possible. 2. The voltage input to the EVR adjusting pin should be proportional to the supply voltage Vcc. Control the input voltage in the range from 1.8 V to 4.75 V when Vcc = 4.75 V. For EVR adjustment at Pin 12 (RFAGCTC), control the input voltage in the range from 2.5 V to 4.75 V. 3. During normal playback, Pin 16 (RP_PB) is set H, and Pin 64 (AFREC) is set L. At this time, be careful that taking the signal H at Pin 62 (PCMREC) holds RFAGC gain. --21-- CXA1702AR Y signal GCA gain control 0 -10 Low-band signal GCA (video, chroma path) gain control Pin 5 (YIN) inputPin 56 (RECVTR) output gain (dB) -5 Pin 3 (CIN) inputPin 56 (RECVTR) output gain (dB) -15 -10 -20 -15 -25 -20 2 3 4 5 Pin 8 (YLEV_MTG) voltage (V) (VCC = 4.75V) -30 2 3 4 5 Pin 6 (LOWLEVEL) voltage (V) (VCC = 4.75V, Pin 8 YLEV_ MTG = Vylev) Low-band signal GCA (PCM, ATF path) gain control -10 Pin 63 (ATFIN) inputPin 54 (RECPCM) output gain (dB) -15 -20 -25 -30 2 3 4 (VCC = 4.75V) 5 Pin 6 (LOWLEVEL) voltage (V) --22-- CXA1702AR Middle tune f0 control 20 7 6 5 15 4 Pin 10 (REFV) voltage=4.45V 3.60V 10 Middle tune Q control f0 -Center frequency (MHz) Q 3 2 1 0 2 5 3 4 Pin 29 (MTQ) voltage (V) 5 (VCC = 4.75V) 0 2 3 4 5 (VCC = 4.75V) Pin 20 (MTF0) voltage (V) Middle tune boost amount control 20 15 10 5 0 2 3 4 5 (VCC = 4.75V) Pin 8 (YLEV_MTG) voltage (V) Boost amount (dB) --23-- CXA1702AR Package Outline Unit : mm 64PIN LQFP (PLASTIC) 12.0 0.2 48 49 10.0 0.1 33 32 A 64 1 0.5 0.08 16 + 0.2 1.5 - 0.1 17 (0.22) + 0.08 0.18 - 0.03 + 0.05 0.127 - 0.02 0.1 0.1 0.1 0 to 10 0.5 0.2 NOTE: Dimension "" does not include mold protrusion. DETAIL A PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE LQFP-64P-L01 QFP064-P-1010-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY / PHENOL RESIN SOLDER PLATING 42 ALLOY 0.3g --24-- 0.5 0.2 (11.0) |
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