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| PRELIMINARY INFORMATION MK74CB218 Dual 1 to 8 BuffaloTM Clock Driver Features * Tiny 28 pin SSOP (150 mil) package * Dual one input to eight output clock drivers * Outputs are skew matched to within 250 ps * A outputs and B outputs matched to 250 ps * 2.5 V, 3.3 V or 5 V supply voltages * Output Enable tri-states each bank of eight * Clock speeds up to 200 MHz Description The MK74CB218 BuffaloTM is a monolithic CMOS high speed clock driver. It consists of two identical single input to eight low-skew output, non-inverting clock drivers. This eliminates concerns of part to part matching in many systems. The MK74CB218 is packaged in the tiny 28 pin SSOP, which uses the same board space as the narrow 16 pin SOIC. The inputs can be connected together for a 1 to 16 fanout buffer. A quad 1 to 4, and PECL versions, are also available. Consult ICS for more details. The MK74CB218 can also act as a voltage translator, since it is possible to run the inputs at 3.3 V and the outputs at 2.5 V. Family of ICS Parts The MK74CB218 BuffaloTM is designed to be used with ICS's clock synthesizer devices. The inputs of the Buffalo are matched to the outputs of ICS clock synthesizers. Consult ICS for applications support. Block Diagram INA QA0 QA1 QA2 QA3 QA4 QA5 QA6 QA7 VDDA VDD VDDB INB QB0 QB1 QB2 QB3 QB4 QB5 QB6 QB7 GND OE (all outputs) 1 Revision 021600 Printed 11/16/00 IntegratedCircuit Systems, Inc. * 525 Race Street * San Jose *CA *95126*(408) 295-9800tel * www.icst.com MDS 74CB218 A PRELIMINARY INFORMATION MK74CB218 Dual 1 to 8 BuffaloTM Clock Driver Pin Assignment INA QA0 QA1 QA2 VDDA VDDA QA3 QA4 GND GND QA5 QA6 QA7 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 INB 27 QB0 26 QB1 25 QB2 24 VDDB 23 VDDB 22 QB3 21 QB4 20 GND 19 GND 18 QB5 17 QB6 16 QB7 15 VDD Suggested Layout A 0.01F G B 0.01F G 0.01F G V For simplicity, series terminating resistors are not shown for the outputs, but should be placed as close to the device as possible. It is most critical to have the 0.01F decoupling capacitors closest. A = connect to VDDA V = connect to VDD B = connect to VDDB G = connect to low inductance ground plane Pin Descriptions Number 1 2, 3, 4 5, 6 7, 8 9, 10 11, 12, 13 14 15 16, 17, 18 19, 20 21, 22 23, 24 25, 26, 27 28 Name INA QA0, QA1, QA2 VDDA QA3, QA4 GND QA5, QA6, QA7 OE VDD QB7, QB6, QB5 GND QB4, QB3 VDDB QB2, QB1, QB0 INB Type I O P O P O I P O P O P O I Description Clock input for eight A outputs. Clock A outputs. Power supply for QA outputs. Connect to a voltage from 2.5V to 5V. Cannot exceed VDD. Clock A outputs. Connect to ground. Clock A outputs. Output Enable. Tri-states all clock outputs when this input is low. Internal pull-up to VDD. Power supply for inputs. Clock B outputs. Connect to ground. Clock B outputs. Power supply for QB outputs. Connect to a voltage from 2.5V to 5V. Cannot exceed VDD. Clock B outputs. Clock input for eight B outputs. Type: I = Input, O = output, P = power supply connection 2 Revision 021600 Printed 11/16/00 IntegratedCircuit Systems, Inc. * 525 Race Street * San Jose *CA *95126*(408) 295-9800tel * www.icst.com MDS 74CB218 A PRELIMINARY INFORMATION MK74CB218 Dual 1 to 8 BuffaloTM Clock Driver Minimum Typical Maximum 7 VDD+0.5 VDD+0.5 70 260 150 3.3 VDD/2 VDD/2 5.5 VDD 1.0 0.8 Units V V V C C C V V V V V V V V V V V mA mA k pF MHz ns ns ns ps ps ns ns Electrical Specifications Parameter Supply Voltage, VDD Inputs Clock Outputs Ambient Operating Temperature Soldering Temperature Storage Temperature Operating Voltage, VDD Operating Voltage, VDDA or VDDB Input High Voltage, VIH (INA, INB pins) Input Low Voltage, VIL (INA, INB pins) Input High Voltage, VIH (OE pin) Input Low Voltage, VIL (OE pin) Output High Voltage, 3.3V and 5V Output High Voltage, 3.3V and 5V Output Low Voltage, 3.3V and 5V Output High Voltage, 2.5V Output Low Voltage, 2.5V Operating Supply Current, IDD, at 100 MHz Output Impedance Conditions Referenced to GND Referenced to GND Referenced to GND Max of 20 seconds ABSOLUTE MAXIMUM RATINGS (Note 1) 0.5 0.5 0 -65 3.0 2.375 VDD-1.0 2.0 IOH=-12mA IOH=-25mA IOL=25mA IOH=-16mA IOL=16mA No Load Each output OE VDD-0.4 2.4 0.8 2 0.5 55 14 100 250 7 0 1.4 0.8 to 2.0V 2.0 to 0.8V At VDD/2. Note 2 At VDD/2. Note 3 200 3 2 2 250 250 20 20 DC CHARACTERISTICS (VDD = 3.3 V unless noted) Short Circuit Current On-Chip Pull-up Resistor Input Capacitance Input Clock Frequency Propagation Delay with load=15pF Output Clock Rise Time Output Clock Fall Time Output Clock Rising Edge Skew Output Clock A to B Skew Output Enable Time, OE high to output on Output Disable Time, OE low to tri-state AC CHARACTERISTICS (VDD = 3.3 V unless noted) Note 4 100 100 Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability. 2. Between any two A outputs, or any two B outputs, with equal loading. 3. Between any clock A output and any clock B output with INA connected to INB, and equal loading. 4. See discussion and graph of speed versus load. 3 Revision 021600 Printed 11/16/00 IntegratedCircuit Systems, Inc. * 525 Race Street * San Jose *CA *95126*(408) 295-9800tel * www.icst.com MDS 74CB218 A PRELIMINARY INFORMATION MK74CB218 Dual 1 to 8 BuffaloTM Clock Driver Maximum Speed The maximum speed at which the chip can operate is limited by power dissipation in the package. Graph 1 shows the operating frequency plotted against load capacitance per pin for a die temperature of 125C. This is at VDD = VDDA = VDDB = 3.3 V, 70C and with 33 series termination resistors. The termination resistors are essential because they allow a large proportion of the total power to be dissipated outside the package. Reducing or eliminating the series termination will cause an increase in die temperature. It is not recommended to operate the chip at die temperatures greater than 125C. Also note that the load capacitance per pin must include PC board parasitics such as trace capacitance. If not all outputs of the chip are used, it is possible to operate the chip faster with larger loads. Consult ICS for your specific requirement. 300 250 200 150 100 50 0 0 20 40 60 80 Do not operate in this area . Load Capacitance/per pin (pF) Graph 1 MK74CB218 Maximum Speed with all VDDs at 3.3V 4 Revision 021600 Printed 11/16/00 IntegratedCircuit Systems, Inc. * 525 Race Street * San Jose *CA *95126*(408) 295-9800tel * www.icst.com MDS 74CB218 A PRELIMINARY INFORMATION MK74CB218 Dual 1 to 8 BuffaloTM Clock Driver Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC Publication No. 95.) 28 pin SSOP Symbol A A1 b c D e E E1 L Inches Min Max 0.053 0.069 0.004 0.010 0.008 0.012 0.007 0.010 0.337 0.344 .025 BSC 0.228 0.244 0.150 0.157 0.016 0.050 Millimeters Min Max 1.35 1.75 0.10 0.25 0.20 0.30 0.18 0.25 8.55 8.75 0.635 BSC 5.80 6.20 3.80 4.00 0.40 1.27 E1 E INDEX AREA 1 2 D A1 e b c A L Ordering Information Part/Order Number MK74CB218R MK74CB218RTR Marking MK74CB218R MK74CB218R Package 28 pin SSOP Add Tape & Reel Temperature 0-70 C 0-70 C While the information presented herein has been checked for both accuracy and reliability, ICS Incorporated assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. Buffalo is a trademark of ICS Incorporated 5 Revision 021600 Printed 11/16/00 IntegratedCircuit Systems, Inc. * 525 Race Street * San Jose *CA *95126*(408) 295-9800tel * www.icst.com MDS 74CB218 A |
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