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 STD60NF3LL
N-CHANNEL 30V - 0.0075 - 60A DPAK STripFETTM II POWER MOSFET
TYPE STD60NF3LL
s s s s s
VDSS 30V
RDS(on) <0.0095
ID 60A
TYPICAL RDS(on) = 0.0075 OPTIMAL RDS(ON) x Qg TRADE-OFF @ 4.5V CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED ADD SUFFIX "T4" FOR ORDERING IN TAPE & REEL
3 1
DPAK TO-252
DESCRIPTION This application specific Power Mosfet is the third genaration of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows the best trade-off between onresistance ang gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY DC/DC CONVERTERS ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM (l) PTOT EAS (1) Tstg Tj April 2002 Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Single Pulse Avalanche Energy Storage Temperature Operating Junction Temperature Value 30 30 16 60 43 240 100 0.67 700 - 55 to 175
(1) Starting T j=25C, ID=30A, VDD=27.5V
Unit V V V A A A W W/C mJ C
(q) Pulse width limited by safe operating area
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STD60NF3LL
THERMAL DATA
Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 1.5 100 300 C/W C/W C
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 16V Min. 30 1 10 100 Typ. Max. Unit V A A nA
ON (1)
Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250A VGS = 10 V, ID = 30 A VGS = 4.5 V , ID = 30 A Min. 1 0.0075 0.0085 0.0095 0.0105 Typ. Max. Unit V
DYNAMIC
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS =15 V, ID =30 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 30 2210 635 138 Max. Unit S pF pF pF
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STD60NF3LL
ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 15V, ID = 30A RG = 4.7 VGS = 4.5V (see test circuit, Figure 3) VDD = 24V, ID = 60A, VGS = 4.5V Min. Typ. 22 130 30 9 12.5 40 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf td(off) tf tc Parameter Turn-off-Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 15V, ID = 30A, RG = 4.7, VGS = 4.5V (see test circuit, Figure 3) Vclamp =24V, ID =30A RG = 4.7, VGS = 4.5V (see test circuit, Figure 5) Min. Typ. 36.5 36.5 32 23 40 Max. Unit ns ns ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 60A, VGS = 0 ISD = 60A, di/dt = 100A/s, VDD = 15V, Tj = 150C (see test circuit, Figure 5) 65 105 3.4 Test Conditions Min. Typ. Max. 60 240 1.2 Unit A A V ns nC A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedence
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STD60NF3LL
Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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STD60NF3LL
Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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STD60NF3LL
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STD60NF3LL
TO-252 (DPAK) MECHANICAL DATA
mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 V2 0.60 0o 2.20 0.90 0.03 0.64 5.20 0.45 0.48 6.00 6.40 4.40 9.35 0.8 1.00 8o 0.024 0o TYP. MAX. 2.40 1.10 0.23 0.90 5.40 0.60 0.60 6.20 6.60 4.60 10.10 MIN. 0.087 0.035 0.001 0.025 0.204 0.018 0.019 0.236 0.252 0.173 0.368 0.031 0.039 0o inch TYP. MAX. 0.094 0.043 0.009 0.035 0.213 0.024 0.024 0.244 0.260 0.181 0.398
DIM.
P032P_B
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STD60NF3LL
DPAK FOOTPRINT
TUBE SHIPMENT (no suffix)*
All dimensions are in millimeters
All dimensions are in millimeters
TAPE AND REEL SHIPMENT (suffix "T4")*
REEL MECHANICAL DATA
DIM. A B C D G N T 1.5 12.8 20.2 16.4 50 22.4 18.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0.795 0.645 0.724 1.968 0.881 BULK QTY 2500 inch MIN. MAX. 12.992
TAPE MECHANICAL DATA
DIM. A0 B0 B1 D D1 E F K0 P0 P1 P2 R
W
BASE QTY 2500
mm MIN. 6.8 10.4 1.5 1.5 1.65 7.4 2.55 3.9 7.9 1.9 40
15.7 16.3
inch MIN. MAX. 7 0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0.153 0.161 0.311 0.319 0.075 0.082 1.574 0.618
0.641
MAX. 10.6 12.1 1.6 1.85 7.6 2.75 4.1 8.1 2.1
* on sales type
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STD60NF3LL
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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