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(R) VN800S(8961) / VN800PT(8961) HIGH SIDE DRIVER TYPE VN800S(8961) VN800PT(8961) s s RDS(on) 135 m IOUT 1.2 A VCC 36 V CMOS COMPATIBLE INPUT THERMAL SHUTDOWN s CURRENT LIMITATION s SHORTED LOAD PROTECTION s UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN s PROTECTION AGAINST LOSS OF GROUND s VERY LOW STAND-BY CURRENT s REVERSE BATTERY PROTECTION (*) DESCRIPTION The VN800S(8961), VN800PT(8961) are monolithic devices made by using STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient BLOCK DIAGRAM SO-8 PPAK ORDER CODES PACKAGE SO-8 PPAK TUBE T&R VN800S(8961) VN800S(8961)TR VN800PT(8961) VN800PT(8961)TR compatibility table). Active current combined with thermal shutdown and restart protect the device against Device automatically turns off in case pin disconnection. limitation automatic overload. of ground VCC VCC CLAMP OVERVOLTAGE DETECTION UNDERVOLTAGE DETECTION GND Power CLAMP DRIVER INPUT LOGIC CURRENT LIMITER OUTPUT STATUS OVERTEMPERATURE DETECTION (*) See note at page 8 July 2002 1/22 VN800S(8961) / VN800PT(8961) ABSOLUTE MAXIMUM RATING Symbol VCC - VCC - IGND IOUT - IOUT IIN VIN VSTAT Parameter DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current Input Voltage Range DC Status Voltage Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF) - INPUT VESD - STATUS - OUTPUT - VCC Maximum Switching Energy (L=77.5mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=1.5A) Maximum Switching Energy (L=125mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=1.5A) Power Dissipation TC=25C Junction Operating Temperature Case Operating Temperature Storage Temperature Max Inductive Load (VCC=30V; RLOAD=48; Tamb=100C; Rthcase>ambient25C/W) Value SO-8 PPAK 41 - 0.3 - 200 Internally Limited -6 +/- 10 -3/+VCC + VCC 4000 4000 5000 5000 121 195 4.2 41.7 Internally Limited - 40 to 150 - 55 to 150 2 Unit V V mA A A mA V V V V V V mJ mJ W C C C H EMAX EMAX Ptot Tj Tc Tstg Lmax CONNECTION DIAGRAM (TOP VIEW) VCC VCC OUTPUT OUTPUT VCC 8 1 5 4 N.C. STATUS INPUT GND 5 4 3 2 1 OUTPUT STATUS INPUT GND SO-8 PPAK CURRENT AND VOLTAGE CONVENTIONS IS IIN INPUT ISTAT STATUS VCC IOUT OUTPUT GND VCC VIN VSTAT IGND VOUT 2/22 VN800S(8961) / VN800PT(8961) THERMAL DATA Symbol Rthj-case Rthj-lead Rthj-amb Parameter Thermal Resistance Junction-case Thermal Resistance Junction-lead Thermal Resistance Junction-ambient Value SO-8 30 93 (*) PPAK 3 78 (**) Unit C/W C/W C/W Max Max Max (*) When mounted on FR4 printed circuit board with 0.5 cm2 of copper area (at least 35 thick) connected to all VCC pins. (**) When mounted on FR4 printed circuit board with 0.5 cm2 of copper area (at least 35 thick). ELECTRICAL CHARACTERISTICS (8V IOUT =0.5A; Tj=25C IOUT=0.5A Off State; VCC=24V; Tcase=25C On State; VCC=24V On State; VCC=24V; Tcase=100C VCC=VSTAT=VIN=VGND=24V VOUT=0V VIN=VOUT=0V VIN=VOUT=0V; Vcc=13V; Tj =125C VIN=VOUT=0V; Vcc=13V; Tj =25C IS Supply Current ILGND IL(off1) IL(off2) IL(off3) Output Current at turn-off Off State Output Current Off State Output Current Off State Output Current SWITCHING (VCC=24V) Symbol td(on) td(off) dVOUT/ dt(on) dVOUT/ dt(off) Parameter Turn-on Delay Time Turn-off Delay Time Turn-on Voltage Slope Test Conditions RL=48 from VIN rising edge to VOUT=2.4V RL=48 from VIN falling edge to VOUT=21.6V RL=48 from VOUT=2.4V to VOUT=19.2V RL=48 from VOUT=21.6V to VOUT=2.4V Min Typ 10 40 See relative diagram See relative diagram Max Unit s s V/s Turn-off Voltage Slope V/s INPUT PIN Symbol VINL IINL VINH IINH VI(hyst) IIN Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Current Test Conditions VIN=1.25V VIN=3.25V 0.5 VIN=VCC=36V 200 Min 1 3.25 10 Typ Max 1.25 Unit V A V A V A 3/22 1 VN800S(8961) / VN800PT(8961) ELECTRICAL CHARACTERISTICS (continued) STATUS PIN Symbol VSTAT ILSTAT CSTAT Parameter Test Conditions Status Low Output Voltage ISTAT=1.6 mA Status Leakage Current Normal Operation; VSTAT=VCC=36 V Status Pin Input Normal Operation; VSTAT= 5V Capacitance Min Typ Max 0.5 10 30 Unit V A pF PROTECTIONS Symbol TTSD TR Thyst TSDL Ilim Vdemag Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status Delay in Overload Condition DC Short Circuit Current Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 15 20 1.2 2 Max 200 Unit C C C s A V Tj>Tjsh VCC=16V; RLOAD=10m IOUT=0.5 A; L=6mH VCC-47 VCC-52 VCC-57 OVERTEMP STATUS TIMING VIN Tj>Tjsh VSTAT tSDL tSDL 4/22 2 VN800S(8961) / VN800PT(8961) Switching time Waveforms VOUT 80% dVOUT/dt(on) tr 10% 90% dVOUT/dt(off) tf t VIN td(on) td(off) t TRUTH TABLE CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage INPUT L H L H H L H L H L H OUTPUT L H L X X L L L L L L STATUS H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H 5/22 VN800S(8961) / VN800PT(8961) Figure 1: Peak Short Circuit Current Test Circuit +VCC 10k VCC STATUS CONTROL UNIT GND INPUT RIN OUTPUT RL=10m GND Figure 2: Avalanche Energy Test Circuit +VCC 10k VCC STATUS CONTROL UNIT GND INPUT RIN OUTPUT LOAD GND 6/22 VN800S(8961) / VN800PT(8961) ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I C C C C C C I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C E C C C C C E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2 IV C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. 7/22 VN800S(8961) / VN800PT(8961) APPLICATION SCHEMATIC VCC 5V V olt. Reg Control & Diagnostic I/O VCC 24VDC Rprot ST TUS A D id Rprot B US AS IC INPUT OU TPUT LO D A R GND L DG ND ND V ND RG G GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (IS(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. LOAD DUMP PROTECTION Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. C I/Os PROTECTION: If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot ) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k. 8/22 VN800S(8961) / VN800PT(8961) Figure 3: Waveforms NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VUSD INPUT LOAD VOLTAGE STATUS undefined VCC OVERVOLTAGE VCC Tj INPUT LOAD CURRENT STATUS TTSD TR OVERTEMPERATURE 9/22 VN800S(8961) / VN800PT(8961) Off State Output Current IL(off1) (A) 2.5 2.25 2 1.75 1.5 1.25 1 0.75 2 0.5 0.25 0 -50 -25 0 25 50 75 100 125 150 175 1 0 -50 -25 0 25 50 75 100 125 150 175 High Level Input Current Iih (A) 8 7 Off state Vcc=36V Vin=Vout=0V Vin=3.25V 6 5 4 3 Tc (C) Tc (C) Status Leakage Current Ilstat (A) 0.1 0.09 ILIM Vs Tcase Ilim (A) 2.5 2.25 Vstat=Vcc=36V 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 -50 -25 0 25 50 75 100 125 150 175 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 -50 -25 Vcc=24V Rl=10mOhm 0 25 50 75 100 125 150 175 Tc (C) Tc (C) On State Resistance Vs Tcase Ron (mOhm) 400 350 300 250 200 150 100 50 0 -50 -25 0 25 50 75 100 125 150 175 On State Resistance Vs VCC Ron (mOhm) 400 350 Iout=0.5A Vcc=8V; 13V; 36V Iout=0.5A 300 250 Tc= 150C 200 150 Tc= 25C 100 50 0 5 10 15 20 25 30 35 40 Tc= - 40C Tc (C) Vcc (V) 10/22 VN800S(8961) / VN800PT(8961) Input High Level Vih (V) 3.6 3.4 3.2 3 2.8 2.6 2.4 2.2 2 -50 -25 0 25 50 75 100 125 150 175 Input Low Level Vil (V) 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Input Hysteresis Voltage Vhyst (V) 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -50 -25 0 25 50 75 100 125 150 175 Overvoltage Shutdown Vov (V) 50 48 46 44 42 40 38 36 34 32 30 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Turn-on Voltage Slope dVout/dt(on) (V/ms) 1600 Turn-off Voltage Slope dVout/dt(off) (V/ms) 800 700 1 1400 1200 1000 800 600 400 200 0 -50 -25 0 25 50 75 100 125 150 175 Vcc=24V Rl=48Ohm 600 500 400 300 200 100 0 -50 Vcc=24V Rl=48Ohm -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) 11/22 VN800S(8961) / VN800PT(8961) PPAK Maximum turn off current versus load inductance ILMAX (A) 10 A B 1 C 0.1 1 10 L(mH) A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with RL=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization 100 1000 t 12/22 VN800S(8961) / VN800PT(8961) SO-8 Maximum turn off current versus load inductance ILMAX (A) 10 1 A B C 0.1 1 10 L(mH) A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with RL=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization 100 1000 t 13/22 VN800S(8961) / VN800PT(8961) SO-8 THERMAL DATA SO-8 PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.14cm2, 2cm2). Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb (C/W) SO8 at 2 pins connected to TAB 110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 2 2.5 PCB Cu heatsink area (cm^2) 14/22 VN800S(8961) / VN800PT(8961) PPAK THERMAL DATA PPAK PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.44cm2, 8cm2). Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb (C/W) 90 80 70 60 50 40 30 20 10 0 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) 15/22 VN800S(8961) / VN800PT(8961) PPAK Thermal Impedance Junction Ambient Single Pulse ZTH (C/W) 1000 100 0.44 cm2 6 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000 Thermal fitting model of a single channel HSD in PPAK Pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T 0.44 0.04 0.25 0.3 2 15 61 0.0008 0.007 0.02 0.3 0.45 0.8 6 Thermal Parameter Area/island (cm2) R1 (C/W) R2 (C/W) R3 ( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd 24 T_amb 5 16/22 VN800S(8961) / VN800PT(8961) SO-8 Thermal Impedance Junction Ambient Single Pulse ZT H (C/W) 1000 100 0.5 cm2 2 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 T ime (s) 10 100 1000 Thermal fitting model of a single channel HSD in SO-8 Pulse calculation formula Z TH = RTH + Z THtp ( 1 - ) where = tp T 0.14 0.24 1.2 4.5 21 16 58 0.00015 0.0005 7.50E-03 0.045 0.35 1.05 2 Thermal Parameter Area/island (cm2) R1 (C/W) R2 (C/W) R3 ( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C) Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd 28 T_amb 2 17/22 VN800S(8961) / VN800PT(8961) SO-8 MECHANICAL DATA mm. MIN. 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4 1.27 0.6 8 (max.) 0.8 1.2 0.031 0.047 0.14 0.015 TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5 6.2 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 DIM. A a1 a2 a3 b b1 C c1 D E e e3 F L M S L1 18/22 VN800S(8961) / VN800PT(8961) PPAK MECHANICAL DATA DIM. A A1 A2 B B2 C C2 D1 D E E1 e G G1 H L2 L4 R V2 Package Weight 0 Gr. 0.3 0.60 0.2 8 4.90 2.38 9.35 0.8 6.00 6.40 4.7 1.27 5.25 2.70 10.10 1.00 1.00 MIN. 2.20 0.90 0.03 0.40 5.20 0.45 0.48 5.1 6.20 6.60 TYP MAX. 2.40 1.10 0.23 0.60 5.40 0.60 0.60 P032T1 19/22 VN800S(8961) / VN800PT(8961) SO-8 TUBE SHIPMENT (no suffix) B C A Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm. 100 2000 532 3.2 6 0.6 TAPE AND REEL SHIPMENT (suffix "13TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 End All dimensions are in mm. Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components 20/22 VN800S(8961) / VN800PT(8961) PPAK TUBE SHIPMENT (no suffix) A C B Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) All dimensions are in mm. 75 3000 532 6 21.3 0.6 TAPE AND REEL SHIPMENT (suffix "13TR") REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 16.4 60 22.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 8 1.5 1.5 7.5 6.5 2 End All dimensions are in mm. Start Top cover tape No components 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min Components No components 21/22 1 VN800S(8961) / VN800PT(8961) Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in ITALY- All Rights Reserved. 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