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19-1327; Rev 1; 2/98
KIT ATION EVALU ABLE AVAIL
DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch
General Description ____________________________Features
o Internal 500mA, 28V N-Channel Switch (no external FET required) o Adjustable Output Voltage to +27.5V or -27.5V o 6-Bit DAC-Controlled Output Voltage o Up to 90% Efficiency o Small 16-Pin QSOP Package (Same size as 8-pin SO) o Power-OK Indicator o 65A Quiescent Current o 1.5A Shutdown Current o Up to 300kHz Switching Frequency
MAX686
The MAX686 DAC-controlled boost/inverter IC converts a positive input voltage to a positive or negative LCD bias voltage up to +27.5V or -27.5V. The device features an internal N-channel MOSFET switch, programmable current limiting, and an internal 6-bit digital-toanalog converter (DAC) for digital adjustment of the output voltage. It comes in a small 16-pin QSOP package (same size as an 8-pin SO). The MAX686 uses a current-limited, pulse-frequencymodulation (PFM) control scheme to provide high efficiency over a wide range of load conditions. Its high switching frequency (up to 300kHz) allows the use of small external components. An LCDON output allows the LCD bias voltage to be automatically disabled when the display logic voltage is removed, protecting the display. The MAX686 has a +2.7V to +5.5V input voltage range for the IC, and a +0.8V to +27.5V input voltage range for the inductor. Typical quiescent supply current is 65A. Shutdown current is 1.5A. The MAX686 offers high-level integration to save space, reduce power consumption, and increase battery life, making it an excellent choice for battery-powered portable equipment. The MAX629 is similar to the MAX686, except that it does not contain a built-in DAC. Both devices have evaluation kits to facilitate designs.
Ordering Information
PART MAX686C/D MAX686EEE TEMP. RANGE 0C to +70C -40C to +85C PIN-PACKAGE Dice* 16 QSOP
*Dice are specified at TA = +25C, DC parameters only.
Functional Diagram appears at end of data sheet.
Applications
Positive or Negative LCD Bias Personal Digital Assistants Notebook Computers Portable Data-Collection Terminals Palmtop Computers Varactor Tuning Diode Bias
VIN = 0.8V TO 27.5V
Typical Operating Circuit
22H MBR0530L VOUT
VCC = 2.7V TO 5.5V 0.1F
R2 VCC VDD LX DACOUT LCDON R3
Pin Configuration
TOP VIEW
PGND 1 UP 2 DN 3 POL 4 VDD 5 ISET 6 SHDN 7 DACOUT 8 16 LX 15 N.C. 14 LCDON
FB UP DAC CONTROL DN ON/OFF SHDN POL GND POK REF ISET PGND 0.1F
MAX686
R1
MAX686
13 GND 12 VCC 11 POK 10 FB 9 REF
QSOP
________________________________________________________________ Maxim Integrated Products
1
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
ABSOLUTE MAXIMUM RATINGS
Voltage VCC, ISET, POK, POL, SHDN, UP, DN, VDD to GND ...........................................-0.3V to +6V FB, REF, DACOUT to GND.......................-0.3V to (VCC + 0.3V) PGND to GND .....................................................-0.3V to +0.3V LX, LCDON to GND..............................................-0.3V to +30V Current LX (sinking) .....................................................................600mA LCDON (sinking)...............................................................10mA Continuous Power Dissipation (TA = +70C) QSOP (derate 8.30mW/C above +70C) ......................667mW Operating Temperature Ranges MAX686C/D ..........................................................0C to +70C MAX686EEE.......................................................-40C to +85C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = VDD = VIN = +5V, CREF = 0.1F, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Supply Voltage (Note 1) Input Voltage Supply Current Shutdown Current VCC Undervoltage Lockout VCC Undervoltage Lockout Hysteresis VCC DAC Reset Threshold Line Regulation Load Regulation LX LX Voltage Range LX Switch Current Limit LX On-Resistance LX Leakage Current Maximum LX On-Time VRESET Boost configuration, VOUT = 27.5V, ILOAD = 5mA, VCC = VDD = 2.7V to 5.5V Boost configuration, VOUT = 27.5V, ILOAD = 0mA to 5mA VLX ILX RLX ILXLEAK tON POL = GND, VFB > 1.2V Minimum LX Off-Time tOFF POL = VCC, VFB < 0.15V POL = GND, VFB < 0.8V POL = VCC, VFB > 0.4V ISET = VCC ISET = GND VCC = VDD = 5V, ILX = 100mA VCC = VDD = 3.3V, ILX = 100mA VLX = 28V 8 0.8 2.8 4 4 10 1 3.5 5 5 0.42 0.21 0.50 0.25 0.6 0.8 0.5 SYMBOL VCC, VDD VIN ICC + IDD ISHDN VLOCK Voltage applied to L1 POL = GND, VFB = 1.3V, IDACOUT = 0mA SHDN = GND Rising or falling 2.10 CONDITIONS MIN 2.7 0.8 65 1.3 2.5 100 1.5 0.1 0.01 2.1 TYP MAX 5.5 VOUT 125 4 2.65 UNITS V V A A V mV V %/V %/mA
28 0.58 0.29 1.2 1.6 1.5 12 1.2 4.2 6 6
V A A s
s
2
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VDD = VIN = +5V, CREF = 0.1F, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER REFERENCE AND FB INPUT REF Output Voltage REF Load Regulation FB Set Point FB Input Bias Current VFB IFB 1.100 1.125 12 I LCDON V LCDON = 0.4V, VPOK = 1.25V V LCDON = 28V, VPOK = GND VREF 0.015 0 6 MSA DNL RDACOUT 2.7V < VCC = VDD < 5.5V 2.7V < VCC = VDD < 5.5V UP, DN, TA = +25C UP, DN, TA = +25C UP, DN, TA = +25C 2.4 1 1 1 1 Mid-scale = VREF x 32/63 Guaranteed monotonic -2 -1 1.5 0.7 2 1 2 6 0.02 1 VREF + 0.015 15 VREF VCC = VDD = 2.7V to 5.5V, no load IREF = 0A to 25A, CREF = 0.1F IREF = 0A to 50A, CREF = 0.47F POL = GND POL = VCC 1.225 -15 1.225 1.250 1 1.5 1.250 0 1.275 15 50 1.150 50 1.275 10 V mV V mV nA V nA mV mA A SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER OK COMPARATOR, LCDON OUTPUT POK Threshold VPOK VPOK rising POK Input Current POK Hysteresis LCDON Sink Current LCDON Leakage Current DAC OUTPUT (Notes 2, 3) Full-Scale Output Voltage Zero-Scale Output Voltage Resolution Mid-Scale Accuracy Differential Nonlinearity Output Resistance in Shutdown VFS VZS -50A < IDACOUT < 0A 0A < IDACOUT < 20A IPOK
VREF
V mV bits % LSB k V V A s s s
LOGIC INPUTS: POL, ISET, UP, DN, SHDN Input Low Level VIL Input High Level Input Bias Current Pulse Width High Pulse Width Low Pulse Separation VIH IBIAS tPWH tPWL tPWS
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
ELECTRICAL CHARACTERISTICS
(VCC = VDD = VIN = +5V, CREF = 0.1F, TA = -40C to +85C, unless otherwise noted.) (Note 4) PARAMETER Supply Voltage (Note 1) Input Voltage Supply Current Shutdown Current VCC Undervoltage Lockout LX LX Voltage Range LX Switch Current Limit LX On-Resistance LX Leakage Current Maximum LX On-Time SYMBOL VCC, VDD VIN ICC + IDD ISHDN VLOCK VLX ILX RLX ILXLEAK tON POL = GND, VFB > 1.2V Minimum LX Off-Time tOFF POL = VCC, VFB < 0.15V POL = GND, VFB < 0.8V POL = VCC, VFB > 0.4V REFERENCE AND FB INPUT REF Output Voltage REF Load Regulation FB Set Point FB Input Bias Current VFB IFB 1.05 2 VREF 0.02 0 6 MSA Mid-scale = VREF x 32/63 2.7V < VCC = VDD < 5.5V 2.7V < VCC = VDD < 5.5V 2.4 1 -3 3 0.7 VREF + 0.02 15 VREF VCC = VDD = 2.7V to 5.5V, no load IREF = 0A to 25A, CREF = 0.1F POL = GND POL = VCC 1.22 -15 ISET = VCC ISET = GND VCC = VDD = 5V, ILX = 100mA VCC = VDD = 3.3V, ILX = 100mA VLX = 28V 7.5 0.7 2.8 3.8 3.8 1.22 0.4 0.2 Voltage applied to L1 POL = GND, VFB = 1.3V, IDACOUT = 0mA SHDN = GND Rising or falling 2.10 CONDITIONS MIN 2.7 0.8 TYP MAX 5.5 VOUT 125 4 2.65 28 0.6 0.3 1.2 1.6 1.5 12.5 1.3 4.2 6.2 6.2 1.28 10 1.28 15 50 1.20 50 V LCDON = 0.4V, VPOK = 1.25V V mV V mV nA V nA mA s UNITS V V A A V V A A s
POWER OK COMPARATOR, LCDON OUTPUT POK Threshold VPOK VPOK rising POK Input Current LCDON Sink Current DAC OUTPUT (Notes 2, 3) Full-Scale Output Voltage Zero-Scale Output Voltage Resolution Mid-Scale Accuracy LOGIC INPUTS: POL, ISET, UP, DN, SHDN Input Low Level VIL Input High Level Input Bias Current VIH IBIAS VFS VZS -50A < IDACOUT < 0A 0A < IDACOUT < 20A IPOK I LCDON
V mV Bits % V V A
Note 1: The MAX686 requires a supply voltage at VCC = VDD between +2.7V and +5.5V; however, the voltage that supplies the inductor can vary from +0.8V to +27.5V, depending on circuit operating conditions. Note 2: The DAC output is set to its midpoint value at power-on. Note 3: The DAC setting is guaranteed to remain valid as long as VCC is greater than the VCC DAC Reset Threshold. Note 4: Specifications to -40C are guaranteed by design, not production tested. 4 _______________________________________________________________________________________
DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch
__________________________________________Typical Operating Characteristics
(Circuits of Figures 1 and 2, VCC = VDD = VIN = +5V, L1 = 22H, SHDN = VCC, CREF = 0.1F, TA = +25C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT (VOUT = +24V)
MAX686 TOC01
MAX686
EFFICIENCY vs. LOAD CURRENT (VOUT = +12V)
MAX686 TOC02
EFFICIENCY vs. LOAD CURRENT (VOUT = -12V)
A: VIN = 9V, ISET = GND B: VIN = 9V, ISET = VCC 80 A EFFICIENCY (%) 75 E 70 F C: VIN = 5V, ISET = GND D: VIN = 5V, ISET = VCC E: VIN = 3V, ISET = GND F: VIN = 3V, ISET = VCC 0.1 1 10 100 B C D
MAX686 TOC03
95 90 85 EFFICIENCY (%) 80 75 70 65 60 0.1 1 10 E D F
A B C
95 90 85 EFFICIENCY (%) 80 75 70 65 60
A C E
85
B D F
A: VIN = 12V, ISET = VCC B: VIN = 12V, ISET = GND C: VIN = 5V, ISET = VCC D: VIN = 5V, ISET = GND E: VIN = 3V, ISET = GND F: VIN = 3V, ISET = VCC 100
A: VIN = 9V, ISET = VCC B: VIN = 9V, ISET = GND C: VIN = 5V, ISET = VCC D: VIN = 5V, ISET = GND E: VIN = 3V, ISET = GND F: VIN = 3V, ISET = VCC 0.1 1 10 100 1000
65
60 LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
EFFICIENCY vs. LOAD CURRENT (VOUT = -18V)
B 80 75 EFFICIENCY (%) 70 F 65 60 55 50 0.1 1 A: VIN = 9V, ISET = GND B: VIN = 9V, ISET = VCC C: VIN = 5V, ISET = GND D: VIN = 5V, ISET = VCC E: VIN = 3V, ISET = GND F: VIN = 3V, ISET = VCC 10 100 LOAD CURRENT (mA) A C E D
MAX686 TOC04
MAXIMUM OUTPUT CURRENT vs. INPUT VOLTAGE (VOUT = +12V, +24V)
MAX686 TOC05
MAXIMUM OUTPUT CURRENT vs. INPUT VOLTAGE (VOUT = -12V, -18V)
A&C B&D B C 10 D
MAX686 TOC06
85
1000
100 A OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
A 100 B C D 10 A: VOUT = 12V, ISET = VCC B: VOUT = 12V, ISET = GND C: VOUT = 24V, ISET = VCC D: VOUT = 24V, ISET = GND 1 0 2 4 6 8 10 12 14 INPUT VOLTAGE (V)
1 0 2 4 6
A: VOUT = -12V, ISET = VCC B: VOUT = -18V, ISET = VCC C: VOUT = -12V, ISET = GND D: VOUT = -18V, ISET = GND 8 10 12 14 16 18
INPUT VOLTAGE (V)
INPUT CURRENT vs. INPUT VOLTAGE
MAX686 TOC07
REFERENCE VOLTAGE vs. LOAD CURRENT
1.251 REFERENCE VOLTAGE (V) 1.250 1.249 1.248 1.247 1.246 1.245 1.244 6 0 20 40 60 80 100 120 140 LOAD CURRENT (A) VOUT 50mV/div AC-COUPLED VIN = VCC = 5V CREF = 0.1F
MAX686 TOC08
OUTPUT VOLTAGE RIPPLE
MAX686 TOC09
1000
1.252
INPUT CURRENT (A)
100
VOUT 50mV/div AC-COUPLED
ISET = GND
10 VCC = VIN = VDD INPUT CURRENT = ICC + IDD VOUT = 18V, NO LOAD 0 1 2 3 4 5
ISET = VCC VOUT = 24V ILOAD = 5mA 20s/div
1
INPUT VOLTAGE (V)
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
_____________________________Typical Operating Characteristics (continued)
(Circuits of Figures 1 and 2, VCC = VDD = VIN = +5V, L1 = 22H, SHDN = VCC, CREF = 0.1F, TA = +25C, unless otherwise noted.)
LINE-TRANSIENT RESPONSE (ISET = VCC)
MAX686 TOC10
LINE-TRANSIENT RESPONSE (ISET = GND)
MAX686 TOC10A
VCC = VDD =VIN 5V 5V
3V
3V
VOUT 50mV/div AC-COUPLED
VOUT 50mV/div AC-COUPLED
VOUT = 24V ILOAD = 5mA VCC = VDD = VIN 5ms/div
5ms/div
LOAD-TRANSIENT RESPONSE (ISET = GND)
MAX686 TOC11
LOAD-TRANSIENT RESPONSE (ISET = VCC)
MAX686 TOC12
VOUT = 24V IOUT
VOUT = 24V 5mA 100A IOUT
5mA 100A
VOUT 20mV/div AC-COUPLED
VOUT 50mV/div AC-COUPLED
2ms/div
2ms/div
POWER-UP RESPONSE (POSITIVE CONFIGURATION)
MAX686 TOC13A
POWER-DOWN RESPONSE (POSITIVE CONFIGURATION)
MAX686 TOC13B
SHDN 2V/div
SHDN 2V/div
ISET = VCC RL = 4.7k
18.7V VOUT 5V/div ISET = VCC RL = 4.7k 500s/div 5V VOUT 5V/div
18.7V
5V
5ms/div
6
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch
_____________________________Typical Operating Characteristics (continued)
(Circuits of Figures 1 and 2, VCC = VDD = VIN = +5V, L1 = 22H, SHDN = VCC, CREF = 0.1F, TA = +25C, unless otherwise noted.)
POWER-UP RESPONSE (NEGATIVE CONFIGURATION)
MAX686 TOC14A
MAX686
POWER-DOWN RESPONSE (NEGATIVE CONFIGURATION)
MAX686 TOC14B
ISET = VCC RL = 4.7k SHDN 5V/div 0V SHDN 5V/div 0V
VOUT 5V/div -16.8V ISET = VCC RL = 4.7k 500s
VOUT 5V/div -16.8V
20ms/div
Pin Description
PIN 1 2 3 NAME PGND UP DN Power Ground. Connect to GND. Increment Output Voltage Input. Increments the DAC on each rising edge such that |VOUT| increases. Decrement Output Voltage Input. Decrements the DAC on each rising edge such that |VOUT| decreases. Polarity Input. Changes polarity and threshold of FB to allow regulation of either positive or negative output voltages. POL also changes the polarity of the DAC output such that increasing codes always increases the magnitude of the output voltage. Set POL = GND for positive output voltage, or set POL = VCC for negative output voltage. Gate-Drive Supply for Internal MOSFET. Connect to VCC. Set LX Current Limit. Sets the peak current limit for the internal switch. Connect to VCC for 500mA current limit. Connect to GND for 250mA current limit. Shutdown Input. A logic low on SHDN places the MAX686 in shutdown mode. Connect to VCC for normal operation. DAC Output Voltage Reference Output. Bypass with a 0.1F ceramic capacitor to GND. Feedback Input. Connect to an external voltage divider to set the MAX686 output voltage. See the section Setting the Output Voltage with the DAC. Power-OK Sense Input/Power-OK Comparator Input. When the voltage applied to POK is greater than 1.125V, LCDON is low. Connect to a resistive voltage divider monitoring V IN or VOUT. IC Power-Supply Input Ground Power-OK Comparator Open-Drain Output. Connect to external switch to turn LCD power on or off. See the section Controlling the LCD Using POK and LCDON. No Connection. Not internally connected. Drain of Internal 28V, 500mA N-Channel Switch _______________________________________________________________________________________ 7 FUNCTION
4
POL
5 6 7 8 9 10 11 12 13 14 15 16
VDD ISET SHDN DACOUT REF FB POK VCC GND LCDON N.C. LX
DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
L1 22H VIN = 0.8V TO 27.5V 15F 4.7F VCC = 2.7V TO 5.5V 0.1F VCC VDD LX R3 DACOUT LCDON FB R2 CF 22pF 0.1F D1 MBR0530L VOUT
MAX686
UP DAC CONTROL DN ON/OFF SHDN POL GND POK REF ISET PGND 0.1F R1
Figure 1. Boost Configuration: Positive Output Voltage
L1 22H VIN = 0.8V TO 27.5V 15F
R4 2 2.2F D2 MBRO530L D1 MBRO530L
VCC = 2.7V TO 5.5V 0.1F
VCC VDD POL
LX DACOUT LCDON FB
R3
CF 100pF R1 R2 NEGATIVE OUTPUT VOLTAGE VIN |VOUT| 27.5V 0.1F 2.2F
UP DAC CONTROL DN ON/OFF SHDN
MAX686
REF POK ISET
GND
PGND
Figure 2. Negative Output Voltage Application Circuit
8
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
D2 MBR0530L L1 22H 15F R4 2 2.2F
VIN = 0.8V TO 27.5V
D1 MBR0530L
VCC = 2.7V TO 5.5V 0.1F
VCC VDD POL
LX DACOUT LCDON FB
R3
CF 470pF R1 R2 NEGATIVE OUTPUT VOLTAGE
UP DAC CONTROL DN ON/OFF SHDN
MAX686
REF POK ISET
|VOUT| (27.5V - VIN)
0.1F 2.2F
GND
PGND
Figure 3. Alternative Negative Output Voltage Application Circuit
Detailed Description
The MAX686 is a step-up converter that contains an internal N-channel MOSFET switch to convert a +0.8V to +27.5V battery voltage to a higher positive or a negative voltage. Figure 1 shows the MAX686 configured to produce a positive output voltage. Figure 2 shows the MAX686 configured with one additional diode and capacitor to produce a negative output voltage. Figure 3 shows an alternative method for developing negative output voltages. Set the output voltage with an external resistor-divider network. Adjust the output voltage with the internal digital-to-analog converter (DAC). The MAX686's current-limited pulse-frequency-modulation (PFM) control scheme has programmable current limiting and provides high efficiency over a wide range of load conditions.
After the on-cycle terminates, the switch turns off, and the inductor charges the output capacitor through the diode. If the output is out of regulation after the minimum off-time has transpired, another on-cycle begins. If the output is within regulation when the minimum offtime transpires, the off-cycle extends until the output falls out of regulation, at which point an on-cycle starts. The MAX686 regulates the voltage on FB (V FB ) to 1.25V. When the output is well below regulation (VFB is less than 1V and the switch current limit is exceeded), the MAX686 operates in initial power-up mode, and the minimum off-time increases to 5s to provide soft-start. The switching frequency, which depends on the load, the input voltage, and the output voltage, can be as high as 300kHz.
Boost Control Scheme (POL = GND)
A combination of peak current limiting and a pair of oneshots controls the MAX686 switching. During the oncycle, the internal switch closes, and current through the inductor ramps up until either the fixed 10s maximum on-time expires (at low input voltages) or the switch peak current limit is reached. The peak current limit is selectable to either 500mA (ISET = V CC) or 250mA (ISET = GND) (see the section Setting the Peak Inductor Current Limit).
Inverting Control Scheme (POL = VCC) In inverting operation, the MAX686 regulates the voltage on FB (VFB) to 0V, and the error amplifier's polarity is reversed. The minimum off-time changes to 3.5s for negative output voltages. When the output is well below regulation (VFB is 0.25V or more and the switch current limit is exceeded), initial power-up is assumed, and the minimum off-time increases to 5s to provide soft-start.
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
Power-OK Comparator
POK is the input to the power-OK comparator. The comparator drives an internal N-channel MOSFET. The MOSFET's open-drain output, LCDON, can drive an external PNP transistor or P-channel MOSFET, switching a positive VOUT to the LCD (Figures 6 and 7). When the voltage at POK exceeds 1.125V (power OK), LCDON goes low, turning on the external PNP transistor. When the voltage at POK drops below 1.125V (power not OK), the external PNP transistor turns off, cutting off power to the LCD display. This feature ensures that the LCD display is not damaged due to improper voltage levels. During shutdown or undervoltage lockout, LCDON is high impedance. edges to make the counter roll over are ignored, preventing unexpected undervoltages or overvoltages.
Internal Reference
The MAX626's 1.25V internal reference is accurate to 2% over temperature. It can source up to 50A of current and should be bypassed with at least a 0.1F capacitor. See the Bypass Capacitors section.
Design Procedure
Setting the Output Voltage with the DAC
For either positive or negative output voltage applications, set the MAX686's output voltage using three external resistors (R1, R2, and R3) as shown in Figures 1, 2, and 3. Since the input bias current at FB has a 50nA maximum value, large resistors can be used in the feedback loop without a significant loss of accuracy. Select R1 to be in the 10k to 220k range and calculate R2 and R3 using the applicable equations from the following subsections.
Shutdown Mode
When SHDN is low, the MAX686 enters shutdown mode, in which the control circuit, POK comparator, DAC output buffer, reference, and internal biasing circuitry turn off. The DAC setting is stored as long as VCC remains above the DAC reset threshold. Supply current drops to 1.5A. SHDN is a logic-level input; connect it to VCC for normal operation. The output voltage in shutdown mode depends on the output voltage polarity. In the positive output voltage configuration (Figure 1), the output is directly connected to the input through the diode (D1) and the inductor (L1). When the device is in shutdown mode, the output voltage falls to one diode drop below the input voltage, and any load connected to the output may still conduct current. In the negative output voltage configuration (Figures 2 and 3), there is no DC path between the input and the output, and the output falls to GND in shutdown mode.
Setting the Minimum Positive Output Voltage The minimum output voltage is set with the resistordivider (R1-R2, Figure 1) from VOUT to FB. The minimum output voltage occurs when VDACOUT = VFB = 1.25V. Therefore, R3 has no effect on the minimum output voltage. Choose R1 to be 120k so that the current in the divider is about 10A. Then determine R2 as follows: R2 = R1 x (VOUT(MIN) - VFB) / VFB
For example, if VOUT(MIN) = 12.5V: R2 = 120k x (12.5 - 1.25) / (1.25) =1.08M Mount R1 and R2 close to the FB pin to minimize parasitic capacitance.
Internal DAC
The MAX686 contains an internal 6-bit counter and DAC to control the output voltage digitally (see the section Setting the Output Voltage with the DAC). The UP and DN input pins drive an internal up/down counter that directly controls the DAC. To increase the magnitude of VOUT in the boost configuration, apply a rising edge to UP. This decreases the DAC output voltage one step and correspondingly increases V OUT. Conversely, to decrease the magnitude of VOUT, apply a rising edge to DN. This increases the DAC output voltage one step and correspondingly decreases VOUT. The UP and DN control direction reverses for a negative output to maintain the same control direction of the absolute magnitude of the output voltage. Upon power-up, the DAC code internally goes to mid-scale. The DAC's internal counter does not roll over once it reaches full scale or zero. Therefore, additional rising
10
Setting the Maximum Positive Output Voltage The DAC is adjustable from 0V to 1.25V in 64 steps, and 1LSB = 1.25V / 63 = 19.8mV. Calculate R3 to adjust VOUT with DACOUT (Figure 1). For VOUT(MAX) = 25V and VOUT(MIN) = 12.5V, determine R3 as follows: R3 = R2 x (VFB) / (VOUT(MAX) - VOUT(MIN)) = 1.08M x (1.25) / (25 - 12.5) = 108k The general form for VOUT as a function of the DAC output (VDACOUT) is: VOUT = VOUT(MIN) + (VFB - VDACOUT) x R2 / R3 At power-up, the DAC resets to mid-scale where VDACOUT = 0.635V. Therefore, the output voltage after power-up is: VOUT(MID) = VOUT(MIN) + (1.25 - 0.635) x R2 / R3 = 18.65V
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch
Note that for a positive output voltage, VOUT increases as V DACOUT decreases. V OUT(MAX) corresponds to V DACOUT = 0V, and V OUT(MIN) corresponds to VDACOUT = 1.25V.
Setting the Minimum Negative Output Voltage For a negative output voltage, the FB threshold voltage (VFB) is 0V, and R1 is placed between FB and REF (Figures 2 and 3). Again, choose R1 to be 120k so that the current in the divider is about 10A. Then determine R2 as follows: R2 = R1 x |VOUT / VREF | For example, if VOUT(MIN) = -12.5V: R2 = 120k x |(-12.5) / (1.25)| = 1.2M Setting the Maximum Negative Output Voltage Assume VOUT(MAX) = -25V and VOUT(MIN) = -12.5V, then determine R3 and VOUT(MID) as follows:
R3 = R2 x (VFB - VDACOUT(MAX)) / (VOUT(MAX) VOUT(MIN)) = 1.2M x (0 - 1.25) / (-25 - -12.5) =120k For a negative output voltage, VOUT = VOUT(MIN) + (VFB - VDACOUT) x R2 / R3. At power-up, the DAC resets to mid-scale where VDACOUT = 0.635V. Therefore, the output voltage after reset is: VOUT(MID) = -12.5 + (0 - 0.635) x (1.2M) / (120k) = -18.85V Note that for a negative output voltage, |VOUT| increases as VDACOUT increases. |VOUT(MAX)| corresponds to V DACOUT = 1.25V, and |V OUT(MIN)| corresponds to VDACOUT = 0V.
Setting the Negative Output Voltage For negative output voltages, configure R1 and R2 as shown in Figures 2 and 3, connecting POL to VCC and omitting R3. Connecting POL to VCC sets the FB threshold voltage to GND for negative output voltages. Choose R1 in the 10k to 220k range and calculate R2 as follows:
R2 = R1 x |VOUT|/ VREF where VREF = 1.25V. Figures 2 and 3 demonstrate two possible methods of generating a negative voltage with the MAX686. In Figure 3, D2 connects to the input supply (VIN). This connection features the best output ripple performance, but |VOUT| must be limited to values less than -27.5V - VIN. If the application requires a larger negative voltage, use the method of Figure 2, connecting D2 to GND. This method allows a maximum output voltage of -27.5V, but |VOUT| must be greater than VIN.
MAX686
Setting the Peak Inductor Current Limit
External current-limit selection provides added control over the MAX686's output performance. A higher current limit increases the amount of energy stored in the inductor during each cycle, which provides higher output current capability. For higher output current applications, choose the 500mA current-limit option by connecting ISET to VCC. When the load requires lower output current, the 250mA current limit provides several advantages. First, a smaller inductor saves board area and cost. Second, smaller energy transfers per cycle reduce output ripple for a given capacitor. Connecting ISET to GND selects the 250mA current-limit option. Connecting ISET to VCC selects the 500mA current-limit option. Refer to the Typical Operating Characteristics for efficiency and load current graphs at each ISET current setting.
Setting the Output Voltage without the DAC
The MAX686 may be used without the DAC to control the output voltage. For either positive or negative output voltage applications, set the MAX686's output voltage using only two external resistors (R1 and R2) as shown in Figure 1, 2, or 3. Since the input bias current at FB has a 50nA maximum value, large resistors can be used in the feedback loop without a significant loss of accuracy. Select R1 to be in the 10k to 220k range and calculate R2 using the applicable equations from the following subsections.
Selecting Inductors
The MAX686's high switching frequency allows for the use of a small inductor. The 22H inductor shown in Figures 1, 2, and 3 is recommended for most applications, although values between 10H and 47H are acceptable. Use inductors with a ferrite core or equivalent; powder iron cores are not recommended for use with high switching frequencies. The inductor's incremental saturation rating must exceed the selected current limit. For highest efficiency, use an inductor with a low DC resistance (under 200m). See Table 1 for a list of inductor suppliers.
Setting the Positive Output Voltage Use the circuit of Figure 1, connecting POL to GND and omitting R3. Connecting POL to GND sets the threshold voltage at FB to VREF. Choose the value of R1 in the 10k to 220k range and calculate R2 as follows: R2 = R1 x (VOUT / VREF -1) where VREF = 1.25V.
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11
DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
VIN = 0.8V TO 27.5V 15F R2 VCC = 2.7V TO 5.5V 0.1F CF LX VCC LX VCC = 2.7V TO 5.5V 0.1F R3 VCC REF R3 22H MBR0530L VOUT VIN = 0.8V TO 27.5V 22H 15F R2 CF MBR0530L VOUT
MAX686
DACOUT
MAX686
RPOT 100k POTENTIOMETER FB
FB R1
R1
Figure 4. Feed-Forward Capacitor
Figure 5. Using a Potentiometer to Adjust Output Voltage
Table 1. Component Suppliers
SUPPLIER CAPACITORS AVX: TPS series Matsuo: 267 series Sprague 595D series DIODES Motorola: MBR0530L Nihon; EC11 FS1 series INDUCTORS Coilcraft: DO1608 and DT1608 series Murata-Erie: LQH4 series Sumida: CD43, CD54, and CD74 series TDK: NLC565050 series (847) 639-6400 (814) 237-1431 (847) 956-0666 (847) 390-4373 (847) 639-1469 (814) 238-0490 (847) 956-0702 (847) 390-4428 (602) 303-5454 (805) 867-2555 (602) 994-6430 (805) 867-2698 (803) 946-0690 (714) 969-2491 (603) 224-1961 (803) 626-3123 (714) 960-6492 (603) 224-1430 PHONE FAX
Selecting Capacitors
Output Filter Capacitors The primary selection criterion for the output filter capacitor is low equivalent series resistance (ESR). The product of the peak inductor current and the output filter capacitor's ESR determines the amplitude of the high-frequency ripple seen on the output voltage. These requirements can be balanced by appropriately selecting the current limit, as discussed in the Setting the Peak Inductor Current Limit section. Table 1 lists some low-ESR capacitor suppliers. Bypass Capacitors Although the output current of many MAX686 applications may be relatively small, the input supply must be able to source current transients equal to the ISET current limit. The input bypass capacitor reduces the peak currents drawn from the voltage source and reduces noise caused by the MAX686's switching action. The input source impedance determines the size of the capacitor required at the input (VIN). As with the output filter capacitor, low ESR is the primary consideration. A 15F, low-ESR capacitor is adequate for most applications, although smaller bypass capacitors may also be acceptable in light-load applications. Bypass the IC separately with a 0.1F ceramic capacitor placed as close as possible to the VCC and GND pins. Bypass REF to GND with a 0.1F ceramic capacitor for REF currents up to 25A. REF can source up to 50A of current for external loads. For 25A IREF 50A, bypass REF with a 0.47F capacitor.
Selecting Diodes
The MAX686's high switching frequency demands a high-speed rectifier. Schottky diodes, such as the 1N5818 or MBR0530L, are recommended. Make sure that the diode's peak current rating exceeds the peak current set by ISET and that its breakdown voltage exceeds the output voltage. Schottky diodes are preferred due to their low forward voltage. However, ultrahigh-speed silicon rectifiers are also acceptable. Table 1 lists Schottky diode suppliers.
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
VIN = 0.8V TO 27.5V 22H MBR0530L VOUT VIN = 0.8V TO 27.5V 22H MBR0530L VOUT
R2 VCC LX DACOUT LCDON FB R4 POK R5 R3
R6
ILCD VCC LX DACOUT LCDON POSITIVE OUTPUT VOLTAGE FB R3
R2
R6
ILCD
R7
VOUTSW
R7
VOUTSW POSITIVE OUTPUT VOLTAGE
MAX686
R1
MAX686
POK R1
GND
GND
Figure 6. Using the POK for Input Voltage Monitoring
Figure 7. Using the POK for Output Voltage Monitoring
Feed-Forward Capacitors Parallel a feed-forward capacitor (CF) across R2 to compensate the feedback loop and ensure stability (Figure 4). Use values up to 100pF for most applications. Choose the lowest capacitor value that ensures stability; high capacitance values may degrade line regulation.
Applications Information
Using a Potentiometer to Adjust the Output Voltage
The output can be adjusted with a potentiometer instead of the DAC (Figure 5). Choose RPOT = 100k and connect it between REF and GND. Connect R3 to the potentiometer's wiper instead of to DACOUT. Use the same design equations for adjusting the output voltage with the DAC.
one diode drop below the input voltage (VIN) in shutdown. LCDON is not needed for negative outputs, which already fall to 0V in shutdown. * An input-sensing cutoff for positive outputs. Connect POK to a voltage divider to sense the input voltage. The output switches on only when the input reaches the set level (Figure 6). * An output-sensing cutoff for positive outputs. Connect POK to the feedback voltage divider to sense the output voltage. The output switches on only when it reaches 90% of the set voltage (Figure 7). For positive output voltage sensing, connect POK directly to FB to monitor the output voltage (Figure 7). The POK threshold is 10% less than the set voltage at FB. Therefore, when the output voltage drops 10% below its set value, the POK circuit turns off the external PNP transistor, disconnecting the load. For input voltage sensing, a resistor-divider (R4-R5, Figure 6) from VIN to POK controls the open-drain output LCDON, which pulls low when VPOK > 1.125V. Choose R5 = 100k. For example, if the minimum battery voltage is 5.3V, then determine R4 as follows: R4 = R5 x [(VIN / VPOK) - 1] = 100k x [(5.3 / 1.125) -1] = 371k LCDON typically drives a low-cost PNP transistor (such as a 2N2907 or equivalent), switching a positive VOUT to the LCD. Choose a PNP with low VCESAT at the required load current. R7 limits the base current in the PNP, and
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Controlling the LCD Using POK and LCDON
When the voltage at POK is greater than 1.125V (typical), the open-drain LCDON output pulls low. LCDON can withstand up to 27.5V to control an external PNP transistor to switch on the MAX686's positive output (Figures 6 and 7). A PFET can also be used, but a resistor-divider must be used in conjunction with it, so that the PFET does not exceed its VGS rating. Three useful applications of this feature are as follows: * An off-switch driver to ensure that a positive boosted output goes to 0V during shutdown. Connect POK to SHDN. Without this switch, the positive output falls to
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
VIN = 2.7V TO 5.5V 15F 22H MBR0530L VOUT
R2
CF
VCC to the source through a 100 resistor (R8), and bypass VCC with a 1F ceramic capacitor as shown in Figure 8. Since the supply current is very small, the voltage drop across R8 is insignificant and does not degrade performance. The RC isolates V CC from the switching noise created by the inductor and internal power switch. Although, in many cases, the MAX686 and the inductor are powered from the same source, it is often advantageous in battery-powered applications to power the MAX686 IC (VCC, VDD) from an available regulated supply and to power the inductor (VIN) directly from a battery. The MAX686 requires a +2.7V to +5.5V supply at VCC, but the inductor can be powered from voltages as low as 0.8V, significantly increasing usable battery life.
VDD R8 100 VCC 1F
LX
MAX686
DACOUT
R3
FB R1
Layout Considerations
Proper PC board layout is essential due to high current levels and fast switching waveforms that radiate noise. It is recommended that initial prototyping be performed using the MAX686 evaluation kit or equivalent PC board-based design. Breadboards or proto-boards should never be used when prototyping switching regulators. Connect the GND pin, the input bypass-capacitor ground lead, and the output filter-capacitor ground lead to a single point (star ground configuration) to minimize ground noise and improve regulation. Also, minimize lead lengths to reduce stray capacitance, trace resistance, and radiated noise, with preference given to the feedback circuit, the ground circuit, and LX. Place R1 and R2 as close to the feedback pin as possible. Place the bypass capacitors as close to the pins as possible. Refer to the MAX686 evaluation kit data sheet for an example of proper board layout.
Figure 8. Using a Common Supply-Voltage Source
R6 turns it off when LCDON goes high. R6 and R7 can be the same value. Choose R7 such that the minimum base current is greater than 1/50 of the collector current. For example, assume VOUT(MIN) = 12.5V and ILCD = 10mA and then determine R7 as follows: R7 50 x (12.5 - 0.7) / 10mA = 59k Remember that the LCD voltage, VOUTSW, is the regulated output voltage minus the drop across the PNP switch (300mV typ).
Connecting VIN to VCC
The MAX686 (VCC, VDD) and the inductor (VIN) can be powered from the same source as long as the +5.5V VCC maximum limit is not violated. To ensure stability, connect VIN and VDD directly to the source, connect
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DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch
Functional Diagram
MAX686
VCC VDD GND UP DN SHDN POL REF
BIAS
MAX686
DIGITAL INTERFACE 6-BIT DAC
DACOUT
1.25V
BANDGAP REFERENCE 1.125V LX ON-TIME/ OFF-TIME CONTROL ISET
FB
ERROR AMP
1.125V POK
POK COMPARATOR CURRENT-LIMIT COMPARATOR
PGND
LCDON
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15
DAC-Controlled Boost/Inverter LCD Bias Supply with Internal Switch MAX686
QSOP.EPS
Chip Information
TRANSISTOR COUNT: 1325 SUBSTRATE CONNECTED TO GND
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