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| LZ2346 LZ2346 DESCRIPTION Twopower supply (+5 V and +12 V) operation CCIR 1/3 type B/W CCD Area Sensor for CCIR PIN CONNECTIONS 16-PIN SDIP TOP VIEW LZ2346 is 1 /3-type (6.0 mm) solid-state image sensor that consists of PN phote-diodes and CCDS (charge-coupled devices) driven by only positive voltages. Having approximately 220000 pixels (horizontal 384 X vertical 582), the sensor provides a stable B/W image. ~m 1 RD GND 2 FEATURES q Number of pixels : 362 (H) X 582 (V) ,---- ------. ---- ----- . 3 4 5 0s OD 4 q q q q q q q Pixel pitch : 13.6 Mm (H) x 6.3 Km (V) Number of optical black pixels : Horizontal; front 2 and rear 20 Low fixed pattern noise and lag No sticking and no image distortion Blooming suppression structure Built-in output amplifier Variable electronic shutter (1/50 to 1/10 000 s) Compatible with CCIR standard Package : 16-pin SDIPICERDIP](WDIPO1 6-N-0500B) I I I 1 I ! I I I I I 1 I I 1 , H2 B 6 , .--. ------ ---- ..__ : dH2 7 8 dHIB i -- ! 9 1 6 TI 15 OFD 1 4 4TG 1 3 4V2 1 2 4V1 1 1 4V4 10 4V3 tiH1 BLOCK DIAGRAM II TI OFD GND 0s t 4 Horizontal Shift Register 4H1 4TG O D R D 4175 4.2 6H16 6H2B "IO abwnca WAR? dafecta Mat wcur in qu!mnt using 1741 data Wks, etc of confimtlm by device ~!ticatron shseb,WM oi tikaa rM msib!lm ti anyteti u~ng any SHARPS device" any oi SHARPS dewcea, shm !n cshlcgs, Untact SHARP order to obb+n me Iataat M deviw ~Ifimtion &b tie In LZ2346 PIN DESCRIPTION SYMBOL RD OD PIN NAME Reset transistor drain Output transistor drain I Video OUtDUt I Reset transistor gate clock I I 0s ! dRs I dVi, $V2rdV3, dV4 4HI,4H2,4H16,4H2B Vertical shift register gate clock Horizontal shift register gate clock Transfer gate clock d TG I OFD TI GND I Overflow drain Test terminal Ground ABSOLUTE MAXIMUM RATINGS PARAMETER OutDut transistor drain VOltage (Ta =25C) SYMBOL VOD vRD RATING Oto Oto Oto UNIT v v v v v v v v "c `c +15 +15 +15 Reset transistor drain voltage Test terminal, TI Reset gate clock voltage Vertical shift register clock voltage Horizontal shift register clock voltage Transfer gate clock voltage Overflow drain voltage Storage temperature ODeratina ambient temperature VTI vdRs -0.3 to +15 -0.3 to +15 -0.3 to +15 -0,3 to +15 O to +27 - 4 0 t o +85 Vdv V+t. V+TG vOFD Tstg Topr -20 to + 7 0 175 LZ2346 RECOMMENDED OPERATING CONDITIONS PARAM~ER Operating ambient temperature Output transistor drain voltage Reset transistor drain voltage Overflow SYMBOL Topr Voo VRD MIN. 12,0 3.0 12,0 TYP. 25.0 12.5 Voo MAX. 14.0 12,0 UNIT `c v v NOTE When DC is applied When pulse is applied p-p level VOFD V60m VT1 v v v v 1 2 drain voltage 12.5 Voo 14.0 Test terminal, T! Ground voltage Transfer gate clock Vertical shiti register clock Horizontal shift register clock R e s e t g a t e clcck GND LOW level HIGH level LOW level HIGH level LOW level HIGH level LOW HIGH level level 0.0 - 0.05 12.0 - v $ TGL v dTGH VdV1-4L V4VI-4H VH! -2L, V 4 HI B-2BL VdHI-ZH, VBd V4RSL VdRSH fdvl-4 fdH1-2, f#HIB-2B f$m HI 0.0 12.5 0.0 5.0 0,0 5.0 0.05 14,0 0,05 6.0 0.05 6.0 VHD -10.5 9,5 v v v v v v v v kHz MHz MHz 0.05 4.7 0.05 4.7 0.0 - B-ZBH V RD - 6.0 15.63 6,75 6.75 V e r t i c a l shif-t r e g i s t e r c l o c k f r e q u e n c y Horizontal shift register clock frequency Reset gate clock frequency Horizontal shift register clock phase twl , twz 0.0 5,0 10.0 ns 3 NOTES : 1. When DC voltage is applied, shutter speed is 1 /50 seconds. 2. When pulse is applied, shutter spaed is less than 1/50 seconds. 3 " ~ `H'" ~ ,, ,, ,, twl twz :: `"l'" 176 LZ2346 ELECTRICAL CHARACTERISTICS (Drive method : Field Accumulation) (Ta = 2SC, Operating conditions : typical values for the recommended operating conditions, Color temperature of light source :3200 K / IR cut-off filter (CM-500, 1 mmt)) PARAMHER Photo response non-uniformity Saturation signal Dark output voltage Dark signal non-uniformity Sensitivity Smear ratio Image lag Blooming suppression ratio Output trasistor drain current output impedance The standard output voltage is defined as 150 mV by the average output voltage under uniform illumination. q The standard exposure level is defined when the average output voltage is 150 mV under uniform illumination. q SYMBOL PRNU MIN. TYP. MAX. 15 UNIT ~/0 NOTE 2 3 1, 4 1, 5 6 7 8 9 vast Vdark DSNU R SMR Al ABL IOD 450 5.0 1.5 140 15.0 mV mV mV mV - 76 1.0 dB 5.0 200 - 85 % mA a g< I 1000 2.5 400 5.0 Ro NOTES : 6. 1 2 3 4 5 Ta : +WC The image area is divided mto 10X 10 segments. Tk ~ment's voltage is the average output voltage of all the pixels within the segment. PRNU is defined by (Vmax - Vmin)/Vo, where Vmax and Vmin are the maximum and the minimum values of each segment's voltage respectively, when the average output voltage Vo is 150 mV. The image area is divided into 10x 10 segments. The saturation signal is defined as the minimum of each segment's voltage which is the average output voltage of all the pixels within the segment, when the exposure level is ~t as 10 times, compared to standard level. The average output voltage under a non-e-re @lticm. The image area is div!ded into 10x 10 segments. OSNU is defined by (Vdmax - Vdmin) under the non-exposure con- 7, 8, 9 dition where Vdmax and Vdmin are the maximum and M minimum values of each segment's voltage, respective y, that is the average output voltage over al I pixels in the segment. The average output voltage when a 1 COO Iux light source attached with a 90% reflector is imaged by a lens of F4, f50 mm. The sensor is adjusted to position a V/l O square at the center of image area Mere V is the vetilcal length of the image area. SMR is defined by the ratio of the output voltage detected during the vertical blanking pericxl to the maximum of the pixel voltage in the V/l O square. The sensor is ex~d at the exmsure level corresWnding to the standard condition preceding ncm-exposure condition. Al is defined by the ratio between the output voltage measured at the 1st field during the non-exposure period and the standard output voltage. The sensor is adjusted to position a V/l O square at the center of image area. ABL is the ratio between the exDsure at the standard condition and the exposure at a mint where a blmming is observed. 177 LZ2346 PIXEL STRUCTURE OPTICAL BIACK (2 PIXELS) 362 (H) X 582 (v) / OPTICAL BLACK (20 PIXELS) ~ SPECTRAL RESPONSE EXAMPLE 100 80 7 \ w > : K 40 20 0 400 6~ 800 1 Ooil 1200 178 LZ2346 TIMING DIAGRAM EXAMPLE VERTICAL TRANSFER TIMING (Ist, 3rd FIELD) 19 5 623 625 1 HD nnnnn nnnnnnnnnnnn nn VD A I uuruuu uuuuuuuuuuuHuuuuuIuuu uuuuuI d V2 u K u u u u u u u u u u u u u u u u u u u 4V1 d V3 d V4 J n n n n n n n n n n n n J n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n dTG 0s ~ 582 WI n 357 !+++ 2468 Juu I II (2nd. 4th HELD) ., HD VD 4V1 n J 311 nnnnn 331 318 nnnnn ,[ n n n n n n n n n n n 4 V2 d V3 uuuuu uuuuuuuuuuIuuuuuuuuuu u u u u u u u u u u u~Ll u u u u u ~~ nnnnnnnnnnnJnnnnnnnnnn nnnnn n 246 5:9 %+1 1 + + + w 582 0s ~ HORIZONTAL TRANSFER TIMING I dH1 dH2 d RS . . . . . . . . . . . . . ...362 OB(20) I 06(2) 1..0UPUT(362) . . . . . . . . . . . . . . . . . . . . . . 0s 179 LZ2346 READOUT TIMING (1S, 3rd FIELD) (2nd, 180 SYSTEM CONFIGURATION EXAMPLE -- 1 * -- I dso L *" ] mll II 181 |
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