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PD - 9.1241C
IRF7306
HEXFET(R) Power MOSFET
l l l l l l l
Generation V Technology Ultra Low On-Resistance Dual P-Channel Mosfet Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Fast Switching
S1 G1 S2 G2
1
8
D1 D1 D2 D2
2
7
VDSS = -30V
3
6
4
5
RDS(on) = 0.10
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra red, or wave soldering techniques. Power dissipation of greater than 0.8W is possible in a typical PCB mount application.
To p V ie w
S O -8
Absolute Maximum Ratings
Parameter
I D @ TA = 25C I D @ TA = 25C I D @ TA = 70C I DM PD @TA = 25C VGS dv/dt TJ, TSTG 10 Sec. Pulsed Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
-4.0 -3.6 -2.9 -14 2.0 0.016 20 -5.0 -55 to + 150
Units
A
W W/C V V/ns C
Thermal Resistance Ratings
Parameter
RJA Maximum Junction-to-Ambient
Typ.
---
Max.
62.5
Units
C/W 8/25/97
IRF7306
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(ON) VGS(th) gfs IDSS I GSS Qg Q gs Q gd t d(on) tr t d(off) tf LD LS Ciss Coss Crss
Min. -30 --- --- --- -1.0 2.5 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units Conditions --- --- V VGS = 0V, ID = -250A -0.037 --- V/C Reference to 25C, I D = -1mA --- 0.10 VGS = -10V, ID = -1.8A --- 0.16 VGS = -4.5V, ID = -1.5A --- --- V VDS = VGS, ID = -250A --- --- S VDS = -24V, I D = -1.8A --- -1.0 VDS = -24V, VGS = 0V A --- -25 VDS = -24V, VGS = 0V, TJ = 125C --- -100 V GS = -20V nA --- 100 VGS = 20V --- 25 ID = -1.8A --- 2.9 nC VDS = -24V --- 9.0 VGS = -10V, See Fig. 6 and 12 11 --- VDD = -15V 17 --- I D = -1.8A ns 25 --- RG = 6.0 18 --- RD = 8.2, See Fig. 10
D
4.0 6.0 440 200 93
--- nH --- --- --- ---
Between lead tip and center of die contact VGS = 0V VDS = -25V = 1.0MHz, See Fig. 5
G
S
pF
Source-Drain Ratings and Characteristics
IS
ISM
VSD t rr Q rr t on
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- -2.5 showing the A G integral reverse --- --- -14 p-n junction diode. S --- --- -1.0 V TJ = 25C, IS = -1.8A, VGS = 0V --- 53 80 ns TJ = 25C, IF = -1.8A --- 66 99 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%.
ISD -1.8A, di/dt 90A/s, VDD V(BR)DSS,
TJ 150C
Surface mounted on FR-4 board, t 10sec.
IRF7306
100
VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTT OM - 4. 5V TOP
100
-ID , D ra in -to -S o u rc e C u rre n t (A )
10
-4 .5V
-I D , D ra i n -to -S o u rc e C u rre n t (A )
VGS - 15V - 10V - 8.0V - 7.0V - 6.0V - 5.5V - 5.0V BOTT OM - 4.5V TOP
10
-4.5 V
1 0.1 1
20 s P U LSE W IDTH TJ = 25 C A
10 100
1 0.1 1
2 0 s PU L SE W ID TH T J = 1 50 C
10
A
100
-VD S , Drain-to-Source Voltage (V)
-V D S , Drain-to-Source V oltage (V )
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
TJ = 2 5 C T J = 1 5 0 C
R D S (o n ) , Drain-to-S ource On Resistance (N ormalized)
100
2.0
I D = -3 .0A
-I D , D ra in-to -S ou rce C urr ent ( A )
1.5
10
1.0
0.5
1 4 5 6 7
V D S = - 15 V 2 0 s P U L S E W ID TH
8 9 10
A
0.0 -60 -40 -20 0 20 40 60 80
VG S = -10V
100 120 140 160
A
-V G S , G ate-to-S o urce V oltage ( V )
T J , Junction T emperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRF7306
1000
800
-VG S , G a te -to -S o u rc e V o lta g e (V )
V G S = 0 V, f = 1MH z C iss = C g s + C gd , C ds SH O R TED C rs s = C gd C os s = C ds + C g d
20
ID = -3.0 A VDS = -24 V
16
C, C apacitance (pF)
600
C iss C o ss
12
400
8
200
C rss
4
0 1 10 100
A
0 0 5 10
FOR TE ST C IR C U IT S EE FIG U R E 12
15 20 25
A
-V D S , Drain-to-S ource V oltage (V )
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
-IS D , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
10
TJ = 1 50 C TJ = 25C
1
-I D , Drain Current (A) I
100us 10
1ms
0.1 0.0 0.3 0.6 0.9
VG S = 0 V
1.2
A
1.5
1 1
TC = 25 C TJ = 150 C Single Pulse
10
10ms 100
-VS D , Source-to-D rain V oltage (V)
-VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRF7306
4.0
VDS VGS
RD
D.U.T.
+
-I D , Drain Current (A)
3.0
-10 V
2.0
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
1.0
VDS 90%
0.0 25 50 75 100 125 150
T C , Case Temperature
( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Ambient Temperature
Fig 10b. Switching Time Waveforms
100
(Z thJA )
D = 0.50 0.20 10 0.10
Thermal Response
0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.1 0.0001 0.001 0.01 0.1 1 10 100 PDM
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
-
RG
VDD
IRF7306
Current Regulator Same Type as D.U.T.
50K
-10 V
QGS VG
QG QGD
12V
.2F .3F
VGS
-3mA
Charge
IG
ID
Current Sampling Resistors
Fig 12a. Basic Gate Charge Waveform
Fig 12b. Gate Charge Test Circuit
+
D.U.T.
-
VDS
IRF7306
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS*
**
* dv/dt controlled by RG * I SD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ -
VDD
*
*
Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[ VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For P-Channel HEXFETS
IRF7306
Package Outline
SO-8 Outline Dimensions are shown in millimeters (inches)
D -B-
DIM
5
INCHES MIN .0532 .0040 .014 .0075 .189 .150 MAX .0688 .0098 .018 .0098 .196 .157
MILLIMETERS MIN 1.35 0.10 0.36 0.19 4.80 3.81 MAX 1.75 0.25 0.46 0.25 4.98 3.99
A
6 5 H 0.25 (.010) M AM
5
8 E -A-
7
A1 B C D E
1
2
3
4
e 6X
K x 45 e1 A
e e1 H K L
.050 BASIC .025 BASIC .2284 .011 0.16 0 .2440 .019 .050 8
0.72 (.028 ) 8X
1.27 BASIC 0.635 BASIC 5.80 0.28 0.41 0 6.20 0.48 1.27 8
0.10 (.004) 6 C 8X
-CB 8X 0.25 (.010) A1 M CASBS
L 8X
RECOMMENDED FOOTPRINT
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1982. 2. CONTROLLING DIMENSION : INCH. 3. DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES). 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS MOLD PROTRUSIONS NOT TO EXCEED 0.25 (.006). 6 DIMENSIONS IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE..
6.46 ( .255 )
1.78 (.070) 8X
1.27 ( .050 ) 3X
Part Marking Information
SO-8
E X A M P LE : T H IS IS A N IR F 7101 D A TE C O DE (Y W W ) Y = L A S T D IG IT O F T H E Y E A R W W = W EEK XX X X W AFER LO T C O D E (L A S T 4 D IG IT S )
312 IN T E R N A T IO N A L R E C T IF I E R LO G O F 7 101
TOP
P A R T N UM B E R
B O T TO M
IRF7306
Tape & Reel Information
SO-8 Dimensions are shown in millimeters (inches)
1.85 (.072) 4.10 ( .161 ) 1.65 (.065) 3.90 ( .154 ) 1.60 (.062) 1.50 (.059) 0.35 (.013) 0.25 (.010)
T ERM IN ATIO N N UM BE R 1
2 .05 (.080) 1 .95 (.077)
1
5.55 (.218) 5.45 (.215)
5.30 ( .208) 5.10 ( .201)
1 2.30 (.484) 1 1.70 (.461)
FE ED D IRE CTIO N
8.10 (.318) 7.90 (.311) 6.50 (.255) 6.30 (.248)
2.60 (.102) 1.50 (.059)
2.20 ( .08 6) 2.00 ( .07 9)
13.20 (.519) 12.80 (.504)
15.40 (.607) 11.90 (.469) 2
33 0.00 ( 13.000) M AX .
50.00 ( 1.96 9) M IN.
N O TES : 1 CO N FO RM S TO EIA -48 1-1 2 INC LUD ES FLA NG E D IST O RTIO N @ O U TER E DG E 3 DIM E NS IO NS M E AS URE D @ HUB 4 CO N TRO LLING DIM E NSIO N : M ETR IC
14.40 (.5 66) 12.40 (.4 48) 3
18.4 0 ( .7 24) M AX 3
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 8/97

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