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(R) L4971 1.5A STEP DOWN SWITCHING REGULATOR UP TO 1.5A STEP DOWN CONVERTER OPERATING INPUT VOLTAGE FROM 8V TO 55V PRECISE 3.3V (1%) INTERNAL REFERENCE VOLTAGE OUTPUT VOLTAGE ADJUSTABLE FROM 3.3V TO 50V SWITCHING FREQUENCY ADJUSTABLE UP TO 500KHz VOLTAGE FEEDFORWARD ZERO LOAD CURRENT OPERATION INTERNAL CURRENT LIMITING (PULSE-BYPULSE AND HICCUP MODE) INHIBIT FOR ZERO CURRENT CONSUMPTION PROTECTION AGAINST FEEDBACK DISCONNECTION THERMAL SHUTDOWN SOFT START FUNCTION DESCRIPTION The L4971 is a step down monolithic power switching regulator delivering 1.5A at a voltage between 3.3V and 50V (selected by a simple external divider). Realized in BCD mixed technology, the device uses an internal power D-MOS transistor (with a typical Rdson of 0.25) to obtain very high efficency and high switching speed. TYPICAL APPLICATION CIRCUIT Vi=8V to 55V 5 R1 20K 3 C1 220F 63V C7 220nF C2 2.7nF 2 7 Minidip SO16W ORDERING NUMBERS: L4971 (Minidip) L4971D (SO16) A switching frequency up to 500KHz is achievable (the maximum power dissipation of the packages must be observed). A wide input voltage range between 8V to 55V and output voltages regulated from 3.3V to 50V cover the majority of today's applications. Features of this new generations of DC-DC converter include pulse-by-pulse current limit, hiccup mode for short circuit protection, voltage feedforward regulation, soft-start, protection against feedback loop disconnection, inhibit for zero current consumption and thermal shutdown. The device is available in plastic dual in line, MINIDIP 8 for standard assembly, and SO16W for SMD assembly. 8 L4971 4 1 6 L1 126H (77120) D1 GI SB360 C8 330F VO=3.3V/1.5A C5 100nF R2 9.1K C4 22nF C6 100nF D97IN748A May 2000 1/12 L4971 BLOCK DIAGRAM VCC 5 THERMAL SHUTDOWN VOLTAGES MONITOR CBOOT CHARGE SS_INH 2 INHIBIT SOFTSTART 3.3V COMP FB 7 8 E/A INTERNAL REFERENCE INTERNAL SUPPLY 5.1V 6 PWM BOOT R S 3.3V Q DRIVE OSCILLATOR 1 GND CBOOT CHARGE AT LIGHT LOADS 3 OSC 4 OUT D97IN594 PIN CONNECTIONS N.C. GND 1 2 3 4 5 6 7 8 D97IN596 16 15 14 13 12 11 10 9 N.C. N.C. FB COMP BOOT VCC N.C. N.C. GND SS_INH OSC OUT 1 2 3 4 D97IN595 8 7 6 5 FB COMP BOOT VCC SS_INH OSC OUT OUT N.C. N.C. Minidip SO16W PIN FUNCTIONS DIP 1 2 SO (*) 2 3 Name GND SS_INH Function Ground A logic signal (active low) disables the device (sleep mode operation). A capacitor connected between this pin and ground determines the soft start time. When this pin is grounded disables the device (driven by open collector/drain). An external resistor connected between the unregulated input voltage and this pin and a capacitor connected from this pin to ground fix the switching frequency. (Line feed forward is automatically obtained) Stepdown regulator output Unregulated DC input voltage A capacitor connected between this pin and OUT allows to drive the internal DMOS Transistor E/A output to be used for frequency compensation Stepdown feedback input. Connecting directly to this pin results in an output voltage of 3.3V. An external resistive divider is required for higher output voltages. 3 4 OSC 4 5 6 7 8 5, 6 11 12 13 14 OUT VCC BOOT COMP FB (*) Pins 1, 7, 8, 9, 10, 15 and 16 are not internally, electrically connected to the die. 2/12 L4971 THERMAL DATA Symbol R th(j-amb) Parameter Thermal Resistance Junction to ambient Max. Minidip 90 (*) SO16 110 (*) Unit C/W (*) Package mounted on board. ABSOLUTE MAXIMUM RATINGS Symbol Minidip V5 V4 I4 V6-V5 V6 V7 V2 V8 Ptot Tj,Tstg S016 V11 V5,V6 I5,I6 V12-V11 V12 V13 V3 V14 Bootstrap voltage Analogs input voltage (VCC = 24V) Analogs input voltage (VCC = 24V) (VCC = 20V) Power dissipation a Tamb 60C Junction and storage temperature Minidip SO16 Input voltage Output DC voltage Output peak voltage at t = 0.1s f=200KHz Maximum output current Parameter Value 58 -1 -5 int. limit. 14 70 12 13 6 -0.3 1 0.8 -40 to 150 V V V V V V W W C Unit V V V ELECTRICAL CHARACTERISTICS (Tj = 25C, Cosc = 2.7nF, Rosc = 20k, VCC = 24V, unless otherwise specified.) * Specification Refered to Tj from 0 to 125C Symbol Parameter Test Condition Min. Typ. Max. Unit DYNAMIC CHARACTERISTIC VI Vo Operating input voltage range Output voltage Vo = 3.3 to 50V; Io = 1.5A Io = 0.5A Io = 0.2 to 1.5A Vcc = 8 to 55V Vcc = 10V; Io = 1.5A Vcc = 8 to 55V Vo = 3.3V; Io = 1.5A Vi = Vcc+2VRMS; Vo = Vref; Io = 1.5A; f ripple = 100Hz Vcc = 8 to 55V Tj = 0 to 125C * 8 3.33 3.292 3.22 3.36 3.36 3.36 0.44 2.5 85 100 55 3.39 3.427 3.5 0.55 0.88 3 110 V V V V V V A % KHz dB % % * * * * Vd Il fs SVRR Dropout voltage Maximum limiting current Efficiency Switching frequency Supply voltage ripple rejection Voltage stability of switching frequency Temp. stability of switching frequency 2 90 60 3 4 6 Soft Start Soft start charge current Soft start discharge current 30 6 40 10 50 14 A A V A 3/12 Inhibit VLL IsLL Low level voltage Isource Low level * * 5 0.9 15 L4971 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Total operating quiescent current Quiescent current Total stand-by quiescent current Test Condition Min. Typ. 4 Duty Cycle = 0; VFB = 3.8V Vinh <0.9V Vcc = 55V; Vinh <0.9V 3.33 Vcc = 8 to 55V * VFB = 2.5V VFB = 3.8V Vcomp = 6V; V FB = 2.5V Vcomp = 6V; V FB = 3.8V Vcomp = Vfb; Vcc = 8 to 55V RL = Icomp = -0.1 to 0.1mA Vcomp = 6V 10.3 0.65 200 200 60 50 300 300 2 80 57 2.5 2.5 100 150 Max. 6 3.5 200 300 Unit mA mA A A V mV mV/C V V A A A dB dB ms DC Characteristics Iqop Iq Iqst-by Error Amplifier VFB RL Voltage Feedback Input Line regulation Ref. voltage stability vs temperature High level output voltage Low level output voltage Source output current Sink output current Source bias current Supply voltage ripple rejection DC open loop gain Transconductance 3.36 5 0.4 3.39 10 VoH VoL Io source Io sink Ib SVRR E/A gm 3 Oscillator Section Ramp Valley Ramp peak Maximum duty cycle Maximum Frequency Vcc = 8V Vcc = 55V Duty Cycle = 0% Rosc = 13k, Cosc = 820pF 0.78 2 9 95 0.85 2.15 9.6 97 0.92 2.3 10.2 500 V V V % kHz 4/12 L4971 Typical Performance (Using Evaluation Board) fsw = 100kHz Output Voltage 3.3V 5.1V 12V Output Ripple 10mV 10mV 12mV Efficiency VCC =35V IO = 1.5A 84 (%) 86 (%) 93 (%) Line Regulation Io = 1.5A VCC = 8 to 55V 3mV 3mV 3mV (VCC =15 to 55V) Load Regulation VCC =35V IO = 0.5 to 1.5A 6mV 6mV 4mV Figure 1. Test and valuation board circuit. Vi=8V to 55V 5 R1 20K 3 C1 220F 63V C7 220nF C2 2.7nF 2 7 8 L4971 4 1 6 L1 126H (77120) D1 GI SB360 C8 330F VO=3.3V/1.5A R3 C5 100nF R2 9.1K C4 22nF C6 100nF R4 D97IN749A C1=220F/63V EKE C2=2.7nF C5=100nF C6=100nF C7=220nF/63V C8=330F/35V CG Sanyo L1=126H KoolMu 77120 - 65 Turns - 0.5mm R1=20K R2=9.1K D1=GI SB360 L4971 VO(V) 3.3 5.1 12 15 18 24 R3(K) 0 2.7 12 16 20 30 4.7 4.7 4.7 4.7 4.7 R4(K) Figure 2. PCB and component layout of the figure 1. 5/12 L4971 Figure 3. Quiescent drain current vs. input voltage. Iq (mA) 200KHz R 1=22K C 2=1.2nF 100KHz R 1=20K C 2=2.7nF D97IN724 Figure 4. Quiescent current vs. junction temperature Iq (mA) 5 D97IN731 5 200KHz R1=22K C2=1.2nF 100KHz R1 =20K C2 =2.7nF 0Hz 4 4 3 0Hz 3 VCC=35V 0% DC 2 Tamb=25C 0% DC 2 1 0 5 10 15 20 25 30 35 40 45 50 Vcc(V) 1 -50 -30 -10 10 30 50 70 90 110 Tj(C) Figure 5. Stand-by drain current vs. input voltage Ibias (A) 150 140 130 120 110 100 90 80 70 60 Tj=125C Vss=GND Tj=25C D97IN732 Figure 6. Line Regulation VO (V) 3.377 Tj=125C D97IN733 3.376 3.375 Tj=25C 3.374 3.373 3.372 3.371 3.370 0 5 10 15 20 25 30 35 40 45 50 VCC(V) 0 5 10 15 20 25 30 35 40 45 50 VCC(V) Figure 7. Load regulation VO (V) 3.378 3.376 D97IN734 Figure 8. Switching frquency vs. R1 and C2 fsw (KHz) 500 0.8 D97IN784 V CC=35V Tamb=25C 3.374 Tj=25C 200 100 Tj=125C 2nF 1.2 nF 3.372 3.370 3.368 3.366 3.364 3.362 3.360 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A) 2.2 nF F 4.7n 5.6n F F 50 20 10 5 0 20 40 3.3n 60 80 R1(K) 6/12 L4971 Figure 9. Switching Frequency vs. input voltage. fsw (KHz) 107.5 105.0 102.5 100.0 97.5 95.0 92.5 90.0 0 5 10 15 20 25 30 35 40 45 50 VCC(V) Tj=25C D97IN735 Figure 10. Switching frequency vs. junction temperature. fsw (KHz) D97IN785 105 100 95 90 -50 0 50 100 Tj(C) Figure 11. Dropout voltage between pin 5 and 4. V (V) 0.5 0.4 Tj =2 D97IN736 Figure 12. Efficiency vs output voltage. (%) 96 94 100KHz D97IN737 Tj=125C 200KHz C 5 92 90 0.3 0.2 0.1 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A) Tj=-25C 88 86 84 82 0 5 10 15 20 VCC=35V IO=1.5A 25 VO(V) Figure 13. Efficiencyvs. output current. (%) 90 85 VCC=24V VCC=12V D97IN738 Figure 14. Efficiencyvs. output current. (%) 90 85 80 VCC =12V VCC=24V VCC=8V D97IN739 VCC=8V 80 75 70 65 60 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A) VCC=48V fsw=100KHz VO=5.1V 75 70 65 60 0 VCC=48V fsw=100KHz VO=3.36V 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A) 7/12 L4971 Figure 15. Efficiencyvs. output current. (%) 90 85 80 VCC=48V VCC=12V VCC=24V D97IN740 Figure 16. Efficiencyvs. output current. (%) 90 85 80 75 70 VCC=48V VCC=8V VCC=12V VCC=24V D97IN741 V CC=8V 75 70 65 60 fsw=200KHz VO=5.1V 65 60 fsw=200KHz VO=3.36V 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A) 55 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 IO(A) Figure 17. Efficiencyvs. Vcc. (%) V0=5 .1V-f SW=1 Figure 18. Power dissipation vs. Vcc. D97IN742 Pdiss (mW) VO=5.1V fsw=100KHz D97IN743 00KH z 85 V0 = 800 5.1 V-f SW = 20 0K 80 V0= V 0 =3 Hz 100 600 KHz IO=1.5A IO=1A 3.36 V- V-f SW = .36 fS 400 IO=0.5A W= 75 12 0 0K IO=1.5A Hz 200 70 0 10 20 30 40 50 VCC(V) 0 0 10 20 30 40 50 VCC(V) Figure 19. Efficiencyvs. Vo. Pdiss (mW) VCC=35V fsw=100KHz D97IN744 Figure 20. Pulse by pulse limiting current vs. junction temperature. Ilim (A) 2.9 2.8 2.7 fsw=100KHz VCC=35V D97IN747 800 IO=1.5A 600 IO=1A 400 2.6 2.5 2.4 IO=0.5A 200 0 0 5 10 15 20 25 30 V0(V) 2.3 -50 -25 0 25 50 75 100 125 Tj(C) 8/12 L4971 Figure 22. Line transient. VCC (V) 30 20 10 1 IO = 1A fsw = 100KHz Figure 21. Load transient. D97IN786 VO (mV) 100 0 -100 1ms/DIV 2 Figure 23. Soft start capacitor selection Vs inductor and Vccmax. L (H) fsw=100KHz D97IN745 Figure 24. Soft start capacitor selection vs. Inductor and Vccmax. L (H) D97IN746 680nF 470nF fsw=200KHz 56nF 400 330nF 300 47nF 300 200 200 220nF 33nF 22nF 100 100 100nF 0 15 20 25 30 35 40 45 50 VCCmax(V) 0 15 20 25 30 35 40 45 50 VCCmax(V) Figure 25. Open loop frequency and phase of error amplifier GAIN (dB) 50 GAIN D97IN787 Phase 0 -50 -100 Phase 0 45 90 135 -150 -200 10 10 2 103 104 105 106 10 7 108 f(Hz) 9/12 L4971 DIM. MIN. A a1 B b b1 D E e e3 e4 F I L Z 3.18 7.95 0.51 1.15 0.356 0.204 mm TYP. 3.32 0.020 1.65 0.55 0.304 10.92 9.75 2.54 7.62 7.62 6.6 5.08 3.81 1.52 0.125 0.313 0.045 0.014 0.008 MAX. MIN. inch TYP. 0.131 MAX. OUTLINE AND MECHANICAL DATA 0.065 0.022 0.012 0.430 0.384 0.100 0.300 0.300 0.260 0.200 0.150 0.060 Minidip 10/12 L4971 DIM. MIN. A A1 B C D E e H h L K 10 0.25 0.4 2.35 0.1 0.33 0.23 10.1 7.4 mm TYP. MAX. 2.65 0.3 0.51 0.32 10.5 7.6 1.27 10.65 0.75 1.27 0.394 0.010 0.016 MIN. 0.093 0.004 0.013 0.009 0.398 0.291 inch TYP. MAX. 0.104 0.012 0.020 0.013 0.413 0.299 0.050 0.419 0.030 0.050 OUTLINE AND MECHANICAL DATA 0 (min.)8 (max.) SO16 Wide L h x 45 A B e K H D A1 C 16 9 E 1 8 11/12 L4971 Information furnished is believed to be accurate and reliable. However, STMicroelectroni cs assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 12/12 |
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