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| a FEATURES Low Cost Single (AD8055) and Dual (AD8056) Easy to Use Voltage Feedback Architecture High Speed 300 MHz, -3 dB Bandwidth (G = +1) 1400 V/ s Slew Rate 20 ns Settling to 0.1% Low Distortion: -72 dBc @ 10 MHz Low Noise: 6 nV/Hz Low DC Errors: 5 mV Max VOS, 1.2 A Max IB Small Packaging AD8055 Available in SOT-23-5 AD8056 Available in 8-Lead microSOIC Excellent Video Specifications (RL = 150 , G = +2) Gain Flatness 0.1 dB to 40 MHz 0.01% Differential Gain Error 0.02 Differential Phase Error Drives Four Video Loads (37.5 ) with 0.02% and 0.1 Differential Gain and Differential Phase Low Power, 5 V Supplies 5 mA Typ/Amplifier Power Supply Current High Output Drive Current: Over 60 mA APPLICATIONS Imaging Photodiode Preamp Video Line Driver Differential Line Driver Professional Cameras Video Switchers Special Effects A-to-D Driver Active Filters Low Cost, 300 MHz Voltage Feedback Amplifiers AD8055/AD8056 FUNCTIONAL BLOCK DIAGRAMS N-8 and SO-8 NC 1 -IN 2 +IN 3 -VS 4 (Not to Scale) SOT-23-5 (RT) AD8055 VOUT 1 -VS 2 +IN 3 (Not to Scale) AD8055 8 NC 7 +VS 6 VOUT 5 NC 5 +VS 4 -IN NC = NO CONNECT N-8, SO-8, microSOIC (RM) AD8056 OUT1 1 -IN1 2 +IN1 3 -VS 4 (Not to Scale) 8 +VS 7 OUT 6 -IN2 5 +IN2 The AD8055 and AD8056 require only 5 mA typ/amplifier of supply current and operate on dual 5 V or single +12 V power supply, while being capable of delivering over 60 mA of load current. All this is offered in a small 8-lead plastic DIP, 8-lead SOIC packages, 5-lead SOT-23-5 package (AD8055) and an 8-lead microSOIC package (AD8056). These features make the AD8055/AD8056 ideal for portable and battery powered applications where size and power are critical. These amplifiers are available in the industrial temperature range of -40C to +85C. 5 4 3 2 RC VIN 50 RL VOUT VOUT = 100mV p-p RL = 100 G = +1 RF = 0 RC = 100 RS RF PRODUCT DESCRIPTION The AD8055 (single) and AD8056 (dual) voltage feedback amplifiers offer bandwidth and slew rate typically found in current feedback amplifiers. Additionally, these amplifiers are easy to use and available at a very low cost. Despite their low cost, the AD8055 and AD8056 provide excellent overall performance. For video applications, their differential gain and phase error are 0.01% and 0.02 into a 150 load, and 0.02% and 0.1 while driving four video loads (37.5 ). Their 0.1 dB flatness out to 40 MHz, wide bandwidth out to 300 MHz, along with 1400 V/s slew rate and 20 ns settling time, make them useful for a variety of high speed applications. GAIN - dB 1 0 -1 -2 -3 -4 -5 0.3M 1M G = +10 RF = 909 G = +5 RF = 1000 10M 100M FREQUENCY - Hz G = +2 RF = 402 1G Figure 1. Frequency Response REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2000 +25 C, = 65 AD8055/AD8056-SPECIFICATIONS (@ T =otherwiseV noted)V, R = 402 unless A S F , RL = 100 , Gain = +2, Model Conditions DYNAMIC PERFORMANCE -3 dB Bandwidth G = +1, VO = 0.1 V p-p G = +1, VO = 2 V p-p G = +2, VO = 0.1 V p-p G = +2, VO = 2 V p-p VO = 100 mV p-p G = +1, VO = 4 V Step G = +2, VO = 4 V Step G = +2, VO = 2 V Step G = +1, VO = 0.5 V Step G = +1, VO = 4 V Step G = +2, VO = 0.5 V Step G = +2, VO = 4 V Step fC = 10 MHz, VO = 2 V p-p, RL = 1 k fC = 20 MHz, VO = 2 V p-p, RL = 1 k f = 5 MHz, G = +2 f = 100 kHz f = 100 kHz NTSC, G = +2, RL = 150 NTSC, G = +2, RL = 37.5 NTSC, G = +2, RL = 150 NTSC, G = +2, RL = 37.5 AD8055A/AD8056A Min Typ Max 220 125 120 125 25 1000 750 300 150 160 150 40 1400 840 20 2 2.7 2.8 4 -72 -57 -60 6 1 0.01 0.02 0.02 0.1 3 5 10 1.2 Unit MHz MHz MHz MHz MHz V/s V/s ns ns ns ns ns dBc dBc dB nV/Hz pA/Hz % % Degree Degree mV mV V/C A A dB dB M pF V dB V mA mA Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% Rise and Fall Time, 10% to 90% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Crosstalk, Output to Output (AD8056) Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage TMIN -TMAX Offset Drift Input Bias Current Open Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Output Current1 Short Circuit Current1 POWER SUPPLY Operating Range Quiescent Current TMIN -TMAX VO = 2.5 V TMIN -TMAX 66 64 6 0.4 1 71 VCM = 2.5 V RL = 150 VO = 2.0 V 2.9 55 10 2 3.2 82 3.1 60 110 5.0 5.4 10 66 69 -40 72 86 +85 6.0 6.5 7.3 12 13.3 4.0 AD8055 TMIN -TMAX AD8056 TMIN -TMAX +VS = +5 V to +6 V, -VS = -5 V -VS = -5 V to -6 V, +VS = +5 V Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE V mA mA mA mA dB dB C NOTES 1 Output current is limited by the maximum power dissipation in the package. See the power derating curves. Specifications subject to change without notice. -2- REV. B AD8055/AD8056 ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION - Watts Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2 V Internal Power Dissipation2 Plastic DIP Package (N) . . . . . . . . . . . . . . . . . . . . . . 1.3 W Small Outline Package (R) . . . . . . . . . . . . . . . . . . . . . 0.8 W SOT-23-5 Package (RT) . . . . . . . . . . . . . . . . . . . . . . 0.5 W microSOIC Package (RM) . . . . . . . . . . . . . . . . . . . . . 0.6 W Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . 2.5 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range N, R . . . . . . . . -65C to +125C Operating Temperature Range (A Grade) . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . +300C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Lead Plastic DIP Package: JA = 90C/W 8-Lead SOIC Package: JA = 155C/W 5-Lead SOT-23-5 Package: JA = 240C/W 8-Lead microSOIC Package: JA = 200C/W of the plastic, approximately +150C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of +175C for an extended period can result in device failure. While the AD8055/AD8056 are internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (+150C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves. 2.0 8-LEAD PLASTIC DIP PACKAGE 1.5 8-LEAD SOIC PACKAGE TJ = +150 C 1.0 0.5 SOIC SOT-23-5 MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the AD8055/ AD8056 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature 0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE - C Figure 2. Plot of Maximum Power Dissipation vs. Temperature for AD8055/AD8056 ORDERING GUIDE Model AD8055AN AD8055AR AD8055AR-REEL AD8055AR-REEL7 AD8055ART-REEL AD8055ART-REEL7 AD8056AN AD8056AR AD8056AR-REEL AD8056AR-REEL7 AD8056ARM AD8056ARM-REEL AD8056ARM-REEL7 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Description Plastic DIP Small Outline Package (SOIC) 13" Tape and Reel 7" Tape and Reel 13" Tape and Reel 7" Tape and Reel Plastic DIP Small Outline Package (SOIC) 13" Tape and Reel 7" Tape and Reel microSOIC 13" Tape and Reel 7" Tape and Reel Package Option N-8 SO-8 SO-8 SO-8 RT-5 RT-5 N-8 SO-8 SO-8 SO-8 RM-8 RM-8 RM-8 Brand Code H3A H3A H5A H5A H5A CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8055/AD8056 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE REV. B -3- AD8055/AD8056-Typical Performance Characteristics 402 +VS 4.7 F 0.01 F 0.001 F +VS 4.7 F 0.01 F 0.001 F HP8130A PULSE GENERATOR TR /TF = 1ns VIN 50 100 3 7 AD8055 2 4 6 VOUT 100 HP8130A PULSE GENERATOR TR/TF = 0.67ns VIN 57 402 2 7 AD8055 3 4 6 VOUT 4.7 F 0.01 F 0.001 F 4.7 F 0.01 F 0.001 F 100 -VS -VS Figure 3. Test Circuit, G = +1, RL = 100 Figure 6. Test Circuit, G = -1, RL = 100 Figure 4. Small Step Response, G = +1 Figure 7. Small Step Response, G = -1 Figure 5. Large Step Response, G = +1 Figure 8. Large Step Response, G = -1 -4- REV. B AD8055/AD8056 5 4 3 2 GAIN - dB RS RF RL VIN 50 RC VOUT -50 VOUT = 100mV p-p RL = 100 G = +2 RF = 402 G = +1 RF = 0 RC = 100 HARMONIC DISTORTION - dBc -60 VOUT = 2V p-p G = +2 RL = 100 2ND 1 0 -1 -2 -3 -4 -5 0.3M 1M G = +10 RF = 909 G = +5 RF = 1000 10M 100M FREQUENCY - Hz -70 -80 3RD -90 1G -100 10k 100k 1M FREQUENCY - Hz 10M 100M Figure 9. Small Signal Frequency Response, G = +1, G = +2, G = +5, G = +10 Figure 12. Distortion vs. Frequency 5 4 3 2 VOUT = 2V p-p RL = 100 -50 VOUT = 2V p-p G = +2 RL = 1k -60 GAIN - dB 1 0 -1 -2 -3 -4 -5 0.3M 1M G = +10 RF = 909 G = +5 RF = 1000 10M 100M FREQUENCY - Hz G = +2 RF = 402 G = +1 RF = 0 DISTORTION - dBc -70 -80 2ND -90 3RD 1G -100 10k 100k 1M FREQUENCY - Hz 10M 100M Figure 10. Large Signal Frequency Response, G = +1, G = +2, G = +5, G = +10 Figure 13. Distortion vs. Frequency 0.5 0.4 0.3 0.2 OUTPUT - dB -40 VOUT = 100mV G = +2 RL = 100 RF = 402 DISTORTION - dBc -50 G = +2 RL = 1k 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0.3M -60 2ND -70 -80 3RD -90 1M 10M 100M FREQUENCY - Hz 1G 0 0.4 0.8 1.2 1.6 2.0 2.4 VOUT - V p-p 2.8 3.2 3.6 4.0 Figure 11. 0.1 dB Flatness Figure 14. Distortion vs. VOUT @ 20 MHz REV. B -5- AD8055/AD8056 10 9 RISETIME AND FALLTIME - ns 10 G = +1 R L = 100 RF = 0 9 RISETIME AND FALLTIME - ns 8 7 6 5 8 7 6 5 4 3 2 1 G = +2 RL = 100 RF = 402 FALLTIME 4 3 2 1 0 0 0.5 1.0 1.5 RISETIME RISETIME FALLTIME 2.0 2.5 3.0 VIN - V p-p 3.5 4.0 4.5 5.0 0 0 0.2 0.4 0.6 0.8 1.0 VIN - V p-p 1.2 1.4 1.6 Figure 15. Risetime and Falltime vs. VIN Figure 18. Risetime and Falltime vs. VIN 10 9 RISETIME AND FALLTIME - ns 5.0 RISETIME AND FALLTIME - ns 8 7 6 5 4 G = +1 R L = 1k RF = 0 4.5 4.0 3.5 G = +2 RL = 1k RF = 402 RISETIME 3.0 2.5 2.0 FALLTIME 1.5 1.0 0.5 FALLTIME 3 2 RISETIME 1 0 0 0.5 1.0 1.5 2.0 2.5 3.0 VIN - V p-p 3.5 4.0 4.5 5.0 0 0 0.2 0.4 0.6 0.8 1.0 VIN - V p-p 1.2 1.4 1.6 Figure 16. Risetime and Falltime vs. VIN Figure 19. Risetime and Falltime vs. VIN 0.7 0.6 0.5 0.4 V OUT = 0V TO 2V OR 0V TO -2V G = +2 R L = 100 10 0 -10 -20 G = +2 RF = 402 SETTLING TIME - % 0.3 PSRR - dB 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0 10 20 30 TIME - ns 40 50 60 -30 -40 -50 -60 -70 -80 -90 0.1 -PSRR +PSRR 1 10 FREQUENCY - MHz 100 500 Figure 17. Settling Time Figure 20. PSRR vs. Frequency -6- REV. B AD8055/AD8056 Figure 21. Overload Recovery Figure 24. Overload Recovery -20 -30 -40 CROSSTALK - dB 90 OPEN LOOP GAIN - dB VIN = 0dBm G = +2 RL = 100 RF = 402 80 RL = 100 70 60 50 40 30 20 10 0 -50 -60 -70 -80 -90 SIDE 1 DRIVEN SIDE 2 DRIVEN -100 -110 -120 0.1 1 10 FREQUENCY - MHz 100 200 -10 0.01 0.1 1 10 FREQUENCY - MHz 100 500 Figure 22. Crosstalk (Output-to-Output) vs. Frequency Figure 25. Open Loop Gain vs. Frequency 0 -10 -20 -30 CMRR - dB 45 402 402 58 402 50 PHASE - Degrees 0 RL = 100 402 -40 -50 -60 -70 -80 -90 -45 -90 -135 -100 0.1 1 10 FREQUENCY - MHz 100 500 -180 0.01 0.1 1 10 FREQUENCY - MHz 100 500 Figure 23. CMRR vs. Frequency Figure 26. Phase vs. Frequency REV. B -7- AD8055/AD8056 DIFFERENTIAL PHASE - DIFFERENTIAL GAIN - % Degrees 0.04 1 BACK TERMINATED LOAD (150 ) 0.02 1000 -0.02 G = +2 RF = 402 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH IRE 1 BACK TERMINATED LOAD (150 ) VOLTAGE NOISE - nV Hz 0.00 100 -0.04 0.04 0.02 0.00 -0.02 -0.04 6nV/ Hz 10 G = +2 RF = 402 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH IRE 1 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M 15M Figure 27. Differential Gain and Differential Phase Figure 30. Voltage Noise vs. Frequency DIFFERENTIAL GAIN - % 0.04 4 VIDEO LOADS (37.5 ) 0.02 100 -0.02 -0.04 0.15 0.10 0.05 0.00 -0.05 -0.10 -0.15 G = +2 RF = 402 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH IRE 4 VIDEO LOADS (37.5 ) VOLTAGE NOISE - pA Hz 0.00 10 DIFFERENTIAL PHASE - Degrees 1 G = +2 RF = 402 1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH IRE 0.1 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M 15M Figure 28. Differential Gain and Differential Phase Figure 31. Current Noise vs. Frequency 5.0 4.5 4.0 3.5 RL = 1k VS = 5V 45 40 35 30 25 G = +2 RF = 402 VOUT - Volts 3.0 | ZOUT | - 2.5 2.0 1.5 1.0 0.5 0 -55 -35 -15 RL = 150 20 15 10 5 0 RL = 50 25 45 65 5 TEMPERATURE - C 85 105 125 -5 0.01 0.1 1 10 FREQUENCY - MHz 100 500 Figure 29. Output Swing vs. Temperature Figure 32. Output Impedance vs. Frequency -8- REV. B AD8055/AD8056 APPLICATIONS Four-Line Video Driver The AD8055 is a useful low cost circuit for driving up to four video lines. For such an application, the amplifier is configured for a noninverting gain of 2 as shown in Figure 33. The input video source is terminated in 75 and applied to the high impedance noninverting input. Each output cable is connected to the op amp output via a 75 series back termination resistor for proper cable termination. The terminating resistors at the other ends of the lines will divide the output signal by two, which is compensated for by the gain-of-two of the op amp stage. For a single load, the differential gain error of this circuit was measured to be 0.01%, with a differential phase error of 0.02 degrees. The two load measurements were 0.02% and 0.03 degrees, respectively. For four loads, the differential gain error is 0.02%, while the differential phase increases to 0.1 degrees. 75 +5V 402 75 VOUT2 75 6 The gain of this circuit from the input to Amp 1 output is RF/RI, while the gain to the output of Amp 2 is -RF/RI. The circuit thus creates a balanced differential output signal from a singleended input. The advantage of this circuit is that the gain can be changed by changing a single resistor and still maintain the balanced differential outputs. RF 402 +5V 0.1 F 3 8 RI 402 VIN 10 F 49.9 AMP1 2 1 +VOUT 402 402 AD8056 402 402 VOUT1 75 6 49.9 AMP2 7 -VOUT 402 2 7 0.1 F 10 F 5 4 75 0.1 F -5V 10 F AD8055 VIN 75 3 4 75 0.1 F 10 F VOUT3 75 75 VOUT4 75 Figure 34. Single-Ended to Differential Line Driver Low Noise, Low Power Preamp -5V Figure 33. Four-Line Video Driver Single-Ended to Differential Line Driver The AD8055 makes a good low cost, low noise, low power preamp. A gain of 10 preamp can be made with a feedback resistor of 909 ohms and a gain resistor of 100 ohms as shown in Figure 35. The circuit has a -3 dB bandwidth of 20 MHz. 909 +5V + 10 F VOUT Creating differential signals from single-ended signals is required for driving balanced, twisted pair cables, differential input A/D converters and other applications that require differential signals. This is sometimes accomplished by using an inverting and a noninverting amplifier stage to create the complementary signals. The circuit shown in Figure 34 shows how an AD8056 can be used to make a single-ended to differential converter that offers some advantages over the architecture mentioned above. Each op amp is configured for unity gain by the feedback resistors from the outputs to the inverting inputs. In addition, each output drives the opposite op amp with a gain of -1 by means of the crossed resistors. The result of this is that the outputs are complementary and there is high gain in the overall configuration. Feedback techniques similar to a conventional op amp are used to control the gain of the circuit. From the noninverting input of Amp 1 to the output of Amp 2, is an inverting gain. Between these points a feedback resistor can be used to close the loop. As in the case of a conventional op amp inverting gain stage, an input resistor is added to vary the gain. RS 100 2 7 0.1 F AD8055 3 4 6 0.1 F -5V 10 F Figure 35. Low Noise, Low Power Preamp with G = 10 and BW = 20 MHz With a low source resistance ( -9- AD8055/AD8056 Power Dissipation Limits 5 4 402 402 NORMALIZED GAIN - dB With a 10 V supply (total VCC - VEE), the quiescent power dissipation of the AD8055 in the SOT-23-5 package is 65 mW, while the quiescent power dissipation of the AD8056 in the microSOIC is 120 mW. This translates into a 15.6C rise above the ambient for the SOT-23-5 package and a 24C rise for the microSOIC package. The power dissipated under heavy load conditions is approximately equal to the supply voltage minus the output voltage, times the load current, plus the quiescent power computed above. This total power dissipation is then multiplied by the thermal resistance of the package to find the temperature rise, above ambient, of the part. The junction temperature should be kept below 150C. The AD8055 in the SOT-23-5 package can dissipate 270 mW while the AD8056 in the microSOIC package can dissipate 325 mW (at 85C ambient) without exceeding the maximum die temperature. In the case of the AD8056, this is greater than 1.5 V rms into 50 , enough to accommodate a 4 V p-p sine-wave signal on both outputs simultaneously. But since each output of the AD8055 or AD8056 is capable of supplying as much as 110 mA into a short circuit, a continuous short circuit condition will exceed the maximum safe junction temperature. Resistor Selection 3 2 1 0 -1 -2 -3 -4 -5 0.3 1 10 FREQUENCY - MHz 100 CL = 20pF CL = 10pF CL = 0pF VIN = 0dBm 50 CL 100 CL = 30pF 500 Figure 36. Capacitive Load Drive In general, to minimize peaking or to ensure the stability for larger values of capacitive loads, a small series resistor, RS, can be added between the op amp output and the capacitor, CL. For the setup depicted in Figure 37, the relationship between RS and CL was empirically derived and is shown in Figure 38. RS was chosen to produce less than 1 dB of peaking in the frequency response. Note also that after a sharp rise RS quickly settles to about 25 . 402 +5V The following table is provided as a guide to resistor selection for maintaining gain flatness vs. frequency for various values of gain. -3 dB Bandwidth (MHz) 300 160 45 20 VIN = 0dBm 50 402 2 0.1 F 7 10 F RS FET PROBE VOUT CL Gain +1 +2 +5 +10 RF ( ) 0 402 1k 909 RI ( ) -- 402 249 100 AD8055 3 4 6 0.1 F -5V 10 F Figure 37. Setup for RS vs. CL Driving Capacitive Loads When driving a capacitive load, most op amps will exhibit peaking in the frequency response just before the frequency rolls off. Figure 36 shows the responses for an AD8056 running at a gain of +2, with a 100 load that is shunted by various values of capacitance. It can be seen that under these conditions, the part is still stable with capacitive loads of up to 30 pF. RS - 40 35 30 25 20 15 10 5 0 0 10 20 30 40 CL - pF 50 60 270 Figure 38. RS vs. CL -10- REV. B AD8055/AD8056 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) 0.430 (10.92) 0.348 (8.84) 8 5 8-Lead microSOIC Package (RM-8) 0.122 (3.10) 0.114 (2.90) 0.280 (7.11) 0.240 (6.10) 1 4 8 5 0.122 (3.10) 0.114 (2.90) 0.325 (8.25) 0.300 (7.62) 1 4 0.199 (5.05) 0.187 (4.75) PIN 1 0.100 (2.54) BSC 0.210 (5.33) MAX 0.160 (4.06) 0.115 (2.93) 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) MIN 0.195 (4.95) 0.115 (2.93) PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 0.120 (3.05) 0.112 (2.84) 33 27 0.022 (0.558) 0.070 (1.77) SEATING 0.014 (0.356) 0.045 (1.15) PLANE 0.015 (0.381) 0.008 (0.204) 0.028 (0.71) 0.016 (0.41) 8-Lead Small Outline SOIC (SO-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 4 5-Lead Plastic Surface Mount (RT-5) 0.1220 (3.100) 0.1063 (2.700) 0.1574 (4.00) 0.1497 (3.80) PIN 1 1 0.2440 (6.20) 0.2284 (5.80) 0.0709 (1.800) 0.0590 (1.500) PIN 1 5 1 2 4 3 0.1181 (3.000) 0.0984 (2.500) 0.0500 (1.27) BSC 0.0098 (0.25) 0.0040 (0.10) SEATING PLANE 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 8 0.0098 (0.25) 0 0.0075 (0.19) 0.0196 (0.50) 0.0099 (0.25) 45 0.0748 (1.900) REF 0.0374 (0.950) REF 0.0500 (1.27) 0.0160 (0.41) 0.0512 (1.300) 0.0354 (0.900) 0.0059 (0.150) 0.0000 (0.000) 0.0571 (1.450) 0.0354 (0.900) 0.0197 (0.500) SEATING PLANE 0.0118 (0.300) 10 0 0.0079 (0.200) 0.0035 (0.090) 0.0236 (0.600) 0.0039 (0.100) REV. B -11- PRINTED IN U.S.A. C3045a-0-6/00 (rev. B) 01063 |
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