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| IDT74LVC07A 3.3V CMOS HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS AND 5 VOLT TOLERANT I/O * 0.5 MICRON CMOS Technology * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range * VCC = 2.7V to 3.6V, Extended Range * CMOS power levels (0.4 W typ. static) * Rail-to-Rail output swing for increased noise margin * All inputs, outputs, and I/Os are 5V tolerant * Supports hot insertion * Available in SOIC, SSOP, and TSSOP packages IDT74LVC07A FEATURES: DESCRIPTION: This hex buffer/driver is built using advanced dual metal CMOS technology. The outputs of the LVC07A device are open-drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24mA. The LVC07A has been designed with a +24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. Inputs can be driven from either 2.5V, 3.3V (LVTTL), or 5V (CMOS) devices. This feature allows the use of this device as a translator in a mixedsystem environment. DRIVE FEATURES: * High Output Drivers: 24mA * Reduced system switching noise APPLICATIONS: * 5V and 3.3V mixed voltage systems * Data communication and telecommunication systems FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION 1A 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 6A 6Y 5A 5Y 4A 4Y A 1Y Y 2A 2Y 3A 3Y GND SOIC/ SSOP/ TSSOP TOP VIEW PIN DESCRIPTION Pin Names xA xY Data Inputs Data Outputs Description FUNCTION TABLE (EACH BUFFER/DRIVER)(1) Inputs xA H L NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level Outputs (with pull-up) xY H L The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 1 (c)2000 Integrated Device Technology, Inc. JULY 2000 DSC-4723/1 IDT74LVC07A 3.3V CMOS HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS INDUSTRIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM TSTG IOUT IIK IOK ICC ISS Description Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VO < 0 Continuous Current through each VCC or GND Max -0.5 to +6.5 -65 to +150 -50 to +50 -50 100 Unit V C mA mA mA CAPACITANCE (TA = +25C, F = 1.0MHz) Symbol CIN COUT CI/O Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 4.5 5.5 6.5 Max. 6 8 8 Unit pF pF pF NOTE: 1. As applicable to the device type. NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = -40C to +85C Symbol VIH Parameter VCC = 2.3V to 2.7V Input HIGH Voltage Level VCC = 2.7V to 3.6V VCC = 4.5V to 5.5V VCC = 2.3V to 2.7V VIL IIH IIL IOZH IOZL IOFF VIK VH ICCL ICCH ICCZ ICC High Impedance Output Current (3-State Output pins) Input/Output Power Off Leakage Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 0V, VIN or VO 5.5V VCC = 2.3V, IIN = -18mA VCC = 3.3V VCC = 3.6V, VIN = GND or VCC -- -- -- -- -- -0.7 100 -- 50 -1.2 -- 10 A V mV A VCC = 3.6V VO = 0 to 5.5V -- -- 10 A Input LOW Voltage Level Input Leakage Current VCC = 2.7V to 3.6V VCC = 4.5V to 5.5V VCC = 3.6V VI = 0 to 5.5V Test Conditions Min. 1.7 2 0.7 x VCC -- -- -- -- Typ.(1) -- -- -- -- -- -- -- Max. -- -- -- 0.7 0.8 0.3 x VCC 5 A V Unit V Quiescent Power Supply Current Variation One input at VCC - 0.6V, other inputs at VCC or GND -- -- 500 A NOTE: 1. Typical values are at VCC = 3.3V, +25C ambient. 2 IDT74LVC07A 3.3V CMOS HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS INDUSTRIAL TEMPERATURE RANGE OUTPUT DRIVE CHARACTERISTICS Symbol VOL Parameter Output LOW Voltage VCC = 2.3V VCC = 2.7V VCC = 3V Test Conditions(1) VCC = 2.3V to 3.6V IOL = 0.1mA IOL = 6mA IOL = 12mA IOL = 12mA IOL = 24mA Min. -- -- -- -- -- Max. 0.2 0.4 0.7 0.4 0.55 Unit V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C. OPERATING CHARACTERISTICS, TA = 25C VCC = 2.5V0.2V Symbol CPD Parameter Power Dissipation Capacitance per Buffer/Driver Test Conditions CL = 0pF, f = 10Mhz Typical 2.5 VCC = 3.3V0.3V Typical 4 VCC = 5V0.5V Typical 7 Unit pF SWITCHING CHARACTERISTICS(1) VCC = 2.5V0.2V Symbol tPZL tPLZ tSK(o) Output Skew(2) -- -- -- -- -- -- -- 500 ps NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = - 40C to + 85C. 2 Skew between any two outputs of the same package and switching in the same direction. VCC = 2.7V Min. 1 Max. 3.3 VCC = 3.3V 0.3V Min. 1 Max. 2.9 VCC = 5V0.5V Min. 1 Max. 2.6 Unit ns Parameter xA to xY Min. 1 Max. 2.8 3 IDT74LVC07A 3.3V CMOS HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS Symbol VLOAD VIH VT VLZ VHZ CL VCC(1) = 2.5V0.2V 2 x Vcc Vcc Vcc / 2 150 150 30 VCC(2) =3.3V0.3V & 2.7V 6 2.7 1.5 300 300 50 VCC(2) = 5V0.5V 2 x Vcc 3 1.5 200 200 50 V V V mV mV pF Unit SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL VIH VT 0V VOH VT VOL VIH VT 0V Propagation Delay LVC QUAD Link VCC 500 Pulse Generator (1, 2) VLOAD Open GND ENABLE CONTROL INPUT tPZL OUTPUT SWITCH NORMALLY CLOSED LOW tPZH OUTPUT SWITCH NORMALLY OPEN HIGH VLOAD/2 VT tPHZ VT 0V tPLZ DISABLE VIH VT 0V VLOAD/2 VLZ VOL VOH VHZ 0V LVC QUAD Link VIN D.U.T. RT VOUT 500 CL LVC QUAD Link Test Circuit for All Outputs DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 10MHz; tF 2ns; tR 2ns. 2. Pulse Generator for All Pulses: Rate 10MHz; tF 2.5ns; tR 2.5ns. NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. Enable and Disable Times SWITCH POSITION Test tPZL tPLZ tPHZ tPZH Switch VLOAD DATA INPUT TIMING INPUT SYNCHRONOUS CONTROL ASYNCHRONOUS CONTROL tSU tH tREM INPUT tPLH1 tPHL1 VIH VT 0V VOH VT VOL VOH VT VOL tSU tH VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V LVC QUAD Link Set-up, Hold, and Release Times LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE VT LVC QUAD Link OUTPUT 1 tSK (x) tSK (x) VT OUTPUT 2 tPLH2 tPHL2 tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1 LVC QUAD Link NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. Output Skew - tSK(X) Pulse Width 4 IDT74LVC07A 3.3V CMOS HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION XX LVC XXX XX IDT Temp. Range Device Type Package DC PY PG 07A 74 Small Outline IC Shrink Small Outline Package Thin Shrink Small Outline Package Hex Buffer/Driver with Open Drain Outputs, +24mA - 40C to +85C CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com for Tech Support: logichelp@idt.com (408) 654-6459 5 |
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