| PART |
Description |
Maker |
| LTC242409 LTC2424CG LTC2428IGTRPBF |
4-/8-Channel 20-Bit mPower No Latency DSTM ADCs
4-/8-Channel 20-Bit µPower No Latency Delta-Sigma ADC; Package: SSOP; No of Pins: 28; Temperature Range: -40°C to 85°C 8-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
|
Linear Technology, Corp.
|
| CY7C1241V18-300BZXC CY7C1256V18 CY7C1256V18-300BZC |
36-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
36-Mbit QDR??II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
36-Mbit QDR?II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor
|
| 89HPES34H16G2 |
Low latency cut-through architecture
|
Integrated Device Techn...
|
| 89HPES32NT8BG2 |
Low latency cut-through architecture
|
Integrated Device Techn...
|
| 89HPES12NT12G2 |
Low latency cut-through architecture
|
Integrated Device Techn...
|
| LTC2414IGN LTC2414CGN LTC2418CGN LTC2418IGN LTC241 |
8-/16-Channel 24-Bit No Latency TM ADCs
|
LINER[Linear Technology]
|
| CY7C1250V18-300BZI CY7C1246V18-333BZI CY7C1246V18- |
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的DDR - II SRAM2字突发架构（2.0周期读写延迟
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 1M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| LTC2411 2411I |
24 Bit No Latency ADC
From old datasheet system
|
Linear
|
| MT49H16M18C MT49H32M9C MT49H16M18CFM-XX MT49H32M9C |
288Mb SIO REDUCED LATENCY(RLDRAM II)
|
Micron Technology, Inc.
|
| LTC2433-1IMS |
Differential Input 16-Bit No Latency DS ADC 差分输入16位ADC的无延迟局副局
|
Linear Integrated System, Inc
|
