PART |
Description |
Maker |
LTC2430 LTC2431 LTC2431CMS LTC2430CGN LTC2431IMS L |
20-Bit No Latency Delta-Sigma ADCs with Differential Input and Differential Reference 20-Bit No Latency Delta Sigma with Differential Input, 50/60Hz Rejection, SSOP-16 20-Bit No Latency Delta Sigma with Differential Input, 50/60Hz Rejection, MS10
|
LINER[Linear Technology]
|
CY7C1145V18-300BZXC CY7C1156V18-300BZXC CY7C1141V1 |
18-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 18-Mbit QDR?II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor
|
MT49H8M36 MT49H16M18 MT49H32M9 |
288Mb CIO Reduced Latency
|
MICRON[Micron Technology]
|
89HPES32H8G2 |
Low latency cut-through architecture
|
Integrated Device Techn...
|
CY7C1250V18-300BZI CY7C1246V18-333BZI CY7C1246V18- |
36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的DDR - II SRAM2字突发架构(2.0周期读写延迟 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 1M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|
LTC2411 2411I |
24 Bit No Latency ADC From old datasheet system
|
Linear
|
89HPES22H16 |
Low-latency cut-through switch architecture
|
Integrated Device Techn...
|
LTC2408CG LTC2408IG LTC2408C LTC2408I LTC2404 LTC2 |
4-/8-Channel 24-Bit uPower No Latency ADCs
|
LINER[Linear Technology]
|
LTC242009 LTC2420IS8 |
20-Bit mPower No Latency DSTM ADC in SO-8
|
Linear Technology
|
LT1236A-5 |
2-Channel Differential Input 16-Bit No Latency DS ADC
|
Linear Technology
|
LTC2433-1IMS |
Differential Input 16-Bit No Latency DS ADC 差分输入16位ADC的无延迟局副局
|
Linear Integrated System, Inc
|