| PART |
Description |
Maker |
| HDMP-1638 |
Gigabit Ethernet Transceiver Chip with Dual Serial I/O and Differential PECL Clock Inputs(带双路串行I/O和差分PECL时钟输入的千兆位以太网收发器)
HDMP-1638 · 1.25 GBd Transceiver Chip with Dual Serial I/O and Differential PECL Clock Inputs for GbE
|
Agilent (Hewlett-Packard)
|
| EDJ2116EEBG-JS-F EDJ2108EEBG-JS-F EDJ2116EEBG-GN-F |
Differential clock inputs
2G bits DDR3L SDRAM
|
Elpida Memory
|
| SSTL16877 SSTL16877DGG |
14-bit SSTL_2 registered driver with differential clock inputs
|
NXP Semiconductors
PHILIPS[Philips Semiconductors]
|
| MAX9317-BMAX9317C |
Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs
|
Maxim Integrated Products
|
| AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN |
3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
Triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL Translator
AC Characteristics of ECL Devices
|
Motorola
ONSEMI[ON Semiconductor]
|
| CAT33C108SI CAT33C108SI-TE13 CAT33C108K-TE13 CAT33 |
Clock Generator for Intel® Alviso Chipset
200-MHz Differential Clock Buffer/Driver 微型导线串行EEPROM
Clock Synthesizer with Differential CPU Outputs 微型导线串行EEPROM
Clock Generator for Intel® Alviso Chipset
Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems
|
Abracon, Corp.
|
| PI6C4853111FAE PI6C4853111 PI6C4853111FAEX |
6C SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
2.5V/3.3V 500MHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer with 2 to 1 Differential Clock Input Mux
|
Pericom Semiconductor Corporation
|
| ICS9DB202 ICS9DB202CF ICS9DB202CFLF ICS9DB202CFLFT |
From old datasheet system
Two 0.7V current mode differential HCSL output pairs, 1 differential clock input
|
http://
ICST[Integrated Circuit Systems]
|
| NB4N111K |
3.3V Differential In 1:10 Differential Fanout Clock Driver
|
ON Semiconductor
|
| TC811CPL TC811CKW TC811 |
3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS
|
TELCOM[TelCom Semiconductor, Inc]
TELCOM[TelCom Semiconductor Inc]
|
| MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR
3.3V / 5VECL 8-Bit Serial/Parallel Converter
Dual Binary 1-4-Decoder (High)
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
9-Bit TTL-ECL Translator
Quad TTL-ECL Translator
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
5V ECL Voltage Controlled Oscillator
3.3V ECL D-Type Flip-Flop with Set and Reset
Binary to 1-8 Decoder (Low)
Differential -5V ECL To TTL Translator
-3.3V / -5V Triple ECL Input to PECL Output Translator
5V ECL Dual Differential 2:1 Multiplexer
Quad MSTR
5V ECL Quad 4-Input OR/NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
