| PART |
Description |
Maker |
| ASM5I9653AG-32-LR ASM5I9653A ASM5I9653A-32-ER ASM5 |
3.3V 1:8 LVCMOS PLL Clock Generator 3.3 1:8的LVCMOS PLL时钟发生
3.3V 1:8 LVCMOS PLL Clock Generator 9653 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
|
| CY2SSTV857LFI-32 CY2SSTV857LFI-32T CY2SSTV857LFC-3 |
SSTV SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC40
SSTV SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 0.240 INCH, MO-153, TSSOP-48
Differential Clock Buffer/Driver DDR400/PC3200-Compliant
|
CYPRESS SEMICONDUCTOR CORP
Cypress Semiconductor, Corp.
|
| CY7B9930V-5AC CY7B9930V-5AI CY7B9930V-2AC CY7B9930 |
High-Speed Multi-Frequency PLL Clock Buffer 7B SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP44
|
Cypress Semiconductor Corp.
|
| AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN |
3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
Triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL Translator
AC Characteristics of ECL Devices
|
Motorola
ONSEMI[ON Semiconductor]
|
| M2006-02A M2006-02A-669.3266 M2006-02AI669.3266 M2 |
PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36
VCSO BASED FEC CLOCK PLL
FEC Frequency Translation SAW PLL with FEC support and Hitless Switching option (and APC pin)
|
INTEGRATED DEVICE TECHNOLOGY INC
Integrated Circuit Systems
ICS
|
| QS5917T QS5917T-100TJ QS5917T-100TQ QS5917T-132TJ |
GIGATRUE 550 CAT6 PATCH 2 FT, SNAGLESS, BEIGE
GIGATRUE 550 CAT6 YELLOW STRANDED BULK 1000FT
GIGATRUE 550 CAT PATCH CBL SNAGLSS 1FT BG 25 PK
LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER 5917 SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28
GIGATRUE 550 CAT6 YELLOW STRANDED BULK 500FT PLL BASED CLOCK DRIVER, PQCC28
|
IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
|
| ASM5CVF857-40QT ASM5CVF857-48VT ASM5CVF857-48TR AS |
2.5V Wide-Range Frequency Clock Driver (60MHz - 200MHz) 2.5V的宽范围频率时钟驱动器（60MHz 200MHz的）
2.5V Wide-Range Frequency Clock Driver (60MHz - 200MHz) PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
2.5V Wide-Range Frequency Clock Driver (60MHz - 200MHz) PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA56
From old datasheet system
|
Alliance Semiconductor, Corp.
Alliance Semiconductor Corporation
|
| IDTCSP2510D IDTCSP2510DPG IDTCSP2510DPGI CSP2510D |
3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER 2510 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24
|
IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
|
| CS230001-CZZR |
Clocking-Timing IC Clock BW1Hz w/ 1x 2x 4x 8x PLL BASED CLOCK DRIVER, PDSO10
|
Cirrus Logic, Inc.
|
| MPC99J93 |
Intelligent Dynamic Clock Switch (IDCS) PLL Clock Driver
|
Motorola, Inc
|
| AV9172 AV9172-01CC16 AV9172-01CN16 AV9172-01CS16 A |
PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP16
Low Skew Output Buffer
|
INTEGRATED DEVICE TECHNOLOGY INC
ICST[Integrated Circuit Systems]
Integrated Circuit Syst...
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