| PART |
Description |
Maker |
| 1514 1514-22.5Y 1514-135Y 1514-2.5A 1514-130D 1514 |
Delay 50 /-2.5 ns, fixed SIP delay line Td/Tr=5
Delay 60 /-3 ns, fixed SIP delay line Td/Tr=5
Delay 45 /-2.3 ns, fixed SIP delay line Td/Tr=5
Delay 40 /-2 ns, fixed SIP delay line Td/Tr=5
Delay 270 /-13.5 ns, fixed SIP delay line Td/Tr=5
Delay 25 /-1.3 ns, fixed SIP delay line Td/Tr=5
Delay 170 /-8.5 ns, fixed SIP delay line Td/Tr=5
Delay 120 /-6 ns, fixed SIP delay line Td/Tr=5
Delay 10 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 90 /-4.5 ns, fixed SIP delay line Td/Tr=5
Delay 70 /-3.5 ns, fixed SIP delay line Td/Tr=5
Delay 130 /-6.5 ns, fixed SIP delay line Td/Tr=5
Delay 135 /-6.8 ns, fixed SIP delay line Td/Tr=5
PASSIVE DELAY LINE, TRUE OUTPUT, PSIP4
Fixed passive SIP delay line
Delay 2.5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 3.5 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 100 /-5 ns, fixed SIP delay line Td/Tr=5
Delay 105 /-5.3 ns, fixed SIP delay line Td/Tr=5
Delay 140 /-7 ns, fixed SIP delay line Td/Tr=5
Delay 150 /-7.5 ns, fixed SIP delay line Td/Tr=5
Delay 15 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 20 /-1 ns, fixed SIP delay line Td/Tr=5
Delay 22.5 /-1.2 ns, fixed SIP delay line Td/Tr=5
Delay 30 /-1.5 ns, fixed SIP delay line Td/Tr=5
Delay 37.5 /-1.9 ns, fixed SIP delay line Td/Tr=5
Delay 80 /-4 ns, fixed SIP delay line Td/Tr=5
Delay 7.5 /-1 ns, fixed SIP delay line Td/Tr=5
|
DATA DELAY DEVICES INC
|
| UPD424263LLE-A80 UPD424263LLE-A70 UPD424263LG5M-A6 |
20-output, 200-MHz Zero Delay Buffer
16 Kbit (2K x 8) nvSRAM
3.3V Zero Delay Buffer
x16 Fast Page Mode DRAM
Three-PLL General-Purpose EPROM Programmable Clock Generator
Phase-Aligned Clock Multiplier x16快速页面模式的DRAM
|
Cooper Hand Tools
|
| 1503 1503J 1503-100A 1503-100B 1503-100C 1503-120B |
Max delay 35 ns, Mechanically variable delay line
Max delay 250 ns, Mechanically variable delay line
Max delay 150 ns, Mechanically variable delay line
Max delay 130 ns, Mechanically variable delay line
Max delay 80 ns, Mechanically variable delay line
Max delay 60 ns, Mechanically variable delay line
Max delay 50 ns, Mechanically variable delay line
Max delay 40 ns, Mechanically variable delay line
Max delay 30 ns, Mechanically variable delay line
Max delay 25 ns, Mechanically variable delay line
Max delay 20 ns, Mechanically variable delay line
Max delay 200 ns, Mechanically variable delay line
Max delay 160 ns, Mechanically variable delay line
Max delay 15 ns, Mechanically variable delay line
Max delay 140 ns, Mechanically variable delay line
Max delay 120 ns, Mechanically variable delay line
Max delay 100 ns, Mechanically variable delay line
Mechanically variable passive delay line
|
Data Delay Devices Inc
|
| IDT5T2010NLI IDT5T2010 IDT5T2010BBI IDT5T2010BBI8 |
2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK
|
IDT[Integrated Device Technology]
|
| CY2309CZXI-1 CY2309CZXI-1H CY2309CZXI-1HT CY2309CZ |
3.3 V Zero Delay Clock Buffer
3.3V Zero Delay Clock Buffer 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
|
Cypress Semiconductor, Corp.
|
| IDT5T2110 |
2.5V ZERO DELAY PLL DIFFERENTIAL CLOCK DRIVER TERACLOCK?
|
IDT
|
| 1507 1507-100A 1507-100B 1507-100C 1507-150A 1507- |
Delay 50 /-2.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 300 /-15 ns, 10-TAP SIP delay line Td/Tr=5
Delay 200 /-10 ns, 10-TAP SIP delay line Td/Tr=5
Delay 250 /-13 ns, 10-TAP SIP delay line Td/Tr=5
Delay 150 /-7.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 100 /-5 ns, 10-TAP SIP delay line Td/Tr=5
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits 固定10抽头延迟线被动园
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits
Delay 40 /-2 ns, 10-TAP SIP delay line Td/Tr=5
Delay 500 /-25 ns, 10-TAP SIP delay line Td/Tr=5
Delay 20 /-2 ns, 10-TAP SIP delay line Td/Tr=5
|
Data Delay Devices Inc
|
| AD9510_PCB AD9510BCPZ AD9510-VCO_PCB AD9510BCPZ-RE |
1.2 GHZ CLOCK DISTRIBUTION IC, PLL CORE, DIVIDERS, DELAY ADJUST, EIGHT OUTPUTS
|
Analog Devices
|
| MDU12H-4MC3 MDU12H-250MC3 MDU12H-150MC3 MDU12H-30M |
Delay 200 /-10 ns, dual, ECL-interfaced fixed delay line
Delay 150 /-7.5 ns, dual, ECL-interfaced fixed delay line
Delay 250 /-12.5 ns, dual, ECL-interfaced fixed delay line
Delay 125 /-6.2 ns, dual, ECL-interfaced fixed delay line
Delay 100 /-5 ns, dual, ECL-interfaced fixed delay line
DUAL, ECL-INTERFACED FIXED DELAY LINE (SERIES MDU12H) ACTIVE DELAY LINE, TRUE OUTPUT, DSO16
|
DATA DELAY DEVICES INC
Data Delay Devices, Inc.
|
| CY23S0909 CY23S09ZXC-1H CY23S09SC-1 CY23S09SC-1H C |
Low-Cost 3.3V Spread AwareZero Delay Buffer 23S SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
23S SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 4.40 MM, MO-153, TSSOP-16
Low Cost 3.3V Spread Aware Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| IDT23S05-1HDCI IDT23S05 IDT23S05-1DC IDT23S05-1DCG |
3.3V ZERO DELAY CLOCK BUFFER / SPREAD SPECTRUM COMPATIBLE
3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
|
| ASM5I2305AF-1-08-SR ASM5I2305AG-1-08-SR ASM5P2305A |
2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V Zero Delay Buffer
|
PulseCore Semiconductor
|
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