| PART |
Description |
Maker |
| AS7C3128PFD32A-4TQC AS7C3128PFD36A-4TQC AS7C3128PF |
3.3V 128K x 36 pipeline burst synchronous SRAM, 166 MHz
3.3V 128K x 36 pipeline burst synchronous SRAM, 150 MHz
3.3V 128K x 36 pipeline burst synchronous SRAM, 133 MHz
3.3V 128K x 32 pipeline burst synchronous SRAM, 133 MHz
3.3V 128K x 32 pipeline burst synchronous SRAM, 166 MHz
128K X 32 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 4 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 32 STANDARD SRAM, 3.8 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 32 STANDARD SRAM, 5 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 3.8 ns, PQFP100 14 X 20 MM, TQFP-100
128K X 36 STANDARD SRAM, 5 ns, PQFP100 14 X 20 MM, TQFP-100
3.3V 128K x 32/36 pipeline burst synchronous SRAM
3.3V 128K x 32 pipeline burst synchronous SRAM, 150 MHz
3.3V 128K x 32 pipeline burst synchronous SRAM, 100 MHz
3.3V 128K x 36 pipeline burst synchronous SRAM, 100 MHz
|
Alliance Semiconductor, Corp.
|
| GS840E18 GS840E36B-166I GS840E18B-166I GS840E32T-1 |
256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs 256K X 18 CACHE SRAM, 8.5 ns, PBGA119
256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs 128K X 36 CACHE SRAM, 8.5 ns, PBGA119
4Mb56K x 18Bit) Synchronous Burst SRAM(4M位（256K x 18位）同步静态RAM（带2位脉冲地址计数器）)
|
http://
GSI Technology, Inc.
|
| IS61NLP25618A IS61NLP25618A-200B3 IS61NLP25618A-20 |
128K x 32, 128K x 36, and 256K x 18 4Mb, PIPELINE (NO WAIT) STATE BUS SRAM
|
Integrated Silicon Solu...
|
| IDT71V25761 IDT71V25781 IDT71V25781S166PF IDT71V25 |
128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect 128K X 36 CACHE SRAM, 3.5 ns, PBGA165
128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect 128K X 36 CACHE SRAM, 3.1 ns, PQFP100
128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect 128K X 36 CACHE SRAM, 3.3 ns, PBGA165
128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect 128K X 36 CACHE SRAM, 3.1 ns, PBGA119
128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect 128K的米656 × 18 3.3同步SRAM.5VI / O的流水线输出，脉冲计数器，单周期取消
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Integrated Device Technology, Inc.
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| IS61NP12832 IS61NP25618 IS61NLP12832-5B IS61NP1283 |
PIPELINE NO WAIT STATE BUS SRAM 256K X 18 ZBT SRAM, 5 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 5 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 36 ZBT SRAM, 4.2 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 管道编号WAIT状态总线的SRAM
PIPELINE NO WAIT STATE BUS SRAM 128K X 36 ZBT SRAM, 3.8 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 256K X 18 ZBT SRAM, 4.2 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 36 ZBT SRAM, 4.2 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 5 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 256K X 18 ZBT SRAM, 3.8 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 36 ZBT SRAM, 5 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 4.2 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 4.2 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 256K X 18 ZBT SRAM, 5 ns, PBGA119
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 3.8 ns, PQFP100
PIPELINE NO WAIT STATE BUS SRAM 128K X 32 ZBT SRAM, 3.8 ns, PBGA119
|
Integrated Silicon Solu...
Integrated Silicon Solution, Inc.
|
| IDT71V2558SA133BG IDT71V2558SA133BGI IDT71V2558SA1 |
3.3V 128Kx36 ZBT Synchronous PipeLined SRAM with 2.5V I/O
3.3V 256K x 18 ZBT Synchronous PipeLined SRAM w/2.5V I/O
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K X 36 ZBT SRAM, 3.2 ns, PBGA165
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 256K X 18 ZBT SRAM, 5 ns, PBGA165
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K的3656 × 18 3.3同步ZBT SRAM.5VI / O的脉冲计数器输出流水
128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 2.5V I/O, Burst Counter Pipelined Outputs 128K X 36 ZBT SRAM, 4.2 ns, PBGA165
SPLICE,TERM,BUTT,INSUL,UNION,16-22AWG
|
IDT
Integrated Device Technology, Inc.
|
| IDT71V2577YS75BQI IDT71V2577YS75BGI IDT71V2579S85B |
128K x 36,256K x 18 3.3V Synchronous SRAMs 2.5V I/O,Flow-Through Outputs Burst Counter,Single Cycle Deselect 128K X 36 CACHE SRAM, 8 ns, PQFP100
128K x 36,256K x 18 3.3V Synchronous SRAMs 2.5V I/O,Flow-Through Outputs Burst Counter,Single Cycle Deselect 128K的x 36256亩18 3.3同步SRAM.5VI / O的流量通过输出脉冲计数器，单周期取
128K x 36,256K x 18 3.3V Synchronous SRAMs 2.5V I/O,Flow-Through Outputs Burst Counter,Single Cycle Deselect 128K X 36 CACHE SRAM, 8.5 ns, PQFP100
128K x 36,256K x 18 3.3V Synchronous SRAMs 2.5V I/O,Flow-Through Outputs Burst Counter,Single Cycle Deselect 128K X 36 CACHE SRAM, 7.5 ns, PQFP100
128K x 36,256K x 18 3.3V Synchronous SRAMs 2.5V I/O,Flow-Through Outputs Burst Counter,Single Cycle Deselect 128K X 36 CACHE SRAM, 7.5 ns, PBGA119
128K x 36,256K x 18 3.3V Synchronous SRAMs 2.5V I/O,Flow-Through Outputs Burst Counter,Single Cycle Deselect 256K X 18 CACHE SRAM, 7.5 ns, PBGA119
128K x 36,256K x 18 3.3V Synchronous SRAMs 2.5V I/O,Flow-Through Outputs Burst Counter,Single Cycle Deselect 256K X 18 CACHE SRAM, 8 ns, PBGA165
|
Integrated Device Technology, Inc.
INTEGRATED DEVICE TECHNOLOGY INC
|
| GS840FH36AT-8I |
256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs
|
GSI Technology
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| AS7C3364PFS32A-133TQC AS7C3364PFS32A-133TQI |
3V 64K x 8/512K x 32 pipeline burst synchronous SRAM, 133MHz
|
Alliance Semiconductor
|
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