| PART |
Description |
Maker |
| AZ100EL31 AZ10EL31 AZ10EL31DR2 AZ100EL31T AZ100EL3 |
ECL/PECL D Flip-Flop with Set and Reset ECL / PECL的D触发器的设置和复
From old datasheet system
|
Electronic Theatre Controls, Inc.
List of Unclassifed Manufacturers
ETC[ETC]
Arizona Microtek
|
| MC10EP131 MC10EP131FA MC10EP131FAR2 MC100EP131FAR2 |
3.3V / 5V ECL Quad D Flip-Flop with Set, Reset, and Differential Clock 3.3 / 5V的ECL四D触发器设置，复位拖鞋和差分时
3.3V / 5V ECL Quad D Flip-Flop with Set Reset and Differential Clock
|
ONSEMI[ON Semiconductor]
|
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| MC100EL51DG MC100EL51DR2G MC100EL51DT MC100EL51DTG |
5V ECL Differential Clock D Flip-Flop 10EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, DSO8
5V ECL Differential Clock D Flip-Flop 10EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
5V ECL Differential Clock D Flip-Flop; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 10EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
5V ECL Differential Clock D Flip-Flop(5V ECL 差分时钟D触发
|
ONSEMI[ON Semiconductor]
|
| MC100EL30-06 |
5V ECL Triple D Flip−Flop with Set and Reset
|
ON Semiconductor
|
| MC10EP131-D |
3.3V / 5V ECL Quad D Flip-Flop with Set, Reset, and Differential Clock
|
ON Semiconductor
|
| MC100EL29-D |
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
|
ON Semiconductor
|
| MC100LVEL29-D |
3.3V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
|
ON Semiconductor
|
| HCTS74KTR HCTS74T HCTS74DTR |
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS 20-LCCC -55 to 125
Radiation Hardened Dual-D Flip-Flop with
Set and Reset(抗辐射双D触发器（带置位、复位）)
Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
|
Intersil Corporation
|
| MC74HC109 ON1335 |
Dual J-K Flip-Flop with Set and Rest
From old datasheet system
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
Motorola, Inc
ON Semi
|
| 74AUP1G74GT-G 74AUP1G74GF |
Low-power D-type flip-flop with set and reset; positive-edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
