| PART |
Description |
Maker |
| HM48416AP |
16384 word x 4 Bit Dynamic RAM
|
Hitachi Semiconductor
|
| CY7C1561KV18 CY7C1561KV18-400BZC CY7C1561KV18-400B |
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.29 ns, PBGA165
72-Mbit QDR-II SRAM 4-Word Burst Architecture
|
Cypress Semiconductor, Corp.
|
| CAT64LC40ZJ CAT64LC40ZS CAT64LC40J-TE7 CAT64LC40J- |
72-Mbit QDR™-II SRAM 2-Word Burst Architecture
72-Mbit QDR™-II SRAM 4-Word Burst Architecture
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL™ Architecture
72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL™ Architecture
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL™ Architecture
SPI Serial EEPROM SPI串行EEPROM
72-Mbit QDR-II™ SRAM 2-Word Burst Architecture SPI串行EEPROM
72-Mbit QDR™-II SRAM 2-Word Burst Architecture
|
Analog Devices, Inc.
|
| CY7C1513JV18-250BZXC |
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| LC3564B LC3564BM LC3564BS LC3564BT LC3564BT-10 LC3 |
x8 SRAM
64K (8192-word 8-bit) SRAM with OE, CE1, and CE2 Control Pins
64K (8192-word ? 8-bit) SRAM with OE, CE1, and CE2 Control Pins
64K (8192-word x8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control Pins
64K (8192-word x 8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control Pins
64K (8192-word 8-bit) SRAM with OE / CE1 / and CE2 Control Pins
64K (8192-word ′ 8-bit) SRAM with OE, CE1, and CE2 Control Pins
64K (8192-word 8-bit) SRAM with OE, CE1, and CE2 Control Pins 64K的（8192字?8位）与光电，CE1上SRAM和控制引脚铈
|
SANYO[Sanyo Semicon Device]
Sanyo Electric Co.,Ltd.
Sanyo Electric Co., Ltd.
|
| LC35256DM LC35256DT-10 LC35256DT-70 LC35256D-10 25 |
x8 SRAM
Dual Control Pins: OE and CE 256K (32768-word X 8-bit) SRAM
|
SANYO[Sanyo Semicon Device]
Sanyo Electric Co.,Ltd.
|
| CY7C1565V18-300BZI |
72-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 36 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| UPD44164082F5-E50-EQ1 UPD44164362F5-E50-EQ1 UPD441 |
18M-BIT DDRII SRAM 2-WORD BURST OPERATION 1800万位的SRAM 2条DDRII字爆发运
2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
NEC, Corp.
|
| M5M4V16169DTP-10 M5M4V16169DTP-7 M5M4V16169DTP-8 M |
16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
|
MITSUBISHI[Mitsubishi Electric Semiconductor]
|
| M5M4V16169DRT-10 M5M4V16169DRT-15 M5M4V16169DRT-7 |
16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
|
Mitsubishi Electric Corporation
Mitsubishi Electric Semiconductor
|
| R1Q2A3636ABG60RB0 R1Q3A3636ABG60RB0 R1Q4A3636ABG60 |
36-Mbit QDR⑩II SRAM 2-word Burst
36-Mbit QDR垄芒II SRAM 2-word Burst
|
Renesas Electronics Corporation
|
