PART |
Description |
Maker |
2795R 2795AB 2795B 2795C 2795D 2795P |
Fault-Protected Analog Multiplexer with Latch 622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier Signal Line Circuit Protector with Three Independent Protectors HIGH FREQUENCY MAGNETICS T1/E1 Miniature Surface Mount Tranformers
|
BEL[Bel Fuse Inc.]
|
MAX6341 |
155Mbps/622Mbps Clock Recovery and Data Retiming IC with Fully Integrated Phase Frequency Detector[MAX3270 ]
|
Maxim Integrated Products, Inc.
|
5962-9231604MTA 5962-9231602MXA 5962-9231603MYA 59 |
622Mbps/1244Mbps Burst-Mode Clock Phase Aligner for GPON OLT Applications 2.97V to 5.5V, 125Mbps to 200Mbps Limiting Amplifier with Loss-of-Signal Detector 155Mbps to 622Mbps SFF/SFP Laser Driver with Extinction Ratio Control x1的SRAM Precision, Quad, SPST Analog Switches x1的SRAM
|
Vicor, Corp.
|
CT2-PL1LATD53C1 CT2-PL1LFTD33C1 CT2-PL1LKTD51C1 |
FIBER OPTIC TRANSCEIVER, 1280-1335nm, 622Mbps(Tx), 622Mbps(Rx), PANEL MOUNT, LC CONNECTOR
|
JDS UNIPHASE CORP
|
AD802 AD800 AD800-52BR AD800-45BQ AD802-155BR AD80 |
Clock Recovery and Data Retiming Phase-Locked Loop Clock Recovery and Data Retiming Phase-Locked Loop PHASE LOCKED LOOP, PDSO20 Clock Recovery and Data Retiming Phase-Locked Loop(时钟恢复和重定时PLL) AD800/AD802: Clock Recovery and Data Retiming Phase-Locked Loop Data Sheet (Rev. B. 12/93) 45 or 52 Mbps Clock and Data Recovery IC
|
Analog Devices, Inc.
|
2795L 2795H 2795J 2795K |
T1/E1 Transformer Miniature 3.3V, 622Mbps, SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs HIGH FREQUENCY MAGNETICS T1/E1 Miniature Surface Mount Tranformers
|
BEL[Bel Fuse Inc.]
|
MAX9320EUA-T MAX9320AEKA-T |
2.25 V to 3.8 V, 1:2 differential LVPECL/LVECL/HSTL clock and data driver 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 9320 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
MAXIM - Dallas Semiconductor Maxim Integrated Products, Inc.
|
M13L2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
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